SAN JOSE, CALIF. – The Advanced Packaging and Interconnect Alliance (APiA) has agreed to work with ACE Semiconductor to provide a 200 mm advanced packaging process line in ACE's Shanghai fab.

ACE Semiconductor and APiA, a group of semiconductor equipment and process technology suppliers, will be establishing the first 200 mm wafer-level chip scale packaging (WLCSP) fab in China, according the Ping Nieh, the CEO of ACE Semiconductor. Nieh also saw WLCSP for memory devices ramping up.

Ellery Buchanan, chairman of APiA, cited multiple benefits of this agreement. The process line at ACE will give APiA and its customers the capacity for demonstrations and process development. Also, this work will provide the development and support resources needed to develop the 300 mm line that APiA is planning to install in Asia.

In other APiA news, Adept Technology and Tegal Corp. recently were added as members of APiA. Tegal will add plasma etch expertise, and Adept will provide automation technology to the alliance. To help coordinate the efforts of the growing membership, which currently stands at 30, APiA is setting up an industry advisory board, according to Stephen Kay of member company Ultratech Stepper.

At APiA's seminar at SEMICON West, Gil Olachea addressed the issue of the cost of flip chip processes. Olachea, president of APiA member Kulicke & Soffa Flip Chip Div., noted that 63 percent of package cost is associated with the substrate, while 2 percent is for the under bump metallurgy and 1 percent comes from bumping.