BY EDWARD G. COMBS

With the proliferation of smaller and thinner packages for portable and hand-held products, there is an increased need for thinner semiconductor devices. What used to be a process for only selected situations is now a required process for most applications, and the technology for thinning wafers is becoming more critical than ever before. With the advent of the thicker 300 mm wafers, bumped wafers, stacked die requirements and ultra-thin packages, wafer backgrinding equipment and processes are becoming critical issues for assembly.

Wafer Thinning Options

Figure 1. a) A backgrinding process leaves a characteristic scratch pattern on the back of the wafer. b) The back of the die from certain locations on the wafer have a primarily vertical pattern of scratches.Click here to enlarge image

There are several methods that are presently being used for thinning wafers, the most popular being the well-established mechanical backgrinding and polishing technique. This process is preferred in many cases because it is faster and less costly than the newer chemical or plasma etching processes that have been recently developed. However, it does have the disadvantages of applying mechanical stress and heat during the grinding process and of causing scratches on the backside of the wafer. These scratch patterns and the depth of the scratches on the surface of the wafer are directly proportional to the size of the grit and the pressure exerted on the wafer during the grinding process. The depth of the scratches and the backside surface roughness of the semiconductor die have a direct correlation to the strength of the die, so it is critical that the finished backside surface of the wafer be as smooth (or polished) as possible.

The Backgrinding Process

To improve the productivity of an operation, a multi-step grinding operation is generally performed. The first step uses a large grit to coarsely grind the wafer and remove the bulk of the excess wafer thickness. A finer grit is used in the second step to polish the wafer and to accurately grind the wafer to the required thickness. For wafers with diameters of 200 mm, it is typical to start with a wafer thickness of roughly 720 µm and grind it to a thickness of 150 µm or less. The coarse grinding typically removes approximately 90 percent of the excess material. A typical two-step backgrinding operation will use dual spindles with grinding wheels mounted on each spindle.

Scratches and Wafer Strength

After backgrinding, the wafer will exhibit a scratch pattern on the backside (Figure 1a). The depth of these scratches will depend on the size of grit of the wheel and the amount of vertical pressure applied during grinding. (A finer grit results in smaller and shallower scratches.) Because the strength of the silicon is inversely proportional to the depth of the scratches, it is important to minimize the roughness of the wafer surface.

Figure 2. The method for testing the strength of a die with scratches on its back surface.Click here to enlarge image

We conducted an experiment to establish the difference in strength of a silicon die vs. various grit sizes (or scratch depths). Samples were with vertical scratches were extracted from the wafer for the worst case scenario (Figure 1b). With a 2000 grit grinding process, the stress required to break the die was 50 percent higher than the stress needed to break a die with a (larger) 1200 grit grinding process. Figure 2 shows the method of applying the test force to the die, and Figure 3 shows the difference in the scratches on the wafers using different grits to grind the silicon.

Sources of Stress

The amount of stress that is applied to the die in actual applications depends on many factors, including the substrate material on which the die is mounted, the size of the die, the die attach material, and the temperature excursions that the die will be subjected to in an application. For many high-power applications, the die is mounted directly onto a high-conductivity material, such as copper or aluminum, and the thermal coefficient of expansion (TCE) mismatch between the silicon and the metal will result in significant mechanical stress on the die during temperature extremes. The actual stress on the die in such an application is similar to the stress induced by the test method during the experiment that was conducted. For example, if the die is mounted on a copper heatsink or die attach pad, the large TCE (17.3 ppm/K) of a copper substrate vs. the small TCE (2.3 ppm/K) of a silicon die results in mechanical stress at the die edge. A larger die results in more stress. Also, if the metal heatsink or substrate is not of sufficient thickness to resist the expansion or contraction of the die, the material will bend and produce an even higher level of stress on the die. Any scratch in the backside surface of the die may then propagate cracks during the stress conditions that environmental tests or actual power applications may induce.

Backgrinding Equipment

To increase productivity, many equipment manufacturers produce equipment for thinning and handling of multiple wafers. The designs of these machines affect the quality of the thinned wafers as much as the selection of the grinding spindles. Figure 4 shows schematic representations of some multi-wafer handling machines that are available today.

Figure 3. Silicon wafers backgrinded with a) 2000 grit and b) 1200 grit grinding wheels (30X).Click here to enlarge image

Process parameters (input and output) that must be closely monitored during wafer backgrinding include:

• Total thickness variation within the wafer
• Thickness variation from wafer to wafer
• Average roughness
• Warpage and bowing
• Die strength
• Final wafer thickness
• Wafer breakage

Figure 4. Three equipment designs for coarse and fine grinding of multiple wafers.Click here to enlarge image

It should also be noted that the ability to thin wafers mechanically also depends on the wafer material itself. Silicon wafers are much more easily thinned than some of the newer materials, such as gallium arsenide or indium phosphide, which tend to be more brittle and susceptible to mechanical damage. It is now practical to thin 200 mm Si wafers to a thickness of 150 µm, but 100 mm GaAs wafers are typically thinned to 250 µm.

Other Thinning Options

The advantages that the more costly chemical or plasma etching processes offer include: 1) no scratches introduced during the process; 2) less heat and mechanical stress applied to the wafer during thinning; and 3) the ability to produce thinner wafers. The wafers can be processed down to as thin as 50 µm because there is no mechanical stress applied to the wafer during the thinning process. If the end product must be ultra thin or if multiple die must be stacked in a thin package, then there is little alternative but to go with the chemical or plasma process, or a combination of mechanical and chemical/plasma processes.

Conclusion

As long as packages continue to shrink in their vertical dimensions and wafer diameters continue to grow, backgrinding and other wafer thinning processes will continue to be a critical step. In the past, it has been one of those processes that was taken for granted and not considered very important, but that is no longer the case. It is now a necessity. AP

Edward G. Combs, vice president of engineering, can be contacted at ASAT Holdings Ltd., 46335 Landing Parkway, Fremont, CA 94538; 510-249-1222; Fax: 510-249-9105; E-mail: [email protected].