By Sergey Savastiouk, ALLVIA
Almost 10 years ago (January 2000) I wrote an article for SST titled “Moore’s Law — the Z-dimension”. The call was to shift focus towards Moore’s Law in the z-dimension and then invest in affordable, vertical miniaturization and integration, rather than continue to invest in further feature size reduction. A new term–through silicon vias (TSVs)–was first introduced in that article and is now commonly used.