One of the most interesting aspects of advanced packaging comes from the excitement that engineers feel when they’re just about to introduce a new interconnect method, a unique package, or an application. It’s the scientific discovery that really motivates many engineers. That spark of energy also lights up editors.
For instance, recently I talked to John Knickerbocker, Paul Andry, and Steven Wright, three engineers from IBM Research, at the Electronic Components and Technology Conference (ECTC) in San Diego, CA, May 30-June 2.
Last year in IBM’s Journal of Research and Development, Knickerbocker, Andry, and others published a paper on the development of next-generation SoP technology, based on silicon carriers with fine-pitch chip interconnection. The paper described key technology enablers including silicon through-vias – a feature permitting efficient, area-array signal power and ground interconnection through thinned-silicon packages. The thermal expansion of the silicon package carrier matches the chip, helping to maintain reliability even as the high-density microbump interconnections scale to smaller size.
“Silicon through-vias, together with high-density wiring and high-density fine-pitch interconnection, create high bandwidth for chip-to-chip interconnection and chip stacking,” says Knickerbocker.
The technique allows for 2- and 3-D chip stacking. It uses microchannel cooling to support the high power densities. Researchers claim that, compared to air cooling, microchannel cooling works three to four times better. “One of the advantages of developing new technologies using the infrastructure of silicon-based manufacturing is that we can extend existing capability and ramp the technology into new products in less time than with totally new technology. This silicon-based technology can also provide integrated function such as integrated decoupling capacitors,” Knickerbocker explained. “We simply fill the gap between the chip and the via level. It’s in tandem with first-level packaging…a completely different level of interconnect.”
Theirs was not the only exciting news at ECTC. C.P. Wong, Ph.D., distinguished professor at the School of Materials Science and Engineering at the Georgia Institute of Technology, received the IEEE Components, Packaging, and Manufacturing Technology Award for his fundamental work in pioneering the use of new materials. At present he is working on the use of carbon nano-tubes for electrical and thermal management of high-performance packages. Wong credited the curiosity of his students for keeping the research fresh and exciting.
It’s the smaller conferences such ECTC – where East meets West and current research is presented – that people take the time to discuss their work.
If you have innovative research or a new gee-whiz package that you’d like to share, call us up. We’re pleased to be the magazine where innovations are discussed. We share your excitement.
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Gail Flower
Editor-in-Chief