Packaging & Assembly Equipment Market Expected to Decrease in 2005
STAMFORD, CONN. – Worldwide semiconductor capital equipment spending was on pace to increase 60% in 2004, according to Gartner Inc. research analysts, but spending in 2005 is projected to decline 15%. The bad news for the packaging and assembly equipment market is an expected 22% decline in 2005, with revenue of approximately $3.5 billion. The good news is that packaging lithography and flip chip bonder tooling are expected to see positive growth this year. Packaging utilization rates likely will bottom out in the second half of 2005, giving way to increasing orders by the end of the year.
All major segments of the capital equipment market are forecast to decline in 2005, with the exception of the ATE market, which is expected to grow 3% this year as a result of continued growth of test outsourcing, and then decline by 30% in 2006. Gartner analysts say the industry is in a downcycle, but that it should be shorter than the previous one in 2001.
“Given more modest capacity investments during the cycle, the supply-demand imbalance will be far less severe than in the prior two cycles,” says Klaus Rinnen, vice president of Gartner’s semiconductor manufacturing and design research group. “Consequently, the approaching downcycle will be mild, allowing for a return to positive annual investment growth – possibly as early as 2006.”
Worldwide semiconductor wafer fab utilization rates peaked in the second quarter of 2004 at 94.9%, according to Gartner, before dropping to 91.3% at the end of the third quarter, because semiconductor manufacturers trimmed production levels in response to excess inventories. – SCJ
Flip Chip and WLP Demand Requires Capacity Expansion
AUSTIN, TEXAS – Flip chip and wafer-level packaging (WLP) are among the fastest growing sectors in the first-level interconnect arena. In its recent Flip Chip and Wafer-level Packaging Trends and Market Forecasts study, TechSearch International, a technology licensing and consulting company, projects a compound growth rate of more than 28% in this market between 2004 and 2009. With a forecasted demand of 22 million 8-in. equivalent wafers (flip chip and WLP) in 2007, TechSearch predicts a need for capacity expansion.
Devices from diodes to DRAMs are increasingly packaged at the wafer level. WLPs also are growing in volume for a variety of low-lead count applications, including analog devices such as power amplifiers, battery management devices, controllers, memory, and integrated passives.
EU legislation (WEEE and RoHS), banning lead and other materials deemed hazardous to the environment by 2006, currently provides and exemption for high-lead flip chip bumps, but many companies are moving to adopt lead-free bump compositions.
Demand for 300-mm bumping is expected to expand, according to TechSearch, with increased production of devices on 300-mm wafers. At the same time, solder prices are declining, and no longer factor into the adoption of flip chips. High substrate prices, however, are a continuing barrier to widespread migration from wirebond to flip chip attachment. -Lee Mather
MEPTEC’s Holiday Luncheon Wrapup
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BY JULIA GOLDSTEIN
SUNNYVALE CALIF. – Mike Zimmerman of Quantum Leap Packaging spoke at MEPTEC’s annual holiday luncheon in December. Quantum Leap Packaging (QLP) is a new company, founded 2 years ago, with the goal of achieving the performance of ceramic packages within the cost structure of plastic packages. Their core technology is injection molding of liquid crystal polymers (LCP) for overmolded packages. LCP materials are thermoplastics, so they do not require a curing process like epoxies.
Zimmerman described developments by QLP to solve poor adhesion problems that often plague LCPs and to produce LCPs that can withstand high-temperature processing, for example for soldering of AuSn and AuSi eutectics. The high-temperature LCP melts near 500°C and is compatible with AuSi die attach at 400°C. Various LCP compounds can be produced with CTE values matching those of copper, silicon, or ceramic. QLP has produced a QFN-based air cavity package that consists of a LCP body structure bonded to a copper leadframe and a LCP lid attached with B-stage epoxy. Key applications include packaging of MEMS and RF devices. The body is designed with a standoff to provide an air cavity between the die and the lid, but the resulting package feels and looks just like a simple overmolded package.
The cost is slightly higher than a standard overmolded package, but still much less than ceramic. Next-generation developments include solutions for wafer-level packaging of MEMS devices. Much of the basic technology Zimmerman presented has existed for years, but perhaps now the market is ready for it to become commercially successful.