BY DAVID ROSATO
Today's silicon chips, and the packages in which they reside, continue to decrease in size while increasing in both functionality and packaging complexity. These two factors make the chips prone to overheating, in turn eroding their performance and lowering their allowable operating frequency. To reduce these problems and associated costly development and manufacturing delays, thermal analysis must be integrated into the IC design phase. Typically, thermal issues are addressed later in the design process or during the testing phase — creating costly redesigns and slowing the time to market for new products.
Performing a package-level thermal analysis during the initial design phase involves simulating large quantities of very complex geometry. These include traces, vias, solder bumps or wire bonds, solderballs, and lead frames. The thermal analysis software must directly access this data from the electrical design tool. This data is then be used by the tool to automatically create a 3-D model. In this way, the most time consuming part of thermal simulation, building the 3-D model, is nearly eliminated. The challenge for the thermal modeling tool is to process the large quantity of data and create a thermal model that can be used to identify and solve complex thermal issues. During the thermal design of the package, many variations in the design typically are considered requiring a thermal analysis tool to model alternatives quickly and accurately.
It is equally important for a thermal modeling tool to provide the package designer with an accurate thermal simulation. The user of the tool typically is an electrical design engineer with a minimal background in thermal analysis. The software must automatically create an accurate thermal model, precisely apply thermal boundary conditions, and concisely present the results with minimal input by the user. Ideally, the tool should also provide flexibility so that later in the design process the thermal engineer can use the same tool using the same ECAD database to perform more sophisticated simulations. This collaboration between design teams is paramount.
Automatically building a quick and accurate thermal model is just one of the benefits of integrating thermal analysis into the chip design process. Many variables in a package's design affect its thermal performance. Good chip design requires an efficient heat transfer path from the active surfaces of the silicon to the external surfaces of the package and eventually to the PCB. Options like internal heat spreaders and thermal vias in a BGA substrate must be easily evaluated. A thermal analysis tool needs to analyze all the parameters involved and recommend an optimal solution.
Once a thermally acceptable package has been designed, chip and package developers and manufacturers need to provide the package's thermal characterizations to the end user. Since the thermal environment of the end users application typically is not known during package design, the package's thermal representation must be accurate for all the various means of cooling (i.e. air-cooling, heat sinks, conduction to the board). A simple junction-to-case or junction-to-ambient thermal resistance representation does not meet this requirement. Simple single resistance values are good to compare the relative thermal performance of different packages, or for very preliminary component temperature calculations. A boundary-condition independent thermal representation, such as a compact thermal model (CTM), is required. A CTM is a resistor representation of the package that predicts an accurate junction temperature, regardless of how it is cooled. The thermal tool used to optimize the thermal design of the package must also be capable of generating the package's CTM.
With increasing power density, the need for an integrated thermal analysis during all phases of electrical design becomes more important. Nanoscale technology introduces new thermal challenges and methodologies, and neglecting thermal issues can result in poor electrical performance. Due to the vast quantities of complex data during all stages of electrical design (chip, package, and PCB), thermal analysis software tools should work directly with the electrical design system to directly share data. Integrating thermal analysis into the chip and package design process allows thermal modeling, which traditionally can take up to a week, to now be done in minutes by design engineers who may not have thermal analysis expertise.
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DAVID ROSATO, president and founder, may be contacted at Harvard Thermal Inc., 249 Ayer Road, Suite 102, Harvard, MA 01451; (978) 772-3800.