BY JIM STRATIGOS AND GEORGE WHITE, JMD, DIRK BAARS, AL HORN, SCOTT KENNEDY, AND JOHN DOBRICK, Rogers Corporation

While CMOS SoC works well in low power applications, it doesn”t meet requirements for future wireless products. RF system-in-package (SiP) is one option, but existing solutions are costly, or don”t reach the necessary level of integration. A thinfilm multilayer process for embedding passives is another option.

IC packaging has become a critical bottleneck to achieving reductions in the size of wireless products. The deployment of new broadband wireless standards, based on multiple-input multiple-output (MIMO) technology, means that mobile phones, laptops, and mobile Internet devices will require increasingly complex front-end circuitry. With up to 10 power amplifiers (PAs) and associated low-loss RF filters, couplers, and matching circuits, circuit board area required for future front-ends will surpass that required for digital processor and memory functions implemented in CMOS. CMOS SoC solutions have only proven to be acceptable in low-power applications, thus RF front-ends are still composed of heterogeneous RFIC technologies along with discrete assive components. As a result, RF system-in-package (SiP) technology is an enabler of the next-generation of wireless products.

Existing solutions based on ceramic packages or silicon passive components are either expensive, or not capable of reaching the level of integration needed. However, a patented, thin-film, multi-layer process to implement RF SiP substrates