SANTA CLARA, CA — (MARKET WIRE) — 05/10/2005 — Silvaco, a leading vendor of commercial circuit simulation and EDA software, received the great news from the Compact Model Council (CMC) that the HiSIM-RF Surface Potential SPICE Model was elected by its members for standardization. The HiSIM-RF model was developed at Hiroshima University, a leading Japanese research institution in SPICE model development. Silvaco has always endorsed the HiSIM-RF model throughout its evolution and development.

“We congratulate the HiSIM-RF development team that won this competition among several very qualified candidates,” said Dr. Ivan Pesic, CEO of Silvaco. “I believe that the model’s accurate surface potential algorithms, high performance integrated derivatives, and Berkeley-style interface for ease of integration were some of the key features that CMC members were seeking in their next generation compact model.”

The current industry standard BSIM3 and BSIM4 models, while very successful over the past decade, are not able to accurately model the behaviors of technologies at 90nm and below. The CMC believes that a new standard MOSFET model is now needed, one that is inherently symmetric, continuous, and physically correct for charges and currents.

The CMC examined many qualified MOSFET model candidates and voted down to two finalists for standardization. The second finalist was the PSP model from Philips and the University of Pennsylvania.

The Compact Model Council is a group of 27 voting companies that was formed in August 1996 for the purpose of promoting the international, nonexclusive standardization use and implementation of compact models. Compact models are mathematical descriptions (equations) of semiconductor devices used by analog circuit simulators. Integrated circuit designers and printed circuit board designers use circuit simulators to accurately predict the behavior of electronic devices before the devices are manufactured.