NSTI panel examines challenges, advances in nanomanufacturing

By Tom Cheyney, Small Times Senior Contributing Editor

May 31, 2007 — A particularly compelling discussion among panelists from industry and academia at the NSTI Nanotech 2007 conference (May 21 – 24 in Santa Clara, Calif.) examined technical barriers to — and recent advancements in — nanomanufacturing. The frank exchange centered on successful integration of nanoelements with micro/nano structures and devices, and challenges to scaling up nanotech products to commercial volumes.

Several panelists emphasized the importance of drawing on the know-how of other industries, especially the semiconductor-manufacturing sector, to accelerate nanoproducts’ progress into production and the marketplace. Pointing to the chipmaking industry as “a good model to use,” MEMS industry consultant Roger Grace declared, “We need to learn from past experiences, we have to build on what we know.”
The creation and implementation of industry standards, support of R&D efforts, roadmapping, and establishment of a dedicated equipment, metrology, and packaging supplier infrastructure were among the lessons that nanomanufacturers could learn from the semiconductor community, according to Grace.

“The semiconductor model is the only one that will work for nanotechnology, with the exception of self-assembly,” said Brent Segal, COO/cofounder of Nantero. “Nanotechnology is mostly physical chemistry,” adding later that “the enemy of semiconductors is dirt. Even with the diversity of nanotechnologies, contamination control and reliability remain issues.” He mentioned that Nantero has successfully integrated its carbon nanotube-enabled NRAM devices into CMOS process flows in the Gresham, OR, chip fab operated by its partner (originally LSI Logic, now ON Semiconductor), without adding any new tools to the production line.

“How do you organize nanowires on a substrate?” asked Loucas Tsakalakos, staff scientist with GE Global Research. He reiterated the importance of understanding the controlled synthesis of “ordered nanostructures” and other fundamentals, citing materials incompatibility, alignment and positioning (vertically and horizontally), arbitrary patterns, and other technical challenges to “heterogeneous, multiscale materials and device” integration and manufacturability.

Several panelists identified metrology equipment as a “key bottleneck for advancing nanotechnology,” offering their views of specific tools and methods that have room for improvement.

Tsakalakos said that contact resistance needs to more accurately and repeatably measure nanowires, in order to determine their actual properties. Nantero’s Segal noted the challenge of measuring grain boundaries and other small structures of importance in “molecular-scale engineering.” Ahmed Busnaina, panel moderator and director of the NSF Center for High-Rate Nanomanufacturing (CHN) at Northeastern University, would welcome techniques and tools for in situ, fast measurement of defects and other anomalies over large areas, but “doesn’t see a good solution on the horizon.”

Busnaina and fellow professor Harry Stephanou of the University of Texas (Arlington) pointed out the great variety of applications and materials — and their relative immaturity — in the nano realm as well as the fragmentation of the micro/nano markets.

Stephanou urged “universities to do more than just research,” chiding higher-education institutions for the “lack of evolution in PhD programs” in the area of entrepreneurial skills. He also cited the “difficulties of having standard tools” and with the tools themselves, which makes it “less clear to know how to set up a [nano] fab,” as well as the complexities of “establishing a packaging infrastructure” because of the inherent diversity of nanotechnologies and materials.

Busnaina agreed that there is common ground between semiconductors and emerging nanoelectronics devices, but said the nanomaterials side has some key differences with the chip world, noting that specific applications have a great impact on how to develop and determine processes.

He said CHN tries to “bridge the gap between scientific research and the creation of commercial products” with the implementation of “processes and tools that will enable high-rate, high-volume, bottom-up precision manufacturing.” Part of the center’s nanoprocess standardization efforts focuses on the creation and development of what Busnaina calls “nanotemplates,” which will facilitate “guided self-assembly of nanoelements,” such as single-walled carbon nanotubes and polymers.

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