Nov. 22, 2006 — Innos, the UK-based nanotech research and development company, said it is providing integration engineering support and prototyping services for the UK Framework 6 Network of Excellence SiNANO project.
The consortium is funded by the EU, with the Engineering and Physical Sciences Research Council (EPSRC) providing additional access to the Innos fabrication facility to the different UK academic partners. The underlying principle of the project is to explore different technology routes and achieve very high speed, silicon-based nanoscale devices, which can be adopted in the future engineering of ICs.
Each partner in the SiNANO project provides the different areas of expertise required in developing these advanced devices using basic materials science, from the design and fabrication through to characterization and device modeling. The research will aim to enhance device performance and integration.
In order to support the four main UK partners, Innos has set up an internal task force led by Dr. Riccardo Varrazza, commercial integration engineer at Innos’ Southampton headquarters. A team of engineers directed by Dr. Enrico Gili, process engineer at Innos, is developing and managing the engineering and fabrication of the prototype devices. This is intended to allow Innos to focus on the project management and integration engineering issues of the work carried out with each partner within the SiNANO project, while the academics focus on the research.
“Even though each partner is investigating a different area of nanoscale silicon application, our engineers are able to provide prototyping for the different devices for each partner,” said Gili in a prepared statement, “so that they can concentrate on the research elements.”
“Achieving the production of IC components at nanometric dimensions could herald a revolution in IC technology, involving the integration of nanoscale CMOS and emerging post-CMOS logic and memory devices,” said Varrazza in a prepared statement.
The four academic partners being supported by Innos are the Universities of Warwick, Southampton, Cambridge and Newcastle.
The University of Warwick, headed by Prof. Evan Parker and Prof. Terry Wall is focusing on the investigation of the properties of Silicon-Germanium (SiGe) and its development, through a set of oxidization processes and a CMOS batch.
Dr Douglas J.Paul of the Cavendish Laboratory at the University of Cambridge and his team of researchers are attempting to integrate SiGe quantum devices with strained-Si CMOS.
Prof. Antony O’Neal team is already working on strained Si Heterojunction Bipolar Transistors (HBT) and will soon be developing novel Strained Si CMOS.
The team at the University of Southampton headed by Prof. Peter Ashburn is tackling vertical gate Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETS) for use in ‘ambient intelligence’ technology, and post-CMOS devices that look at ways of extending the life of traditional CMOS devices.