NanGate, Inc. – a provider of design-specific standard cell library IP and EDA tools for layout automation – announced that it has released the first edition of a new 15nm open cell library (OCL). NanGate developed the library IP based on North Carolina State University’s FreePDK 15nm open-source, non-manufacturable process. Challenges such as designing with FinFET transistors, metal double patterning, advanced interconnect layers and metal gate restrictions are represented in the new PDK.

“NanGate’s Open Cell Libraries have become the de-facto option for exploring new algorithms, methodologies, design flows and circuit implementations,” said Alexandre Toniolo, VP Business Development at NanGate. “This new 15nm OCL will enable not only the academia but also other EDA and fabless companies to present and validate new ideas and solutions to the Semiconductor industry.”

The first release of the 15nm OCL includes a limited set of core cells and views enabling standard EDA RTL-GDSII tool flow.  NanGate plans to provide follow-up releases with a larger set of cells as the 15nm FreePDK gets completed. The views provided include: Liberty (.lib) with NLDM, CCS and ECSM models, LEF, Verilog, GDSII, CDL/Spice, HTML Datasheet and other industry standard views required to run other EDA tools.

The library was generated using the Library Creator platform – NanGate’s comprehensive layout automation solution – which generates optimized layouts by combining advanced transistor synthesis algorithms with two-step layout compaction: structural compaction and layout clean-up (2D compaction).

Access to the library is provided free of charge for Universities and can be downloaded from the NanGate website. Research organizations and companies in the Semiconductor industry are provided access at a fee depending on usage.

Other partners in the FreePDK15 alliance are NCSU, Mentor Graphics, ASU and Sage Design Automation.