Cadence Design Systems, Inc. today announced that STMicroelectronics has qualified and actively deployed the next-generation Cadence Virtuoso platform for its SmartPower technologies. The latest Virtuoso platform successfully enabled ST design engineers to improve custom routing quality and performance and significantly reduce block-planning and pin-optimization time using special pin groups and guide constraints.
In addition to its successes in such areas as sensors, microcontrollers and applications for the Internet of Things (IoT), ST is a worldwide leader in BCD (Bipolar, CMOS, DMOS) Smart Power technologies, utilized to develop ICs for automotive, power management, industrial, consumer and healthcare applications. To address the myriad of complex challenges that come with the development of these types of applications, ST turned to the next-generation Virtuoso platform to improve layout design automation without compromising the highest level of quality and reliability. Furthermore, the mixed-signal design interoperability between the Virtuoso platform and the Cadence Innovus™ Implementation System offers best-in-class floorplanning, pin-optimization and implementation flows that led to a reduction in turnaround time.
In addition to qualifying the next-generation Virtuoso platform for its SmartPower technologies, the ST SmartPower Technology R&D (TR&D) team has also updated its design kits to support the latest Virtuoso platform for production use. This platform also includes the Virtuoso Layout Suite for Electrically Aware Design.
“We have been longtime users of the Virtuoso platform and have a very large user community that trusts the platform to drive the delivery of dozens of production tapeouts each year,” said Pier Luigi Rolandi, director of TR&D Smart Power Design Enablement at STMicroelectronics. “Layout design automation needs to be done in a way that is very seamless to the end user while maintaining highest level of quality, and the next-generation Virtuoso platform does just that. The new platform also enables us to improve designer productivity and effectiveness to ensure that our teams can meet aggressive time-to-market goals.”