03/01/2019 A research team at Tokyo Tech's Department of Materials Science and Engineering including Tsuyoshi Michinobu and Yang Wang report a way of increasing the electron mobility of semiconducting polymers, which have previously proven difficult to optimize.
02/28/2019 A structure comprising a molybdenum disulfide monolayer on an azobenzene substrate could be used to build a highly compactable and malleable quasi-two-dimensional transistor powered by light.
02/28/2019 Technologies promising huge growth such as Artificial intelligence (AI), 5G, machine learning, high-performance computing, and telematics are ratcheting up pressure on semiconductor manufacturers in the race among product makers to accelerate time to market and capture share.
02/27/2019 Qualcomm Incorporated and Samsung Electronics have named two executives to join the Silicon Integration Initiative board of directors. Si2 is a global research and development joint venture that provides standard interoperability solutions for integrated circuit design tools.
02/26/2019 The SEMI Europe Industry Strategy Symposium (ISS Europe) returns in Milan, Italy, this year from 31st March to 2nd April, 2019 to explore new opportunities and challenges in the digital economy.
02/26/2019 The Electronic System Design Alliance, a SEMI¬†Strategic Association Partner, today opened nominations for member company executives to serve on the ESD Alliance Governing Council for the next two-year term.
02/25/2019 Cadence Design Systems, Inc. today announced that Toshiba Memory Corporation has successfully used the Cadence CMP Process Optimizer, a model calibration and prediction tool that accurately simulates multi-layer thickness and topography variability for the entire layer stack, to accelerate the delivery of its advanced 3D flash memory devices.