ASE Introduces Three-tier Fine-pitch Wire Bonding

10/01/2002

SANTA CLARA, CALIF. — Advanced Semiconductor Engineering Inc. (ASE) announced a new wire bonding technology with three tiers of fine-pitch wire bonds. The technology will allow ICs with higher I/O counts to continue using wire bonding for interconnection rather than migrating to flip chip, or it will allow smaller die sizes for ICs that have been pad-limited.

Previously, multi-tier wire bonding required staggered rows and a compromise on fine-pitch capabilities, but ASE's technology allows 70 µm pitch with 60 µm to be available by the end of this year. In this process, the inner, middle and outer wires are isolated by different loop heights to prevent wire shorting.

ASE sees a continuing need for these developments. "With IC designers placing more circuits within a smaller die area, and pushing the limits of chip performance, related packaging techniques will need to be improved," said J.J. Lee, VP of research and development, ASE Group. "In addition to our fine-pitch wire bonding, we also have developed two to three layers of pads designed to enable chip miniaturization." ASE also cited the development of advanced wire bonding equipment as a key part of the new process technology.