Reducing Flip Chip BGA Open and Short Fail Rate
07/01/2003
Understanding material and process effects
BY AH-SAN KYU, DICHEN JAMES HUA AND C.Y. LI
Due to its excellent thermal and electrical performance, the flip chip ball grid array (FCBGA) package has become more and more popular in the semiconductor packaging industry for high pin count integrated circuit devices. But one basic challenging problem that this package option faces — as does its wire bond predecessor — is to overcome the open and short fail rate caused by inappropriate assembly process parameter setting and package design.
The challenge has caught the industry's attention due to the FCBGA's structural difference from wire bond packages. This article exposes the latest effort in solving several major types of the open and short fails to improve the assembly yield.
In general, a flip chip package may have either open or short fail modes after assembly, and each mode shows up in several different fashions (Figure 1). We divide each of the two fail modes into several groups and describe their root causes and the ways to solve them.
Open Failure
An open failure is categorized as a failing mode where a package's interconnect is broken physically. The interconnecting portion of a package includes the die bump to substrate pad connection, the substrate pad to substrate trace connection and the trace to solder ball connection. It has been found that open fails occur mainly around the die bump area and can be categorized into two major types: Either bumps are lifted off the substrate pad or a trace that immediately connects to the substrate pad breaks. These two types of open fail have been repeatedly identified and their solutions have also been found through testing and production runs.
 Figure 1. A flip chip BGA cross-section structure. |
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Die tilt means that a die is not perfectly parallel to the substrate surface. This phenomenon can be explained with the process of die alignment prior to the die bump reflow. During the alignment stage, the die is "flipped over" with the solder bumps facing down to the substrate pads. When the die tile occurs, the bumps under the tilted down die can touch the substrate pads, whereas the bumps under the tilted up die, normally those bumps near the die edge, will be lifted off the substrate pads. The consequence is that these lifted bumps create a gap between the bump and the substrate pad and, thus, the circuit is opened up. Bump lifting often occurs at the corner of the die (Figure 2).
 Figure 2. A die bump lifted up. |
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The following is a solution to the die-bump lifting problem:
1. Increase the points of alignment evaluation system built in on the machine. This will fine tune the die level and make it close enough to the true parallel surface in relation to the substrate.
2. In addition, a CD camera is installed in front of the next process stage — infrared (IR) reflow. This can reject the aligned bumped die before the reflow process according to how well the die surface is adjusted, and cause the die to be re-aligned.
The trace, made of copper, is sandwiched by several different material layers, namely, bismaleimide-triazine (BT) resin and underfill, each of which possesses different thermal expansion features. After the first bump reflow, the bumps will be attached to the substrate pads, which link to the copper trace. During the second reflow for solder ball mount, The broken trace (Figure 3) can be caused by thermal expansion and cool-down shrinkage of the gaps between die, underfill, solder bump, trace and BT resin. The underfill's expansion and shrinkage rate (40 to 45 ppm) is much higher than trace rate (17 ppm). In addition, the shape of the bump pad makes it easy to absorb the stress on X-direction at the end of the trace.
After numerous tests, it's found that an improved trace pad connection better resists the thermal expansion-caused distortion. The changed shape is called "tear drop" compared to the classical shape (Figure 4).
 Figure 3. A typical broken trace. |
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Short Failure: Solder Bridge
A solder bridge is actually a solder extrusion that takes place at the bump melting point. The solder bridge, as shown in Figure 5, forms a shorted circuit for the interconnection loop and causes the part to fail the open short test.
 Figure 4. Tear drop connection between the trace and pad. |
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There are many factors that can contribute to the forming of a solder bridge. Among those factors, which will be addressed as follows, underfill void needs special attention as our test has proven that this defect plays the most important role in causing a solder bridge.
Solder Flux — The amount of flux must be appropriate. Insufficient flux may cause incomplete cleaning of the solder pad on the substrate, but excessive flux will lead to solder directly flowing towards an adjacent bump and forming a solder extrusion or solder bridge. A recent test and production lot run showed that a drip or 1 second dripping time for flux dispense to the solder pad will control the amount flux at the appropriate level, preventing a solder bridge from occurring at the time of solder reflow for the bumping process.
 Figure 5. A solder bridge between adjacent bumps. |
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Underfill — It is thought that a solder bridge most likely forms at the time of bumping solder reflow due to excessive flux use, but testing has indicated that underfill void may be the major cause in most cases. In a recent test run, an X-ray check was performed after each process stage, including post-solder bumping, post-underfill dispensing, pre-solder ball mounting reflow and post-solder ball mounting reflow. The x-ray pictures in the test clearly show that where the void forms between adjacent solder bumpers right after underfill dispensing, a solder bridge tends to form by filling the void between the adjacent bumpers when the bumpers are heated up and the melting point during the solder ball reflow process. The key issue is to prevent underfill void from happening during underfill dispensing and the curing process. Several factors — such as underfill temperature and dispense pattern — need attention as follows.
Temperature — Both 90°C and 80°C are tried, and it is found that 90°C gives a better result. At 90°C, underfill is better softened and flows more freely to fill possible gaps between bumps.
Dispense Pattern — For an array pattern bump, which is used in this case, the underfill dispense rule, or pattern, does matter. During the test, two underfill dispense patterns, Pattern A and Pattern B, were examined and compared. The test results show that Pattern B ensured that underfill was able to better fill the space between adjacent bumps than Pattern A, so that void can be dramatically reduced. There were few voids during the test that formed in the right bottom area of the die but not between the adjacent bumps.
Results
The rate comparison is 15.5 percent open/short before improvement and 1.1 percent after improvement. Further effort along this direction can be taken to bring the fail rate down to under 0.5 percent.
AH-SAN KYU, senior director of manufacturing, and DICHEN JAMES HUA, senior packaging engineer, may be contacted at Integrated Silicon Solution Inc. (ISSI), e-mail: [email protected] and [email protected]. C.Y. Li, R&D project engineer, may be contacted at Advanced Semiconductor Engineering Inc. (ASE), e-mail: [email protected].