Michel Villemain, CEO, Presto Engineering, Inc.
The semiconductor industry is moving from a PC-centric, digital era to a communication and mobile world. This, combined with integration, is driving chips to interact more with the real world and to become increasingly analog. It has a profound impact on test and automated test equipment (ATE). Test equipment used to be rated by speed and timing accuracy, and priced by pins, but those are no longer defining features. The ability to support a wide range of analog and RF measurements is now the critical specification of a modern test solution.
Not so long ago the critical elements were the timing chip and the pin electronic IC. Both were advanced ASICs and defined the price of the equipment. Today, FPGAs support most speed and timing test requirements of current system on chip (SOC) devices, while bench instruments support most analog and RF demands. Bench systems are expensive and do not scale cost-effectively—especially for parallel test. The challenge is therefore to package instrumentation into application-specific test hardware that offers a cost-effective, per-channel solution that can be scaled into multi-site test solutions. The successful test solutions of tomorrow will be those that can offer a portfolio of dedicated analog and RF options, and provide variations as quickly as the market itself evolves.
The second major back-end transformation, driven by communication and mobility, is packaging. More analog circuitry means not only new, multidimensional packages (including 2.5D and 3D), but also more bare die that are directly integrated into modules. As traditional test flows include wafer sort (primarily for fab yield control) and final test (quality insurance), bare die require a known-good die flow implemented by wafer-level test (WLT). New standards (802.11ad, 100/400G) and new RF bands will require probe technologies that can support up to 90GHz, combining reliable ohmic contact (signal integrity) with a gentle mechanical touch–especially on aluminum pads used by SiGe and CMOS processes.
Addressing these two challenges, for quickly deployed, dedicated analog/RF test solutions and reliable probing technologies, will allow cost-effective semiconductor solutions, then, in turn, deployment in volume of high-speed, high-bandwidth electronics solutions for communication and mobility.