BY PETE SINGER, Editor-in-Chief
Applied Materials hosted a panel session in December in San Francisco during the International Electron Devices Meeting, titled: “Rethinking Scaling: New Paragdigms, New Approaches.”
My main takeaway was that scaling has we have come to know it over the last 30 years was driven by lithographic shrinks, and that’s come to an end. “Scaling has stopped. It’s clear, said Rama Divakaruni, technical executive, advanced process technology, research and systems inter- action, IBM Research.
That’s the bad news. The good news is that if we redefine scaling to include new approaches such as 3D struc- tures and packaging, there are many ways for scaling to continue to evolve. “Whatever technology we need to achieve the power, performance, cost and area scale performance required is what is called scaling,” said Raman Achutharaman, Corporate VP, etch business unit at Applied Materials, who was the panel moderator.
“We are going away from scaling just thinking of it as single dimension. Now scaling is getting into multiple dimen- sions as the end market drivers are evolving,” Achuth- araman said. New applications, whether it’s mobility, cloud computing, big data, autonomous cars, robotics, health care, and others are driving a need to look at new paradigms, he added. “We are in a cusp where on one hand people think the industry is becoming very challenging but on the other hand actually it’s pretty exciting because there are a lot more new applications coming up,” he said.
PR (Chidi) Chidambaram, VP of engineering, QCT Process Technology, Qualcomm, rightfully pointed out that the semiconductor industry is behind on meeting new consumer demands. “In a cell phone today, the digital has become less relevant simply because we effectively scaled the power and area but not really offered to solve any of the user experience demands,” he said. In the process, display and RF has started becoming bigger consumers of power, he said.
Chidambraram said the next big opportunities are in integration, including what he called “silicon in package” integration. “We are trying to look at putting together many of the pieces and integrating the system, but the truth is if you just took off the shelf any of our chips and stack them and there is really no power advantage that we can get right now as is. There has to be a lot more innovation that has to happen to to realize the benefit from this. That’s really the challenge,” he said.
Divakaruni said the “magic of scaling” the semicon- ductor enjoyed in the past increased performance (faster!), increased density (smaller!) and decreased cost per transistor (cheaper!). But in the FinFET era, he said scaling slowed. While performance increased (faster!), he gave only half credit to increase chip-level density (sorta smaller) and to decrease in transistor cost (sorta cheaper!). Quoting Meatlof lyrics from 1977, Divakruni said, “Now don’t be sad. ‘Casue two out of three ain’t bad.”