Category Archives: Applications

By Emir Demircan, Senior Manager Advocacy and Public Policy, SEMI Europe

With its leading research and development hubs, materials and equipment companies and chipmakers, the EU is in a strategic position in the global electronics value chain to support the growth of emerging applications such as autonomous driving, internet of things, artificial intelligence and deep learning. Underpinning the European electronics industry’s competitive muscle requires a new EU-wide strategy aimed at strengthening the value chain and connecting various players. Specializing and investing in key application segments, such as automotive where the EU enjoys a central place at global level, is crucial to help European electronics industry hold its ground.  In parallel, Europe’s production capabilities need bolstered, requiring effective use of Important Projects of Common European Interest (IPCEI).

On research, development and innovation (RD&I), the upcoming Framework Programme 9 (FP9) must provide unprecedented collaboration and funding opportunities to Europe’s electronics players. Concerning small and medium enterprises (SMEs) and startups, it is vital that EU policies are aligned with global trends and small and young companies benefit from a business-friendly regulatory framework. And as an overarching action, building a younger, bigger and more diverse talent pipeline is paramount for Europe to innovate in the digital economy.

Laith Altimime, President at SEMI Europe, opening speech at ISS Europe 2018

Laith Altimime, President at SEMI Europe, opening speech at ISS Europe 2018

These were the clarion messages that emerged from the Industry Strategy Symposium (ISS) Europe organized by SEMI in March, an event that brought together more than 100 industry, research and government representatives for in-depth discussions on strategies and innovations for Europe to compete globally. Here are the key takeaways:

1) Build a strong electronics value chain with a focus on emerging demands

In recent years the EU has focused on beefing up semiconductor production in Europe within the 2020-25 window, starting with the EU 10|100|20 Electronic Strategy of 2013. The strategy aims to secure about 20 percent of global semiconductor manufacturing by 2020 with the help of € 10 billion in public and private funding and € 100 billion investment from the industry. Today, Europe is not nearly on track to achieving this target. Supply-side policies have done little to help grow the EU semiconductor industry. Now is the time to change our thinking.

To nourish the electronics industry in Europe, we need to shift our focus to demand. Semiconductors are a key-enabling technology for autonomous driving, wearables, healthcare, virtual and augmented reality (VR/AR), artificial intelligence (AI) and all other internet of things (IoT) and big data applications. To become a world leader in the data economy and energize its semiconductor industry, Europe needs to start by better understanding the evolution of data technologies and their requirements from electronics players, then design and implement an EU-wide strategy focused on strengthening collaboration within the value chain.

2) Specialize and invest in Europe’s strengths that are enabled by electronics

Jens Knut Fabrowsky, Executive VP Automotive Electronics at Bosch

Jens Knut Fabrowsky, Executive VP Automotive Electronics at Bosch

Fueled by increasing demand for smaller, faster and more reliable products with greater power, the global electronics industry has developed a sophisticated global value chain. Europe brings to this ecosystem leading equipment and materials businesses, world-class R&D and education organizations, and key microelectronics hubs throughout Europe that are home to multinationals headquartered both in and outside of the EU. Nevertheless, global competition is growing ever fiercer in the sectors where the European microelectronics industry is most competitive: automotive, energy, healthcare and industrial automation. In the future, Europe is likely to be more challenged between the disruptive business models of North America and the manufacturing capacity of East Asia. The European electronics industry must re-evaluate its strengths and set a strategic direction.

Make no mistake: Europe is in a strong position to advance its microelectronics industry. The EU already boasts leading industries that rely on advances made by electronics design and manufacturing. Take the automotive industry – crucial to Europe’s prosperity. Accounting for 4 percent of the EU GDP and providing 12 million jobs in Europe, according to the European Commission, the EU automotive industry exerts an important multiplier effect in the economy. Automotive is essential to both upstream and downstream industries such as electronics – a level of importance not lost on the EU’s GEAR 2030 Group. Since the 1980s, automotive industry components have increasingly migrated from mechanical to electrochemical and electronics.

Today, electronic components represent close to a third of the cost of an automobile, a proportion that will grow to as high as 50 percent by 2030 with the rise of autonomous and connected vehicles. Automotive experts anticipate that over the next five to 10 years, new cars will feature at least some basic automated driving and data exchange capabilities as electronics deepen their penetration into the automotive value chain. Europe’s leadership position and competitive edge in automotive are under threat by competitors across the world as they invest heavily in information and communications technologies (ICT) and electronics for autonomous driving and connected vehicles. Investing in next-generation cars will help the European electronics industry retain its strong competitive position, as will investments in other key application areas such as healthcare, energy and industrial automation where Europe is a global power.

3) Make better use of Important Projects of Common European Interest (IPCEI)

Microelectronics is capital-intensive, with a state-of-the-art fab easily costing billions of euros. That’s why countries around the world are making heavy government-backed investments to build domestic fabs. For instance, China’s “Made in China 2025” initiative, which establishes an Integrated Circuit Fund to support the development of the electronics industry, calls for 150 billion USD in funding to replace imported semiconductors with homegrown devices. In 2014, the European Commission adopted new rules to IPCEI, giving Member States a tool for financing large, strategically important transnational projects. IPCEI should help Member States fill funding gaps to overcome market failures and reinvigorate projects that otherwise would not have taken off. To fully benefit from the IPCEI, the industry requires Member States involved in a specific IPCEI to work in parallel and at the same pace and faster approvals of state-supported manufacturing projects.

4) Use FP9 to strengthen Europe’s RD&I capabilities

Panel Discussion on growing Europe in the global value chain. (L-R) Bryan Rice, GLOBALFOUNDRIES; James Robson, Applied Materials Europe; Joe De Boeck, imec; Leo Clancy, IDA Ireland; James O’Riordan, S3; Colette Maloney, European Commission; Moderator: Andreas Wild

Panel Discussion on growing Europe in the global value chain. (L-R) Bryan Rice, GLOBALFOUNDRIES; James Robson, Applied Materials Europe; Joe De Boeck, imec; Leo Clancy, IDA Ireland; James O’Riordan, S3; Colette Maloney, European Commission; Moderator: Andreas Wild

A top EU priority in recent years has been to enhance Europe’s position as a world leader in the digital economy. Fulfilling this mission requires an innovative electronics industry in Europe. To this end, FP9 should encourage greater collaboration between large and small companies to leverage their complementary strengths – the dynamism, agility and innovation of smaller companies and the ability of larger companies to mature and scale new product ideas on the strength of their extensive private funding instruments and testing and demonstration facilities. Also, future EU-funded research actions should prioritize electronics projects involving players across the value chain, starting with materials and equipment providers and spanning chipmakers, system integrators and players from emerging “smart” verticals such as automotive, medical technology and energy. FP9 should also play the pivotal role of setting clear objectives, increasing investments, and easing rules for funding. These measures would help expand the European electronics ecosystem, accelerate R&D results and defray the rising costs of developing cutting-edge solutions key to the growth of emerging industry verticals.

5) Support high-tech SMEs, entrepreneurship and startups to become globally competitive

European SMEs, the backbone of EU’s manufacturing, are already strong players in the global economy, making outsize contributions to Europe’s innovation. Yet more of Europe’s small and young businesses with limited resources are challenged in Europe’s regulatory labyrinth. Only by improving the European regulatory environment in a way that supports young and small businesses can Europe fulfill its vision of a dynamic electronics ecosystem and digital economy. Access to finance must also be easier, particularly as underinvested startups struggle under a European venture capital apparatus that is smaller and more fragmented than those in North America and Asia. Early-stage funding instruments such as bank loans are essential for young businesses but they often face barriers to finance due to the sophistication of their proposed business models that are difficult to be understood and supported by banks.

One answer is to better familiarize Europe’s financial sector with industrial SMEs and startups so they can co-develop financial tools that support the growth of small and young businesses. Also, the narrow European definition of SME with staff headcount limited to 250 block innovative companies from access to financial tools exclusively provided to SMEs. By contrast, the United States defines SMEs as businesses with as many as 500 employees, placing their EU counterparts at distinct funding disadvantage. EU should ensure that its SME policy is aligned with global trends and industry needs.

6) Create a bigger and more diverse talent pipeline with a hybrid skills set 

Europe’s world-class education and research capabilities help supply the electronics industry with skilled workforce. Yet the blistering pace of technology innovation calls for rapidly evolving skills sets, a trend that has led to worker shortages at electronics companies and left the sector fighting to diversify its workforce and strengthen its talent pipeline. The deepening penetration of electronics in AI, IoT, AR/VR, high-performance computing (HPC), cybersecurity and smart verticals is giving rise to a new set of skills that blend production technologies, software and data analytics. As more technologies converge, the gap between university education and business needs continues to widen.

One solution is work-based learning – allowing students to build job skills in a setting related to their career pathway. Encouraging higher female participation in STEM education programs at the high school and university levels is also a must to overcome the traditionally low number of females entering high technology. To build on its reputation as “a place to work” in the eyes of the international job seekers, Europe also needs a more flexible immigration framework to attract skilled labour to high-tech jobs.

Save the Date: Industry leaders, research and government representatives will meet again next year at the ISS Europe organized by SEMI on 28-30 April 2019 in Milan, Italy. More details regarding the event will be published soon on www.semi.org/eu.

MarketResearch.biz has published a new report titled Global Internet of Things Market by Components (Hardware, Software, and Services), Application, and Region – Global Forecast to2026., which offers a holistic view of the global internet of things market through systematic segmentation that covers every aspect of the target market. The first five-year cumulative revenue (2017-2021) is projected to be US$ 7,760.8 billion, which is expected to increase rather significantly over the latter part of the five-year forecast period.

Internet of things (IoT) is combination of information technology (IT) with operational technology (OP) connected via virtual intelligence and interface used in various sectors to send, control, and receive data with/without human intervention. The technology simplifies human efforts and reduces need for manual interference. IoT is an interconnected system of mechanical systems, computing devices, and digital technology, devices, and human beings.

Rising demand for wireless technology, increasing adoption of smart wearables, and shift to automation by various industries are major factors driving growth of the global internet of things market. Increasing adoption of connected devices, smart wearables, and increasing number of high speed internet providers are further fueling growth of the global internet of things market.

In addition, increasing adoption of big data analytics and cloud based services and solutions in various sectors such as consumer electronics, manufacturing, healthcare, etc. are some other factors fueling growth of the global internet of things market. Increasing deployment of augmented reality and virtual reality in gaming is another factor expected to further propel growth of the global internet of things market.

Rising concerns related to data privacy and data security, leading to data theft and leakage is a major factor expected to hamper growth of the global internet of things market over the forecast period.  In addition, relatively increasing incidence of cyber-attacks and cyber breaches, and lack of standards for deployment IoT devices and products, and as the technology is in nascent stage there are complexities related to integration and interoperability of these technologies. This are some other factors hampering growth of the global internet of things market.

Development of smart cities by various government across the globe is another factor driving growth of the global internet of things market. This trend is expected to further drive growth of the global internet of things market to a significant extent over the forecast period. Moreover, technological advancements in related technologies & towards product development, and rising investment in IoT technology can create lucrative business opportunities for key vendors and major service providers in the global internet of things market over the forecast period.

The comprehensive research report comprises a complete forecast of the global internet of things market based on factors affecting the market and their impact in the foreseeable future. According to the forecast projections, revenue from the global internet of things market is expected to expand at a CAGR of 21.6% during the forecast period.

The research report on the global Internet of things market includes profiles of major companies such as Google Inc., Cisco Systems, Inc., IBM, Fujitsu Ltd., HP Inc., Dell Inc., Arm Limited, Intel Corporation, Infineon Technologies AG, and Infosys Limited.

The 2018 Symposia on VLSI Technology & Circuits will deliver a unique perspective into the technological ecosystem of converging industry trends – machine learning, IoT, artificial intelligence, wearable/implantable biomedical applications, big data, and cloud computing – the emerging technologies needed for ‘smart living.’ In a weeklong conference packed with technical presentations, a demonstration session, panel discussions, focus sessions, short courses, and a new “Friday Forum” on machine learning, the microelectronics industry’s premiere international conference covers technology, circuits, and systems with a range and scope unlike any other conference.

Built around the theme of “Technology, Circuits & Systems for Smart Living,” the Symposia programintegrates advanced technology developments, innovative circuit design, and the applications that they enable as part of our global society’s adoption of smart, connected devices and systems that change the way humans interact with each other.

Plenary Sessions (June 19):
The Symposia will open with two technology plenary sessions, including “Memory Technology: The Core to Enable Future Computing Systems” by Scott DeBoer, executive VP for technology development, Micron; and “Revolutionizing Cancer Genomic Medicine by Artificial Intelligence & Supercomputing with Big Data” by Satoru Miyano, director of the Human Genome Center, Institute of Medical Science at University of Tokyo.

The following Circuits plenary sessions include “Hardware-Enabled Artificial Intelligence” by Dr. Bill Dally, chief scientist & senior VP, Nvidia; and “Semiconductor Technologies Accelerate Our Future Vision: ‘ANSHIN Platform'” by Tsuneo Komatsuzaki, advisor, SECOM.

Focus Sessions (June 19, 20 & 21):
As part of the Symposia’s ongoing program integration, a series of joint focus sessions will be held to present contributed papers from the Technology and Circuits Symposia on June 20 and 21. Topics will include: “Heterogeneous System Integration,” “Power Devices & Circuits,” “New Devices & Systems for AI,” and “Design & Technology Co-Optimization (DTCO) in Advanced CMOS Technology.”

On June 19, the Technology focus sessions will include: “Back-End Compatible Devices & Advanced Thermal Management“ and “Sensors and Devices for IoT, Medicine, & Smart Living.” The Circuits focus sessions, held on June 21, include “Machine Learning Circuits & SoCs,” and “Advanced Wireline Techniques.”

Evening Panel Sessions (June 18 & 19):
A joint panel discussion, bringing together leading experts from Technology & Circuits programs will be held June 18 to answer the question, “Is the CPU Dying or Dead? Are Accelerators the Future of Computation?”

As Moore’s Law slows down and processor architecture innovations move away from single thread performance, the future of computing seems to be moving away from the general purpose CPU. Is the era of the CPU over? Will future CPUs simply coordinate activity among accelerators and other specialized processing units? The panel will examine future computing workloads as well as the innovative technology and circuit solutions that enable them, from moving computation closer to memory, and developing bio-inspired systems.

The Technology evening panel session panel discussion, held on June 19 will examine “Storage Class Memories: Who Cares? DRAM is Scaling Fine, NAND Stacking is Great.” Memory – DRAM and NAND scaling – though difficult, has persisted due to rapid innovations and continued engineering. Although there are new economic and fundamental challenges posed to continued memory scaling, a new class of memories – Storage Class memories, appears to bridge the latency gap that exists in the memory hierarchy and promises to improve system performance. Now the real question becomes – who really cares now? System architects, DRAM/NAND manufacturers? End users? The panel will discuss the challenges and opportunities of storage class memories in the environment where DRAM and NAND scaling continue.

The question to be addressed by the Circuits evening panel session, also held on June 19, is “What’s The Next Big Thing After Smartphones?” Although smartphones have driven the industry for more than a decade, the pace of innovation is slowing, and market saturation is occurring. What will be the next big thing? The Internet of Things? Automotive electronics? Virtual reality? Something else? A set of panelists with diverse expertise will discuss the possibilities.

Thursday Luncheon (June 21):
Continuing the Symposia’s tradition of thought-provoking presentations centered around the conference theme is the Thursday luncheon talk, entitled “The Hardware of The Mind, from Turing to Today,” by Grady Booch, chief scientist for software engineering at IBM Research. As scientists continue to the computing power of the human mind, they strive to bridge the gap between the physicality of silicon and the exquisite wonder of the brain. This presentation examines the journey of the hardware of the mind – from the Iliad, to da Vinci, to Edison, to Turing, to today – including an examination of how the growing understanding of the brain transforms the engineering of silicon, and how the laws of physics as well as the laws of humanity constrain that journey.

Full Day Short Courses (June 18):
The Technology Short Course – “Device & Integration Technologies for Sub-5nm CMOS & the Next Wave of Computing” will cover a range of topics, including CMOS technology beyond the 5nm node, MOL/BEOL interconnects, atomic-level analysis for FinFET & Nanowire design, 3D integration for image sensors, neuromorphic AI hardware, memory technologies for AI/machine learning, and sensors & analog devices for next generation computing.

The first Circuits Short Course – “Designing for the Next Wave of Cloud Computing” will address advanced computer architectures, GPU applications and FPGA acceleration, the evolution of memory and in-memory computation, and advanced packaging, power delivery and cooling for cloud computing, as well as the impact of quantum computing.

The second Circuits Short Course – “Bio-Sensors, Circuits & Systems for Wearable & Implantable Medical Devices” will cover circuits and systems for mobile healthcare, analog front-ends for bio-sensors, digital phenotyping using wearable sensors, bi-directional neural interfacing, body-area networking and body-coupled communications, ultrasound-on-a-chip, as well as a CMOS-based implantable retinal prosthesis.

Demonstration Session (June 18):
Following a successful launch last year in Kyoto, the popular demonstration session will again be part of the Symposia program, providing participants an opportunity for in-depth interaction with authors of selected papers from both Technology and Circuits sessions. These demonstrations will illustrate technological concepts and analyses through table-top presentations that show device characterization, chip operational results, and potential applications for circuit-level innovations.

Friday Forum (June 22):
New to the Symposia program this year will be the Friday Forum – a full-day series of presentations focusing on how technology and circuit designers engage in and drive the future of AI/machine learning systems, a subject area that continues to evolve as an impactful driver of the integrated systems that are part of the Symposia’s “Smart Living” theme. “Machine Learning Today & Tomorrow: A Technology, Circuits & Systems View” will provide the foundations and performance metrics for machine learning systems, an examination of advanced and emerging circuit architectures for next-generation systems, as well as highlighting tools and datasets for benchmarking and evaluating service-oriented architecture (SoA) machine learning systems.

The annual Symposium on VLSI Technology & Circuits will be held at the Hilton Hawaiian Village in Honolulu, Hawaii from June 18-22, 2018, with Short Courses held on June 18 and a special Friday Forum dedicated to machine learning/AI topics on June 22. The two conferences have been held together since 1987, providing an opportunity for the world’s top device technologists, circuit and system designers to exchange leading edge research on microelectronics technology, with alternating venues between Hawaii and Japan. A single registration enables participants to attend both Symposia.

POET Technologies Inc. (“POET”) (TSX Venture:PTK) (OTCQX:POETF), a designer, developer and manufacturer of optoelectronic devices, including light sources, passive wave guides and Photonic Integrated Circuits (PIC), today announced a master collaboration agreement with SilTerra, a Malaysia-based semiconductor wafer foundry, for the co-development of certain fabrication processes and the manufacturing of POET’s Optical Interposer Platform. The partnership is expected to accelerate the path to commercial production of the Optical Interposer, which will enable optical engines for single-mode transceiver modules and other high bandwidth devices.

Together, the companies will bring-up critical waveguide processes previously developed by POET for its Optical Interposer, and implement the process flows on newly purchased equipment at SilTerra’s world-class 8″ silicon foundry in Kulim, Malaysia. In support of this activity, SilTerra has agreed to assist financially with the purchase of specialized semiconductor fabrication and testing equipment, as well as to share certain costs associated with facilities enhancements and installation of equipment for manufacturing the Optical Interposer. Additionally, the collaboration includes a wafer purchase agreement for the manufacturing of prototype, initial production and volume production wafers.

POET’s Chief Executive Officer, Dr. Suresh Venkatesan, commented, “Following several months of preliminary collaborative work together, this agreement with SilTerra represents a significant milestone toward our goal of commercializing POET’s Optical Interposer Platform. The combined resources and investments of the two companies enables us to establish a unique manufacturing process as well as a reliable supply of wafers for our Optical Interposer. SilTerra offers POET a truly unique combination of advanced 90 nanometer lithography, cost-effective 8″ silicon processing copper metallization and MEMS capabilities, all of which are needed for our Optical Interposer. As a result of this partnership, POET has now secured a key element in the commercialization process allowing us to establish more engagements with prospective customers.”

Firdaus Abdullah, SilTerra’s Chief Executive Officer stated, “SilTerra is delighted to be working with POET in what we regard as a key strategic engagement to address the increasing need for cost-effective solutions for Data Center Interconnects through the innovative use of silicon in photonics.  POET’s Optical Interposer is a major advance over other approaches to optical interconnects and facilitates the co-packaging of electronics and photonics devices in a single Multi-Chip-Module (MCM). POET’s “Photonics-in-a-package” solution has the potential to address even larger markets in the future for the integration and co-optimization of ASIC’s and DSP’s with photonics at the interposer and chip level.  We at SilTerra look forward to a long and prosperous relationship between our two companies and our teams.”

The Master Collaboration Agreement between POET Technologies and SilTerra Malaysia Sdn Bhd was signed on April 6, 2018 and includes provisions for multiple co-development projects, consignment by POET of newly purchased equipment to be installed in SilTerra’s Malaysian foundry, various support services to be provided by SilTerra and the purchase of wafers containing Optical Interposer devices from SilTerra over an initial three-year term.

Silicon solar cells dominate the global photovoltaic market today with a share of 90 percent. With ever new technological developments, research and industry are nearing the theoretical efficiency limit for semiconductor silicon. At the same time, they are forging new paths to develop a new generation of even more efficient solar cells.

The Fraunhofer researchers achieved the high conversion efficiency of the silicon-based multi-junction solar cell with extremely thin 0.002 mm semiconductor layers of III-V compound semiconductors, bonding them to a silicon solar cell. To compare, the thickness of these layers is less than one twentieth the thickness of a human hair. The visible sunlight is absorbed in a gallium-indium-phosphide (GaInP) top cell, the near infrared light in gallium-arsenide (GaAs) and the longer wavelengths in the silicon subcell. In this way, the efficiency of silicon solar cells can be significantly increased.

Silicon-based multi-junction solar cell consisting of III-V semiconductors and silicon. The record cell converts 33.3 percent of the incident sunlight into electricity. © Fraunhofer ISE/Photo: Dirk Mahler

Silicon-based multi-junction solar cell consisting of III-V semiconductors and silicon. The record cell converts 33.3 percent of the incident sunlight into electricity.
© Fraunhofer ISE/Photo: Dirk Mahler

“Photovoltaics is a key pillar for the energy transformation,” says Dr. Andreas Bett, Institute Director of Fraunhofer ISE. “Meanwhile, the costs have decreased to such an extent that photovoltaics has become an economically viable competitor to conventional energy sources. This development, however, is not over yet. The new result shows how material consumption can be reduced through higher efficiencies, so that not only the costs of photovoltaics can be further optimized but also its manufacture can be carried out in a resource-friendly manner.

Already in November 2016, the solar researchers in Freiburg together with their industry partner EVG demonstrated an efficiency of 30.2 percent, increasing it to 31.3 percent in March 2017. Now they have succeeded once again in greatly improving the light absorption and the charge separation in silicon, thus achieving a new record of 33.3 percent efficiency. The technology also convinced the jury of the GreenTec Awards 2018 and has been nominated among the top three in the category “Energy.”

The Technology

For this achievement, the researchers used a well-known process from the microelectronics industry called “direct wafer bonding” to transfer III-V semiconductor layers, of only 1.9 micrometers thick, to silicon. The surfaces were deoxidized in a EVG580® ComBond® chamber under high vacuum with a ion beam and subsequently bonded together under pressure. The atoms on the surface of the III-V subcell form bonds with the silicon atoms, creating a monolithic device. The complexity of its inner structure is not evident from its outer appearance: the cell has a simple front and rear contact just as a conventional silicon solar cell and therefore can be integrated into photovoltaic modules in the same manner.

EVG ComBond automated high-vacuum wafer bonding platform (Photo courtesy of EV Group).

EVG ComBond automated high-vacuum wafer bonding platform
(Photo courtesy of EV Group).

The III-V / Si multi-junction solar cell consists of a sequence of subcells stacked on top of each other. So-called “tunnel diodes” internally connect the three subcells made of gallium-indium-phosphide (GaInP), gallium-arsenide (GaAs) and silicon (Si), which span the absorption range of the sun’s spectrum. The GaInP top cell absorbs radiation between 300 and 670 nm. The middle GaAs subcell absorbs radiation between 500 and 890 nm and the bottom Si subcell between 650 and 1180 nm, respectively. The III-V layers are first epitaxially deposited on a GaAs substrate and then bonded to a silicon solar cell structure. Here a tunnel oxide passivated contact (TOPCon) is applied to the front and back surfaces of the silicon. Subsequently the GaAs substrate is removed, a nanostructured backside contact is implemented to prolong the path length of light. A front side contact grid and antireflection coating are also applied.

On the way to the industrial manufacturing of III-V / Si multi-junction solar cells, the costs of the III-V epitaxy and the connecting technology with silicon must be reduced. There are still great challenges to overcome in this area, which the Fraunhofer ISE researchers intend to solve through future investigations. Fraunhofer ISE’s new Center for High Efficiency Solar Cells, presently being constructed in Freiburg, will provide them with the perfect setting for developing next-generation III-V and silicon solar cell technologies. The ultimate objective is to make high efficiency solar PV modules with efficiencies of over 30 percent possible in the future.

Project Financing

Dr. Roman Cariou, the young scientist and first author, was supported through the European Union with a Marie Curie Stipendium (HISTORIC, 655272). The work was also supported by the European Union within the NanoTandem project (641023) as well as by the German Federal Ministry for Economic Affairs and Energy BMWi in the PoTaSi project (FKZ 0324247).

Correction: A previous version of this article incorrectly state “imec” in the headline, instead of Fraunhofer ISE. Solid State Technology regrets the error.

Case Western Reserve University researchers achieve cat-like ‘hearing’ with device 10,000,000,000,000 times smaller than human eardrum

CLEVELAND-Researchers at Case Western Reserve University are developing atomically thin “drumheads” able to receive and transmit signals across a radio frequency range far greater than what we can hear with the human ear.

But the drumhead is tens of trillions times (10 followed by 12 zeros) smaller in volume and 100,000 times thinner than the human eardrum.

The advances will likely contribute to making the next generation of ultralow-power communications and sensory devices smaller and with greater detection and tuning ranges.

“Sensing and communication are key to a connected world,” said Philip Feng, an associate professor of electrical engineering and computer science and corresponding author on a paper about the work published March 30 in the journal Science Advances. “In recent decades, we have been connected with highly miniaturized devices and systems, and we have been pursuing ever-shrinking sizes for those devices.”

The challenge with miniaturization: Also achieving a broader dynamic range of detection, for small signals, such as sound, vibration, and radio waves.

“In the end, we need transducers that can handle signals without losing or compromising information at both the ‘signal ceiling’ (the highest level of an undistorted signal) and the ‘noise floor’ (the lowest detectable level),” Feng said.

While this work was not geared toward specific devices currently on the market, researchers said, it was focused on measurements, limits and scaling which would be important for essentially all transducers.

Those transducers may be developed over the next decade, but for now, Feng and his team have already demonstrated the capability of their key components-the atomic layer drumheads or resonators-at the smallest scale yet.

The work represents the highest reported dynamic range for vibrating transducers of their type. To date, that range had only been attained by much larger transducers operating at much lower frequencies-like the human eardrum, for example.

“What we’ve done here is to show that some ultimately miniaturized, atomically thin electromechanical drumhead resonators can offer remarkably broad dynamic range, up to ~110dB, at radio frequencies (RF) up to over 120MHz,” Feng said. “These dynamic ranges at RF are comparable to the broad dynamic range of human hearing capability in the audio bands.”

New dynamic standard

Feng said the key to all sensory systems-from naturally occurring sensory functions in animals to sophisticated devices in engineering-is that desired dynamic range.

Dynamic range is the ratio between the signal ceiling over the noise floor and is usually measured in decibels (dB).

Human eardrums normally have dynamic range of about 60 to 100dB in the range of 10Hz to 10kHz, and our hearing quickly decreases outside this frequency range. Other animals, such as the common house cat or beluga whale (see illustration), can have comparable or even wider dynamic ranges in higher frequency bands.

The vibrating nanoscale drumheads developed by Feng and his team are made of atomic layers of semiconductor crystals (single-, bi-, tri-, and four-layer MoS2 flakes, with thickness of 0.7, 1.4, 2.1, and 2.8 nanometers), with diameters only about 1 micron.

They construct them by exfoliating individual atomic layers from the bulk semiconductor crystal and using a combination of nanofabrication and micromanipulation techniques to suspend the atomic layers over micro-cavities pre-defined on a silicon wafer, and then making electrical contacts to the devices.

Further, these atomically thin RF resonators being tested at Case Western Reserve show excellent frequency “tunability,” meaning their tones can be manipulated by stretching the drumhead membranes using electrostatic forces, similar to the sound tuning in much larger musical instruments in an orchestra, Feng said.

The study also reveals that these incredibly small drumheads only need picoWatt (pW, 10^-12 Watt) up to nanoWatt (nW, 10^-9 Watt) level of RF power to sustain their high frequency oscillations.

“Not only having surprisingly large dynamic range with such tiny volume and mass, they are also energy-efficient and very ‘quiet’ devices”, Feng said, “We ‘listen’ to them very carefully and ‘talk’ to them very gently.”

Plastics are excellent insulators, meaning they can efficiently trap heat – a quality that can be an advantage in something like a coffee cup sleeve. But this insulating property is less desirable in products such as plastic casings for laptops and mobile phones, which can overheat, in part because the coverings trap the heat that the devices produce.

Now a team of engineers at MIT has developed a polymer thermal conductor — a plastic material that, however counterintuitively, works as a heat conductor, dissipating heat rather than insulating it. The new polymers, which are lightweight and flexible, can conduct 10 times as much heat as most commercially used polymers.

Researchers at MIT have designed a new way to engineer a polymer structure at the molecular level, via chemical vapor deposition. This allows for rigid, ordered chains, versus the messy, 'spaghetti-like strands' that normally make up a polymer. This chain-like structure enables heat transport both along and across chains. Credit: MIT News Office / Chelsea Turner

Researchers at MIT have designed a new way to engineer a polymer structure at the molecular level, via chemical vapor deposition. This allows for rigid, ordered chains, versus the messy, ‘spaghetti-like strands’ that normally make up a polymer. This chain-like structure enables heat transport both along and across chains. Credit: MIT News Office / Chelsea Turner

“Traditional polymers are both electrically and thermally insulating. The discovery and development of electrically conductive polymers has led to novel electronic applications such as flexible displays and wearable biosensors,” says Yanfei Xu, a postdoc in MIT’s Department of Mechanical Engineering. “Our polymer can thermally conduct and remove heat much more efficiently. We believe polymers could be made into next-generation heat conductors for advanced thermal management applications, such as a self-cooling alternative to existing electronics casings.”

Xu and a team of postdocs, graduate students, and faculty, have published their results today in Science Advances. The team includes Xiaoxue Wang, who contributed equally to the research with Xu, along with Jiawei Zhou, Bai Song, Elizabeth Lee, and Samuel Huberman; Zhang Jiang, physicist at Argonne National Laboratory; Karen Gleason, associate provost of MIT and the Alexander I. Michael Kasser Professor of Chemical Engineering; and Gang Chen, head of MIT’s Department of Mechanical Engineering and the Carl Richard Soderberg Professor of Power Engineering.

Stretching spaghetti

If you were to zoom in on the microstructure of an average polymer, it wouldn’t be difficult to see why the material traps heat so easily. At the microscopic level, polymers are made from long chains of monomers, or molecular units, linked end to end. These chains are often tangled in a spaghetti-like ball. Heat carriers have a hard time moving through this disorderly mess and tend to get trapped within the polymeric snarls and knots.

And yet, researchers have attempted to turn these natural thermal insulators into conductors. For electronics, polymers would offer a unique combination of properties, as they are lightweight, flexible, and chemically inert. Polymers are also electrically insulating, meaning they do not conduct electricity, and can therefore be used to prevent devices such as laptops and mobile phones from short-circuiting in their users’ hands.

Several groups have engineered polymer conductors in recent years, including Chen’s group, which in 2010 invented a method to create “ultradrawn nanofibers” from a standard sample of polyethylene. The technique stretched the messy, disordered polymers into ultrathin, ordered chains — much like untangling a string of holiday lights. Chen found that the resulting chains enabled heat to skip easily along and through the material, and that the polymer conducted 300 times as much heat compared with ordinary plastics.

But the insulator-turned-conductor could only dissipate heat in one direction, along the length of each polymer chain. Heat couldn’t travel between polymer chains, due to weak Van der Waals forces — a phenomenon that essentially attracts two or more molecules close to each other. Xu wondered whether a polymer material could be made to scatter heat away, in all directions.

Xu conceived of the current study as an attempt to engineer polymers with high thermal conductivity, by simultaneously engineering intramolecular and intermolecular forces — a method that she hoped would enable efficient heat transport along and between polymer chains.

The team ultimately produced a heat-conducting polymer known as polythiophene, a type of conjugated polymer that is commonly used in many electronic devices.

Hints of heat in all directions

Xu, Chen, and members of Chen’s lab teamed up with Gleason and her lab members to develop a new way to engineer a polymer conductor using oxidative chemical vapor deposition (oCVD), whereby two vapors are directed into a chamber and onto a substrate, where they interact and form a film. “Our reaction was able to create rigid chains of polymers, rather than the twisted, spaghetti-like strands in normal polymers.” Xu says.

In this case, Wang flowed the oxidant into a chamber, along with a vapor of monomers – individual molecular units that, when oxidized, form into the chains known as polymers.

“We grew the polymers on silicon/glass substrates, onto which the oxidant and monomers are adsorbed and reacted, leveraging the unique self-templated growth mechanism of CVD technology,” Wang says.

Wang produced relatively large-scale samples, each measuring 2 square centimeters – about the size of a thumbprint.

“Because this sample is used so ubiquitously, as in solar cells, organic field-effect transistors, and organic light-emitting diodes, if this material can be made to be thermally conductive, it can dissipate heat in all organic electronics,” Xu says.

The team measured each sample’s thermal conductivity using time-domain thermal reflectance — a technique in which they shoot a laser onto the material to heat up its surface and then monitor the drop in its surface temperature by measuring the material’s reflectance as the heat spreads into the material.

“The temporal profile of the decay of surface temperature is related to the speed of heat spreading, from which we were able to compute the thermal conductivity,” Zhou says.

On average, the polymer samples were able to conduct heat at about 2 watts per meter per kelvin – about 10 times faster than what conventional polymers can achieve. At Argonne National Laboratory, Jiang and Xu found that polymer samples appeared nearly isotropic, or uniform. This suggests that the material’s properties, such as its thermal conductivity, should also be nearly uniform. Following this reasoning, the team predicted that the material should conduct heat equally well in all directions, increasing its heat-dissipating potential.

Going forward, the team will continue exploring the fundamental physics behind polymer conductivity, as well as ways to enable the material to be used in electronics and other products, such as casings for batteries, and films for printed circuit boards.

“We can directly and conformally coat this material onto silicon wafers and different electronic devices” Xu says. “If we can understand how thermal transport [works] in these disordered structures, maybe we can also push for higher thermal conductivity. Then we can help to resolve this widespread overheating problem, and provide better thermal management.”

More than Moore (MtM) wafer demand reached almost 45 million 8-inch eq wafers in 2017. The wafer demand is expected to reach more than 66 million 8-inch eq. wafers by 2023, with an almost 10% CAGR between 2017 and 2023. According to Yole Développement (Yole)’s definition, the MtM applications include MEMS & sensors, CIS , and power, along with RF devices.

For the first time, the market research and strategy consulting company Yole announces a global technology & market analysis dedicated to the MtM industry. The Wafer Starts for More Than Moore Applications report is the first part of a valuable series that will be released all year long.

“Yole’s analysts are part of the powerful semiconductor community”, explains Emilie Jolivet, Director, Semiconductor and Software at Yole. “Their daily interactions with leading companies allow them to collect a large amount of relevant data and cross their vision of market segments’ evolution and technology breakthroughs. Wafer Starts for More Than Moore Applications report is the first opportunity to get an overview of the MtM industry based on a 20-year expertise.”

“Numerous megatrend market drivers will contribute to MtM devices’ growth”, confirms Amandine Pizzagalli, Technology & Market Analyst, Semiconductor Manufacturing at Yole. “The megatrends are covering the following market segments: 5G including wireless infrastructure & mobile, mobile with additional functionalities, voice processing, smart automotive, AR/VR and AI.”

What is the status of the MtM wafer demand? Which market drivers will contribute to the growth of MtM devices? Which semiconductor substrate materials and wafer diameter dominate the MtM industry today? What are Yole’s expectations for the next 5 years? The analysts propose you a comprehensive analysis of the MtM wafer demand market.

Driven by the increasing deployment of renewable energy sources , and industrial motor drives, as well as the growing EV/HEVs industry, power devices’ wafer market size will grow at an almost 13% CAGR from 2017 to 2023. In 2017, it accounted for more than 60% of overall MtM wafer starts. According to Yole’s analysts, it will continue dominating the MtM industry.

In parallel, 5G, a hot topic today, will likely be a huge part of the MtM evolution, bringing any service to any user anywhere, but also requiring new antennas, along with filtering functionality. These stringent requirements will lead to increasing demand for RF components like RF filters, PAs , and LNAs to ensure access to tomorrow’s radio network.

Meanwhile, the demand for advanced mobile applications that integrate more functionalities will require aggregating more and more devices such as fingerprint sensors, ambient light sensors, 3D sensing, microphones, and inertial MEMS devices. This will, in the near future, contribute to strong wafer growth in the MEMS & sensors wafer market. Additionally, smart automobiles have reached a new level of complexity requiring the development and integration of new sensors. As such, Yole expects smart automobiles to drive consistent growth of CIS and sensor wafer production over the next five years, fueled by the expanding integration of high-value sensing modules like radar, imaging, and LiDAR. Although automotive will be mainly supported by these growth areas, classical MEMS & sensors such as MEMS pressure sensors and inertial MEMS will still continue growing at a reasonable rate, supporting the standard automotive world.

Yole’s investigations are based on numerous discussions with leading semiconductor players. Applied Materials Inc. is part of them. Amandine Pizzagalli recently had the opportunity to debate with Mike Rosa, Head of Marketing, 200mm Equipment Products Group (EPG) at Applied Materials. During this discussion, both exchanged their vision of the MtM industry and its evolution.

“Today, while many of these technologies exist on 200mm and below wafer sizes much of this business falls within the purview of the 200mm Equipment Product Group”, explains Mike Rosa from Applied Materials. “With the exception of Power Bipolar-CMOS-DMOS (BCD) and some Discretes, 2.5D Interposer, CMOS Image Sensors and some Photonics devices in the market – all other technologies in the MtM segment are manufactured on 200mm and 150mm wafer sizes today. So, to support our customers on current and future wafer size requirements, we work across the company to share the domain knowledge acquired, for example in the 200mm group on MEMS or Discrete Power, with the 300mm group in order to ensure continuity of technology development onto the larger wafer sizes.”

The full interview is available on i-micronews.com, semiconductor manufacturing news or click Here.

In terms of wafer size, the MtM wafer market is dominated by the 6-inch wafer format, followed by the 8-inch size, which is mostly supported by power device applications. However, though 6-inch will continue increasing in the next few years, its share will decrease compared to 8-inch. “We expect 8-inch wafer diameter to progress significantly and surpass the 6-inch wafer size by 2023”, explains Amandine Pizzagalli from Yole. And she adds: “This transition will be driven first by power and MEMS & sensor applications, where the vast majority will convert their components from 6-inch to 8-inch over the next five years due to increasing volume production.”

Nevertheless, 12-inch will represent the fastest growth from 2017 to 2023, with a 15% CAGR. The 12-inch wafer demand should also grow from 3.3 million units in 2017 to 7.5 million in 2023, mainly fueled by BSI CIS (Including 3D stacked BSI, 3D hybrid BSI).

On the other side, 4-inch wafer diameter is in large demand today for MtM applications driven by RF SAW filter products. However, 4-inch’s adoption will decrease due to the transition from 4-inch to 6-inch for these applications. Yole still sees some MtM products manufactured in wafer sizes below 4-inch, i.e. 3-inch and 2-inch wafer formats. However, these represent a very small volume, and the analysts expect such sizes to die out, aside from small volumes still used for producing MEMS, power, and RF SAW devices.

The Wafer Starts for More Than Moore Applications report is the first research performed by Yole’s analysts, gathering all the wafer starts markets for MtM applications. Yole’s market forecast methodology is based on both top bottom and a bottom up approach with dozens of interviews of companies across the entire semiconductor value chain. With this report, the company proposes an assessment of the wafers market for MEMS & Sensors, CIS, power and RF devices. This analysis reveals the market metrics at wafer market level for the whole MtM industry from 2017-2023. It evaluates market developments in terms of market size, substrate sizes/formats, and by MtM application.

Yole’s report also discloses the competitive landscape with key players in technology development and manufacturing. A detailed analysis of the key market drivers that will shape the MtM market in the future are also part of this technology & market report.

A novel invention by a team of researchers from the National University of Singapore (NUS) holds promise for a faster and cheaper way to diagnose diseases with high accuracy. Professor Zhang Yong from the Department of Biomedical Engineering at the NUS Faculty of Engineering and his team have developed a tiny microfluidic chip that could effectively detect minute amounts of biomolecules without the need for complex lab equipment.

Diseases diagnostics involves detection and quantification of nano-sized bio-particles such as DNA, proteins, viruses, and exosomes (extracellular vesicles). Typically, detection of biomolecules such as proteins are performed using colorimetric assays or fluorescent labelling with a secondary antibody for detection, and requires complex optical detection equipment such as fluorescent microscopy or spectrophotometry.

One alternative to reduce cost and complexity of disease detection is the adoption of label-free techniques, which are gaining traction in recent times. However, this approach requires precision engineering of nano-features (in a detection chip), complex optical setups, novel nano-probes (such as graphene oxide, carbon nanotubes, and gold nanorods) or additional amplification steps such as aggregation of nanoparticles to achieve sensitive detection of biomarkers.

“Our invention is an example of disruptive diagnostics. This tiny biochip can sensitively detect proteins and nano-sized polymer vesicles with a concentration as low as 10ng/mL (150 pM) and 3.75μg/mL respectively. It also has a very small footprint, weighing only 500 mg and is 6mm³ in size. Detection can be performed using standard laboratory microscopes, making this approach highly attractive for use in point-of-care diagnostics,” explained Prof Zhang.

His team, comprising Dr Kerwin Kwek Zeming and two NUS PhD students Mr Thoriq Salafi and Ms Swati Shikha, published their findings in scientific journal Nature Communications on 28 March 2018.

Novel approach for disease diagnosis

This novel fluorescent label-free approach uses the lateral shifts in the position of the microbead substrate in pillar arrays, for quantifying the biomolecules, based on the change in surface forces and size, without the need of any external equipment. Due to the usage of lateral displacement, the nano-biomolecules can be detected in real-time and the detection is significantly faster in comparison to fluorescent label based detection.

“These techniques can also be extended to many other types of nano-biomolecules, including nucleic acid and virus detection. To complement this chip technology, we are also developing a portable smartphone-based accessory and microfluidic pump to make the whole detection platform portable for outside laboratory disease diagnostics. We hope to further develop this technology for commercialisation,” said Prof Zhang.

Synopsys, Inc. (Nasdaq: SNPS) today announced it has acquired Silicon and Beyond Private Limited, a provider of high-speed SerDes technology used in data intensive applications such as machine learning, cloud computing, and networking. This acquisition demonstrates Synopsys’ continued focus on next-generation SerDes solutions, addressing the need for greater amounts of reliable data transfer between chips, backplane, and extended range optical interconnects. The acquisition also adds a team of R&D engineers with high-speed SerDes expertise to help designers meet their evolving design requirements.

The terms of the deal, which is not material to Synopsys financials, are not being disclosed.

“Silicon and Beyond’s high-speed SerDes technology enables designers to implement reliable, high-speed connectivity across long-reach channels in high-end computing applications,” said Joachim Kunkel, general manager of the Solutions Group at Synopsys. “This acquisition underscores Synopsys’ commitment to expanding our DesignWare IP portfolio to help designers meet the challenging bandwidth and power requirements of advanced data-intensive SoCs.”

Synopsys is a provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems.