Category Archives: Applications

Scientists from Australia and China have drawn on the durable power of gold to demonstrate a new type of high-capacity optical disk that can hold data securely for more than 600 years.

The technology could offer a more cost-efficient and sustainable solution to the global data storage problem while enabling the critical pivot from Big Data to Long Data, opening up new realms of scientific discovery.

The recent explosion of Big Data and cloud storage has led to a parallel explosion in power-hungry data centres. These centres not only use up colossal amounts of energy – consuming about 3 per cent of the world’s electricity supply – but largely rely on hard disk drives that have limited capacity (up to 2TB per disk) and lifespans (up to two years).

Now scientists from RMIT University in Melbourne, Australia, and Wuhan Institute of Technology, China, have used gold nanomaterials to demonstrate a next-generation optical disk with up to 10TB capacity – a storage leap of 400 per cent – and a six-century lifespan.

The technology could radically improve the energy efficiency of data centres – using 1000 times less power than a hard disk centre – by requiring far less cooling and doing away with the energy-intensive task of data migration every two years. Optical disks are also inherently far more secure than hard disks.

Lead investigator, RMIT University’s Distinguished Professor Min Gu, said the research paves the way for the development of optical data centres to address both the world’s data storage challenge and support the coming Long Data revolution.

“All the data we’re generating in the Big Data era – over 2.5 quintillion bytes a day – has to be stored somewhere, but our current storage technologies were developed in different times,” Gu said.

“While optical technology can expand capacity, the most advanced optical disks developed so far have only 50-year lifespans.

“Our technique can create an optical disk with the largest capacity of any optical technology developed to date and our tests have shown it will last over half a millennium.

“While there is further work needed to optimise the technology – and we’re keen to partner with industrial collaborators to drive the research forward – we know this technique is suitable for mass production of optical disks so the potential is staggering.”

The world is shifting from Big Data towards Long Data, which enables new insights to be discovered through the mining of massive datasets that capture changes in the real world over decades and centuries.

Lead author, Senior Research Fellow Dr Qiming Zhang from RMIT’s School of Science, said the new technology could expand horizons for research by helping to advance the rise of Long Data.

“Long Data offers an unprecedented opportunity for new discoveries in almost every field – from astrophysics to biology, social science to business – but we can’t unlock that potential without addressing the storage challenge,” Zhang said.

“For example, to study the mutation of just one human family tree, 8 terabytes of data is required to analyse the genomes across 10 generations. In astronomy, the Square Kilometre Array (SKA) radio telescope produces 576 petabytes of raw data per hour.

“Meanwhile the Brain Research through Advancing Innovative Neurotechnologies (BRAIN) Initiative to ‘map’ the human brain is handling data measured in yottabytes, or one trillion terabytes.

“These enormous amounts of data have to last over generations to be meaningful. Developing storage devices with both high capacity and long lifespan is essential, so we can realise the impact that research using Long Data can make in the world.”

The novel technique behind the technology – developed over five years – combines gold nanomaterials with a hybrid glass material that has outstanding mechanical strength.

The research progresses earlier groundbreaking work by Gu and his team that smashed through the seemingly unbreakable optical limit of blu-ray and enabled data to be stored across the full spectrum of visible light rays.

How it works

The researchers have demonstrated optical long data memory in a novel nanoplasmonic hybrid glass matrix, different to the conventional materials used in optical discs.

Glass is a highly durable material that can last up to 1000 years and can be used to hold data, but has limited storage capacity because of its inflexibility.

The team combined glass with an organic material, halving its lifespan but radically increasing capacity.

To create the nanoplasmonic hybrid glass matrix, gold nanorods were incorporated into a hybrid glass composite, known as organic modified ceramic.

The researchers chose gold because like glass, it is robust and highly durable. Gold nanoparticles allow information to be recorded in five dimensions – the three dimensions in space plus colour and polarisation.

The technique relies on a sol-gel process, which uses chemical precursors to produce ceramics and glasses with better purity and homogeneity than conventional processes.

 

Magnolia Optical Technology, Inc. announced that it is working with the Defense Advanced Research Projects Agency (DARPA) under the Phase II SBIR Program for Development of High-Performance Thin-Film Solar Cells for Portable Power Applications (Contract No D15PC00222).

Photovoltaic devices can provide a portable source of electrical power for a wide variety of defense and commercial applications, including mobile power for dismounted soldiers, unmanned aerial vehicles, and remote sensors.

“The goal of the current program is to develop high-efficiency GaAs-based solar cells that maintain their performance over changing environmental conditions, and that are thinner and thus more cost-effective to produce,” said Dr. Roger Welser, Magnolia’s Chief Technical Officer. “By combining thin III-V absorbers with advanced light-trapping structures, single-junction GaAs-based devices provide a means to deliver high efficiency performance over a wide range of operating conditions at a fraction of the cost of the multi-junction structures typically employed for space power. In addition, the incorporation of nano-enhanced III-V absorbers provides a pathway to extend infrared absorption and increase the photovoltaic power conversion efficiency of cost-effective thin-film solar cells.”

Dr. Ashok Sood, President of Magnolia stated “changes in the solar spectrum can dramatically degrade the performance of traditional multi-junction devices – changes that occur naturally throughout the day, from season to season, and from location to location as sunlight passes through the earth’s atmosphere. Moreover, multi-junction III-V cells require thick, complex epitaxial layers and are therefore inherently expensive to manufacture. The technology under development as part of this DARPA-funded program addresses these key weaknesses in the established high-performance photovoltaic technology. The photovoltaic market is a rapidly growing segment of the energy industry with a wide range of commercial and defense applications.”

Magnolia specializes in developing optical technologies for defense and commercial applications. Based in Woburn, MA, Magnolia develops both thin film and nanostructure-based technologies that cover the ultraviolet, visible, and infrared part of the spectrum. These technologies are developed for use in advanced military sensors and other commercial applications including solar cells.

By Jay Chittooran, SEMI Public Policy

Following through on his 2016 campaign promise, President Trump is implementing trade policies that buck conventional wisdom in Washington, D.C. and among U.S. businesses. Stiff tariffs and the dismantling of longstanding trade agreements – cornerstones of these new actions – will ripple through the semiconductor industry with particularly damaging effect. China, a chief target of criticism from President Trump, has again found itself in the crosshairs of the administration, with trade tensions rising to a fever pitch.

The Trump Administration has long criticized China for what it considers unfair trade practices, often zeroing in on intellectual property. In August 2017, the Office of the U.S. Trade Representative (USTR), charged with developing and recommending U.S trade policy to the president, launched a Section 301 investigation into whether China’s practice of forced technology transfer has discriminated against U.S. firms. As the probe continues, it is becoming increasingly clear that the United States will impose tariffs on China based on its current findings. Reports suggest that the tariffs could come soon, hitting a range of products from consumer electronics to toys. Other measures could include tightening restrictions on the trade of dual-use goods – those with both commercial and military applications – curbing Chinese investment in the United States, and imposing strict limits on the number of visas issued to Chinese citizens.

With China a major and intensifying force in the semiconductor supply chain, raising tariffs hangs like the Sword of Damocles over the U.S. and global economies. A tariff-ignited trade war with China could stifle innovation, undermine the long-term health of the semiconductor industry, and lead to unintended consequences such as higher consumer prices, lower productivity, job losses and, on a global scale, a brake on economic growth.

Other recently announced U.S. trade actions could also cloud the future for semiconductor companies. The Trump administration, based on two separate Section 232 investigations claiming that overproduction of both steel and aluminum are a threat to U.S. national security, recently levied a series of tariffs and quotas on every country except Canada and Mexico. While these tariffs have yet to take effect, the mere prospect has angered U.S. trading partners – most notably Korea, the European Union and China. Several countries have threatened retaliatory action and others have taken their case to the World Trade Organization.

Trade is oxygen to the semiconductor industry, which grew by nearly 30 percent last year and is expected to be valued at an estimated $1 trillion by 2030. Make no mistake: SEMI fully supports efforts to buttress intellectual property protections. However, the Trump administration’s unfolding trade policy could antagonize U.S. trade partners.

For its part, SEMI is weighing in with USTR on these issues, underscoring the critical importance of trade to the semiconductor industry as we educate policymakers on trade barriers to industry growth and encourage unobstructed cross-border commerce to advance semiconductors and the emerging technologies they enable. On behalf of our members, we continue our work to increase global market access and lessen the regulatory burden on global trade. If you are interested in more information on trade, or how to be involved in SEMI’s public policy program, please contact Jay Chittooran, Public Policy Manager, at [email protected].

Originally published on the SEMI blog.

SEMICON West, the flagship U.S. event for connecting the electronics manufacturing supply chain, has opened registration for the July 10-12, 2018, exposition at the Moscone Center in San Francisco, California. Building on a year of record-breaking industry growth, SEMICON West 2018 will highlight the engines of future industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

Themed BEYOND SMART, SEMICON West 2018 sets it sights on the growing impact of cognitive learning technologies and other industry disruptors with programs and new Smart Pavilions including Smart Manufacturing and Smart Transportation to showcase interactive technologies for immersive, virtual experiences. Each Pavilion will feature a Meet the Experts Theater with an intimate setting for attendees to engage informally with industry thought leaders.

Smart Workforce Pavilion: Connecting Next-Generation Talent with the Microelectronics Industry

The SEMI Smart Workforce Pavilion at SEMICON West 2018 leverages the largest microelectronic manufacturing event in North America to draw the next generation of innovators. Reliant on a highly skilled workforce, the industry today is saddled with thousands of job openings and fierce competition for workers, bringing renewed focus to strengthening its talent pipeline. Educational and engaging, the Pavilion connects the microelectronics industry with college students and entry-level professionals interested in career opportunities.

In the Workforce Pavilion “Meet the Experts” Theater, industry engineers will share insights and inspiration about their personal working experiences and career advisors will offer best practices. Recruiters from top companies will be available for on-the-spot interviews, while career coaches offer mentoring, tips on cover letter and resume writing, job-search guidance, and more. Visitors will learn more about the industry’s vital role in technological innovation in today’s connected world.

This year, SEMI will also host High Tech U (HTU) in conjunction with the SEMICON West Smart Workforce Pavilion. The highly-interactive program supported by Advantest, Edwards, KLA-Tencor and TEL exposes high school students to STEM education pathways and stimulates excitement about careers in the industry.

Free registration with three-day access and shuttle service to SEMICON West are available to all college students. Students are encouraged to register for the mentor program, attend keynotes and tour the exposition hall to see everything the industry has to offer.  To learn more, visit Smart Workforce Pavilion and College Track to preview how students can enter to win a $500 hiring bonus!

Three Ways to Experience the Expo

Attendees can tailor their SEMICON West experience to meet their specific interests. The All-In pass covers every program and event, while the Thought-Leadership and Expo-Only packages offer scaled pricing and program options. Attendees can also purchase select events and programs à la carte, including exclusive IEEE-sponsored sessions, the SEMI Market Symposium, and the STEM Rocks After-hours Party, a fundraising event to support the SEMI Foundation.

CEA-Leti, a French technology research institute of the CEA and Inac, a joint fundamental research institute between the CEA and the University Grenoble Alpes, today announced a breakthrough towards large-scale fabrication of quantum bits, or qubits, the elementary bricks of future quantum processors. They demonstrated on a 300 mm pre-industrial platform a new level of isotopic purification in a film deposited by chemical vapor deposition (CVD). This enables creating qubits in thin layers of silicon using a very high purity silicon isotope, 28Si, which produces a crystalline quality comparable to thin films usually made of natural silicon.

“Using the isotope 28Si instead of natural silicon is crucial for the optimization of the fidelity of the silicon spin qubit,” said Marc Sanquer, a research director at Inac. “The fidelity of the spin qubit is limited to small values by the presence of nuclear spins in natural silicon. But spin qubit fidelity is greatly enhanced by using 28Si, which has zero nuclear spin. We expect to confirm this with qubits fabricated in a pre-industrial CMOS platform at CEA-Leti.” 

Qubits are the building blocks of quantum information. They can be made in a broad variety of material systems, but when it comes to the crucial issue of large-scale integration, the range of possible choices narrows significantly. Silicon spin qubits have a small size and are compatible with CMOS technology. They therefore present advantages for large-scale integration compared to other types of qubits.

Since 2012, when the first qubits that relied on electron spins were reported, the introduction of isotopically purified 28Si has led to significant enhancement of the spin coherence time. The longer spin coherence lasts, the better the fidelity of the quantum operations.

Quantum effects are essential to understanding how basic silicon micro-components work, but the most interesting quantum effects, such as superposition and entanglement, are not used in circuits. The CEA-Leti and Inac results showed that these effects can be implemented in CMOS transistors operated at low temperature.

CEA-Leti and Inac previously reported preliminary steps for demonstrating a qubit in a process utilizing a natural silicon-on-insulator (SOI) 300 mm CMOS platform1. The qubit is an electrically controlled spin carried by a single hole in a SOI transistor. In a paper published in npj Quantum Information2., CEA-Leti and Inac reported that an electron spin in a SOI transistor can also be manipulated by pure electrical signals, which enable fast and scalable spin qubits.

“To progress towards a practical and useful quantum processor, it is now essential to scale up the qubit,” said Louis Hutin, a research engineer in CEA-Leti’s Silicon Components Division. “This development will have to address variability, reproducibility and electrostatic control quality for elementary quantum bricks, as is done routinely for standard microprocessors.”

To help CEA-Leti and Inac leverage nuclear spin free silicon in the CMOS platform, a silicon precursor was supplied by Air Liquide, using an isotopically purified silane of very high isotopic purity with a 29Si isotope content of less than 0.00250 percent, prepared by the Institute of Chemistry of High-Purity Substances at the Russian Academy of Sciences. The 29Si isotope is present at 4.67 percent in natural silicon and is the only stable isotope of silicon that carries a nuclear spin limiting the qubit coherence time.

A secondary ion mass spectrometry (SIMS) analysis done on the CVD-grown layer using this purified silane precursor showed29Si concentration less than 0.006 percent, and 30Si less than 0.002 percent, while 28Si concentration was more than 99.992 percent. These unprecedented levels of isotopic purification for a CVD-grown epilayer on 300 mm substrates are associated with surfaces that are smooth at the atomic scale, as verified by atomic force microscopy (AFM), haze and X-ray reflectometry measurements.

Leveraging their scientific and technological expertise, and the specific opportunities associated with the 300 mm silicon platform on the Minatec campus, CEA-Leti and Inac will continue to contribute to the scientific, technological and industrial dynamic on quantum technologies, enhanced by the implementation of the EC’s FET Flagships initiative in this domain.

  1. “A CMOS silicon spin qubit”, arXiv:1605.07599 Nature Communications 7, Article number: 13575 (2016) doi:10.1038/ncomms13575
  1. “Electrically driven electron spin resonance mediated by spin-valley-orbit coupling in a silicon quantum dot”, Nature PJ Quantum Information (2018) 4:6; doi:10.1038/s41534-018-0059-1

The ConFab — an executive invitation-only conference now in its 14th year — brings together influential decision-makers from all parts of the semiconductor supply chain for three days of thought-provoking talks and panel discussions, networking events and select, pre-arranged breakout business meetings.

In the 2018 program, we will take a close look at the new applications driving the semiconductor industry, the technology that will be required at the device and process level to meet new demands, and the kind of strategic collaboration that will be required. It is this combination of business, technology and social interactions that make the conference so unique and so valuable. Browse this slideshow for a look at this year’s speakers, keynotes, panel discussions, and special guests.

Visit The ConFab’s website for a look at the full, three-day agenda for this year’s event.

KEYNOTE: How AI is Driving the New Semiconductor Era

Rama Divakaruni_June_2014presented by Rama Divakaruni, Advanced Process Technology Research Lead, IBM

The exciting results of AI have been fueled by the exponential growth in data, the widespread availability of increased compute power, and advances in algorithms. Continued progress in AI – now in its infancy – will require major innovation across the computing stack, dramatically affecting logic, memory, storage, and communication. Already the influence of AI is apparent at the system-level by trends such as heterogeneous processing with GPUs and accelerators, and memories with very high bandwidth connectivity to the processor. The next stages will involve elements which exploit characteristics that benefit AI workloads, such as reduced precision and in-memory computation. Further in time, analog devices that can combine memory and computation, and thus minimize the latency and energy expenditure of data movement, offer the promise of orders of magnitude power-performance improvements for AI workloads. Thus, the future of AI will depend instrumentally on advances in devices and packaging, which in turn will rely fundamentally on materials innovations.

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Imec, a research and innovation hub in nanoelectronics and digital technologies, today presented its annual Lifetime of Innovation Award to Dr. Irwin Jacobs, Founding Chairman and CEO Emeritus of Qualcomm. The annual industry honor is presented to the individual who has significantly advanced the field of semiconductor technology.  The formal presentation will be made at the global Imec Technology Forum (ITF) in May in Belgium.

In making the announcement, Luc Van den hove, president and CEO of imec, said: “Irwin Jacobs’ many technological contributions laid the groundwork for creating the mobile industry and markets that we know today. Under his leadership, Qualcomm developed two-way mobile satellite communications and tracking systems deemed the most advanced in the world. He pioneered spread-spectrum technology and systems using CDMA (code division multiple access), which became a digital standard for cellular phone communications. Together, these technologies opened mobile communications to the global consumer market.”

Irwin Jacobs began his career first as an assistant and then associate professor of electrical engineering at MIT and, later, as professor of computer science and engineering at the University of California in San Diego. While at MIT, he co-authored Principles of Communication Engineering, a textbook still in use. He began his corporate life as a cofounder of Linkabit, which developed satellite encryption devices.  In 1985, he co-founded Qualcomm, serving as CEO until 2005 and chairman through 2009.  His numerous awards include the National Medal of Technology, the Marconi Prize, and the Carnegie Medal of Philanthropy.  His honors include nine honorary degrees including doctor of engineering from the National Tsing Hua University, Taiwan.

Imec initiated the Lifetime of Innovation Award in 2015 at their annual global forum known as ITF (Imec Technology Forum).  The award marks milestones that have transformed the semiconductor industry.  The first recipient was Dr. Morris Chang, whose foundry model launched the fabless semiconductor industry, spurring creation of new innovative companies.  In 2016, Gordon Moore was honored, creator of the famous Moore’s law theory and co-founder of Intel.  Dr. Kinam Kim was honored in 2017 for his contributions in memory technologies and his visionary leadership at Samsung.

Luc Van den hove concluded, saying: “Our mission is to create innovation through collaboration. By gathering global technology leaders at the ITF, imec provides an open forum to share issues and trends challenging the semiconductor industry. In this international exchange, imec and participants outline ways to collaborate in bringing innovative solutions to market.”

Micron Technology Inc. (Nasdaq:MU) announced today that the company has appointed Raj Talluri as senior vice president and general manager of the Mobile Business Unit.

In this role, Talluri will be responsible for leading and growing Micron’s mobile business. This includes building world-class mobile solutions to address the growing market opportunity driven by new usage models, from low-end devices to flagship smartphones. Talluri will report to Sumit Sadana, Micron’s executive vice president and chief business officer.

Talluri is a seasoned leader, with 25 years of experience in the semiconductor industry in executive roles spanning business, engineering management and strategic marketing. He joins Micron after nine years at Qualcomm, where he most recently served as senior vice president of product management, responsible for the company’s Internet of Things business and, before that, its mobile computing platform. Before joining Qualcomm, Talluri held executive positions at Texas Instruments, where he worked for sixteen years. His last role was general manager of the cellular media solution business in the wireless terminals business unit.

“Emerging usage models such as artificial intelligence, augmented reality and advanced imaging are increasing the complexity of devices, requiring new ways of processing, sharing and utilizing data, and making memory and storage increasingly critical to the mobile platform,” said Sadana. “Raj’s deep technical expertise and customer relationships in the mobile space, combined with his vision and business experience, make him the ideal choice to lead our mobile business unit.”

Talluri earned a Ph.D. in electrical engineering from the University of Texas in Austin. He also earned a Master of Engineering degree from Anna University in Chennai, India, and a Bachelor of Engineering from Andhra University in Waltair, India. He holds 13 U.S. patents relating to image processing, video compression and media processor architectures.

People are growing increasingly dependent on their mobile phones, tablets and other portable devices that help them navigate daily life. But these gadgets are prone to failure, often caused by small defects in their complex electronics, which can result from regular use. Now, a paper in today’s Nature Electronics details an innovation from researchers at the Advanced Science Research Center (ASRC) at The Graduate Center of The City University of New York that provides robust protection against circuitry damage that affects signal transmission.

The breakthrough was made in the lab of Andrea Alù, director of the ASRC’s Photonics Initiative. Alù and his colleagues from The City College of New York, University of Texas at Austin and Tel Aviv University were inspired by the seminal work of three British researchers who won the 2016 Noble Prize in Physics for their work, which teased out that particular properties of matter (such as electrical conductivity) can be preserved in certain materials despite continuous changes in the matter’s form or shape. This concept is associated with topology–a branch of mathematics that studies the properties of space that are preserved under continuous deformations.

“In the past few years there has been a strong interest in translating this concept of matter topology from material science to light propagation,” said Alù. “We achieved two goals with this project: First, we showed that we can use the science of topology to facilitate robust electromagnetic-wave propagation in electronics and circuit components. Second, we showed that the inherent robustness associated with these topological phenomena can be self-induced by the signal traveling in the circuit, and that we can achieve this robustness using suitably tailored nonlinearities in circuit arrays.”

To achieve their goals, the team used nonlinear resonators to mold a band-diagram of the circuit array. The array was designed so that a change in signal intensity could induce a change in the band diagram’s topology. For low signal intensities, the electronic circuit was designed to support a trivial topology, and therefore provide no protection from defects. In this case, as defects were introduced into the array, the signal transmission and the functionality of the circuit were negatively affected.

As the voltage was increased beyond a specific threshold, however, the band-diagram’s topology was automatically modified, and the signal transmission was not impeded by arbitrary defects introduced across the circuit array. This provided direct evidence of a topological transition in the circuitry that translated into a self-induced robustness against defects and disorder.

“As soon as we applied the higher-voltage signal, the system reconfigured itself, inducing a topology that propagated across the entire chain of resonators allowing the signal to transmit without any problem,” said A. Khanikaev, professor at The City College of New York and co-author in the study. “Because the system is nonlinear, it’s able to undergo an unusual transition that makes signal transmission robust even when there are defects or damage to the circuitry.”

“These ideas open up exciting opportunities for inherently robust electronics and show how complex concepts in mathematics, like the one of topology, can have real-life impact on common electronic devices,” said Yakir Hadad, lead author and former postdoc in Alù’s group, currently a professor at Tel-Aviv University, Israel. “Similar ideas can be applied to nonlinear optical circuits and extended to two and three-dimensional nonlinear metamaterials.”

3-D printing has gained popularity in recent years as a means for creating a variety of functional products, from tools to clothing and medical devices. Now, the concept of multi-dimensional printing has helped a team of researchers at the Advanced Science Research Center (ASRC) at the Graduate Center of the City University of New York develop a new, potentially more efficient and cost-effective method for preparing biochips (also known as microarrays), which are used to screen for and analyze biological changes associated with disease development, bioterrorism agents, and other areas of research that involve biological components.

Biological probes are patterned into biochips using nanoscopic light-pens, allowing researchers to increase the number of probes that can be immobilized in a single chip. Credit: Advanced Science Research Center at the Graduate Center, CUNY

Biological probes are patterned into biochips using nanoscopic light-pens, allowing researchers to increase the number of probes that can be immobilized in a single chip. Credit: Advanced Science Research Center at the Graduate Center, CUNY

In a paper published today in the journal Chem, researchers with the ASRC’s Nanoscience Initiative detail how they have combined microfluidic techniques with beam-pen lithography and photochemical surface reactions to devise a new biochip printing technique. The method involves exposing a biochip’s surface to specific organic reagents, and then using a tightly focused beam of light to adhere the immobilized reagents to the chip’s surface. The process allows scientists to repeatedly expose a single chip to the same or different factors and imprint the reactions onto different sections of the biochip. The result is a biochip that can accommodate more probes than is achievable with current commercial platforms.

“This is essentially a new nanoscale printer that allows us to imprint more complexity on the surface of biochip than any of the currently available commercial technologies,” said Adam Braunschweig, lead researcher and associate professor with the ASRC’s Nanoscience Initiative. “It will help us to gain much better understanding of how cells and biological pathways work.”

An additional benefit of the new tool is that it allows researchers to reliably print on a variety of delicate materials–including glasses, metals, and lipids–on the length scale of biological interactions, and without the use of a clean room. It also allows scientists to fit more reactive probes onto a single chip. These improvements could, in theory, reduce the cost of biochip-facilitated research.

ASRC scientists are now exploring ways to fine tune their new technique for creating these biochips. “We want to be able to record even more complex surface interactions and reduce our resolution down to a single molecule,” said ASRC Research Associate Carlos Carbonell, the paper’s lead author. “This technique gives rise to a new method of microarray creation that should be useful to the entire field of biological ‘omics’ research.”