Category Archives: Device Architecture

SEMICON Europa will open its doors tomorrow, showcasing the latest product, tools, and technologies for advanced microelectronics manufacturing. Co-located with the IoT Planet exhibition at the Alpexpo in Grenoble, France, SEMICON Europa features more than 400 international exhibitors representing all segments and sectors of the semiconductor supply chain. SEMICON Europa 2016 will run from 25-27 October.

Presenting and attending companies include Intel, STMicroelectronics, CEA-Leti, imec, GLOBALFOUNDRIES, INFINEON, EVG, Sony, among others.  The market data and technological developments and strategies presented will keep attendees informed about current industry practices and achievements and help propel them into the future of the electronics industry.

SEMICON Europa sessions and conferences, including the Fab Management Forum, Advanced Packaging Conference, Imaging Conference, Power Electronics Conference, and the new 2016FLEX Europe Conference offer attendees a real connection to the complete electronics supply chain, from silicon to system, with a strong emphasis on application-driven markets, including imaging, power electronics, automotive, MedTech, and flexible hybrid electronics (FHE).

More than 6,000 industry professionals are expected to attend this year’s event. In addition to the exhibition and conferences, dozens of start-up and early-stage companies and more than 60 speakers will participate in the Innovation Village program. Located on the SEMICON show floor, Innovation Village showcases start-up talent, incubators, and investment opportunities within Europe and abroad.

For more information visit www.semiconeuropa.org.

ams AG (SIX: AMS), a provider of high performance sensors and analog ICs, a provider of high performance sensors and analog ICs, has announced its fast and cost-efficient IC prototyping service, known as Multi-Project Wafer (MPW) or shuttle run, with an updated schedule for 2017. The prototyping service, which combines several IC designs from different customers onto a single wafer, offers significant cost advantages for foundry customers as the costs for wafers and masks are shared among all shuttle participants.

ams’ best in class MPW service offers the whole range of 180nm and 0.35μm specialty processes including the recently introduced 180nm CMOS technology (“aC18”). The aC18 process supports a large number of 1.8V and 5.0V NMOS and PMOS devices (substrate based, floating, low leakage and high threshold voltage options) and fully characterised passives including various capacitors. Area-optimised high-density and low-power digital libraries with gate densities up to 152kGates/mm², updated digital and analog I/O libraries with up to 6 metal layers as well as ESD protection cells with up to 8kV HBM level complete the offering. ams’ aC18 process is ideally suited for sensor and sensor interface devices in a wide variety of applications. All 2017 MPW runs in aC18 technology will be manufactured in ams’ state of the art 200mm fabrication facility in Austria ensuring very low defect densities and high yields.

In addition to the four aC18 MPW runs, ams will also offer four MPW runs in its advanced 180nm High-Voltage CMOS (aH18) technology supporting 1.8V, 5V, 20V and 50V devices. For its 0.35μm specialty processes a total of 14 runs are offered in 2017. ams’ 0.35μm High-Voltage CMOS process family, optimised for high-voltage designs in automotive and industrial applications, supports 20V, 50V and 120V devices as well as truly voltage scalable transistors. The advanced High-Voltage CMOS process with embedded EEPROM functionality as well as the 0.35μm SiGe-BiCMOS technology S35 are fully compatible with the base CMOS process and complete ams’ MPW service portfolio.

Overall, ams will offer almost 150 MPW start dates in 2017, enabled by co-operations with worldwide partner organisations such as CMP, Europractice, Fraunhofer IIS and Mosis. Customers located in APAC region may also participate via our local MPW program partners Toppan Technical Design Center Co., Ltd (TDC) and MEDs Technologies.

The complete schedule for 2017 has now been released and detailed start dates per process are available on the web atwww.ams.com/MPW.

To take advantage of the MPW service, ams’ foundry customers deliver their completed GDSII-data on specific dates and receive untested packaged samples or dies within a short lead-time of typically 8 weeks for CMOS and 12 weeks for High-Voltage CMOS, SiGe-BiCMOS and Embedded Flash processes.

All process technologies are supported by the well-known hitkit, ams’ industry benchmark process design kit based on Cadence, Mentor Graphics or Keysight ADS design environments. The hitkit comes complete with fully silicon-qualified standard cells, periphery cells and general purpose analog cells such as comparators, operational amplifiers, low power A/D and D/A converters. Custom analog and RF devices, physical verification rule sets for Assura and Calibre, as well as precisely characterised circuit simulation models enable rapid design starts of complex high performance mixed-signal ICs. In addition to standard prototype services, ams also offers advanced analog IP blocks, a memory (RAM/ROM) generation service and packaging services in ceramic or plastic.

Learn more about the comprehensive service and technology portfolio of Full Service Foundry at www.ams.com/foundry.

SEMI and Messe München today announced that SEMICON Europa will co-locate with productronica and electronica (alternating years) in Munich, Germany. For the first time, the co-located events (productronica and SEMICON Europa) will be held next year (14-17 November 2017), creating the strongest single event for electronics manufacturing in Europe, and broadening the range of attendees across the electronics supply chain.

productronica, the world’s leading trade fair for electronics development and production, and electronica, the world’s leading trade fair for electronic components, systems and applications, will now offer attendees an extended platform. With the inclusion of SEMICON Europa, which is focused on the electronics manufacturing supply chain and largely the semiconductor manufacturing, the co-located events will expand attendee opportunities to exchange ideas and promote technological progress.

Falk Senger, managing director of Messe München, says: “The co-location of these events strengthens the global orientation of electronica and productronica, in addition to reinforcing the importance of Munich as one of the epicenters of the international electronics industry.”

SEMICON Europa features the most advanced and innovative electronics manufacturing platform in Europe. Key segments include: semiconductor front-end and back-end manufacturing, MEMS/sensors, secondary equipment, advanced packaging, and applications such as the Internet of Things (IoT).

“The co-location of SEMICON Europa with productronica and electronica is an excellent fit with SEMI’s global trade association strategy to connect the breadth of the global electronics manufacturing supply chain. SEMICON Europa brings a wide range of focused programs that address Europe’s electronics manufacturing issues and opportunities,” says Denny McGuirk, president and CEO of SEMI.

Munich is a convenient central location in Europe with easy access for international visitors. The co-located events will brings tens of thousands of visitors together to connect for electronics business.

To learn more about SEMI (and SEMICON Europa) and Messe München  (and electronica and productronica), please visit the websites.

A newly-developed form of transistor opens up a range of new electronic applications including wearable or implantable devices by drastically reducing the amount of power used. Devices based on this type of ultralow power transistor, developed by engineers at the University of Cambridge, could function for months or even years without a battery by ‘scavenging’ energy from their environment.

Using a similar principle to a computer in sleep mode, the new transistor harnesses a tiny ‘leakage’ of electrical current, known as a near-off-state current, for its operations. This leak, like water dripping from a faulty tap, is a characteristic of all transistors, but this is the first time that it has been effectively captured and used functionally. The results, reported in the journal Science, open up new avenues for system design for the Internet of Things, in which most of the things we interact with every day are connected to the Internet.

The transistors can be produced at low temperatures and can be printed on almost any material, from glass and plastic to polyester and paper. They are based on a unique geometry which uses a ‘non-desirable’ characteristic, namely the point of contact between the metal and semiconducting components of a transistor, a so-called ‘Schottky barrier.’

“We’re challenging conventional perception of how a transistor should be,” said Professor Arokia Nathan of Cambridge’s Department of Engineering, the paper’s co-author. “We’ve found that these Schottky barriers, which most engineers try to avoid, actually have the ideal characteristics for the type of ultralow power applications we’re looking at, such as wearable or implantable electronics for health monitoring.”

The new design gets around one of the main issues preventing the development of ultralow power transistors, namely the ability to produce them at very small sizes. As transistors get smaller, their two electrodes start to influence the behaviour of one another, and the voltages spread, meaning that below a certain size, transistors fail to function as desired. By changing the design of the transistors, the Cambridge researchers were able to use the Schottky barriers to keep the electrodes independent from one another, so that the transistors can be scaled down to very small geometries.

The design also achieves a very high level of gain, or signal amplification. The transistor’s operating voltage is less than a volt, with power consumption below a billionth of a watt. This ultralow power consumption makes them most suitable for applications where function is more important than speed, which is the essence of the Internet of Things.

“If we were to draw energy from a typical AA battery based on this design, it would last for a billion years,” said Dr Sungsik Lee, the paper’s first author, also from the Department of Engineering. “Using the Schottky barrier allows us to keep the electrodes from interfering with each other in order to amplify the amplitude of the signal even at the state where the transistor is almost switched off.”

“This will bring about a new design model for ultralow power sensor interfaces and analogue signal processing in wearable and implantable devices, all of which are critical for the Internet of Things,” said Nathan.

“This is an ingenious transistor concept,” said Professor Gehan Amaratunga, Head of the Electronics, Power and Energy Conversion Group at Cambridge’s Engineering Department. “This type of ultra-low power operation is a pre-requisite for many of the new ubiquitous electronics applications, where what matters is function – in essence ‘intelligence’ – without the demand for speed. In such applications the possibility of having totally autonomous electronics now becomes a possibility. The system can rely on harvesting background energy from the environment for very long term operation, which is akin to organisms such as bacteria in biology.”

A new design for solar cells that uses inexpensive, commonly available materials could rival and even outperform conventional cells made of silicon.

A tandem perovskite solar cell boosts efficiency by absorbing high- and low-energy photons from the sun. Credit: Rongrong Cheacharoen/Stanford University

A tandem perovskite solar cell boosts efficiency by absorbing high- and low-energy photons from the sun. Credit: Rongrong Cheacharoen/Stanford University

Writing in the Oct. 21 edition of Science, researchers from Stanford and Oxford describe using tin and other abundant elements to create novel forms of perovskite – a photovoltaic crystalline material that’s thinner, more flexible and easier to manufacture than silicon crystals.

“Perovskite semiconductors have shown great promise for making high-efficiency solar cells at low cost,” said study co-author Michael McGehee, a professor of materials science and engineering at Stanford. “We have designed a robust, all-perovskite device that converts sunlight into electricity with an efficiency of 20.3 percent, a rate comparable to silicon solar cells on the market today.”

The new device consists of two perovskite solar cells stacked in tandem. Each cell is printed on glass, but the same technology could be used to print the cells on plastic, McGehee added.

“The all-perovskite tandem cells we have demonstrated clearly outline a roadmap for thin-film solar cells to deliver over 30 percent efficiency,” said co-author Henry Snaith, a professor of physics at Oxford. “This is just the beginning.”

Tandem technology

Previous studies showed that adding a layer of perovskite can improve the efficiency of silicon solar cells. But a tandem device consisting of two all-perovskite cells would be cheaper and less energy-intensive to build, the authors said.

“A silicon solar panel begins by converting silica rock into silicon crystals through a process that involves temperatures above 3,000 degrees Fahrenheit (1,600 degrees Celsius),” said co-lead author Tomas Leijtens, a postdoctoral scholar at Stanford. “Perovskite cells can be processed in a laboratory from common materials like lead, tin and bromine, then printed on glass at room temperature.”

But building an all-perovskite tandem device has been a difficult challenge. The main problem is creating stable perovskite materials capable of capturing enough energy from the sun to produce a decent voltage.

A typical perovskite cell harvests photons from the visible part of the solar spectrum. Higher-energy photons can cause electrons in the perovskite crystal to jump across an “energy gap” and create an electric current.

A solar cell with a small energy gap can absorb most photons but produces a very low voltage. A cell with a larger energy gap generates a higher voltage, but lower-energy photons pass right through it.

An efficient tandem device would consist of two ideally matched cells, said co-lead author Giles Eperon, an Oxford postdoctoral scholar currently at the University of Washington.

“The cell with the larger energy gap would absorb higher-energy photons and generate an additional voltage,” Eperon said. “The cell with the smaller energy gap can harvest photons that aren’t collected by the first cell and still produce a voltage.”

The smaller gap has proven to be the bigger challenge for scientists. Working together, Eperon and Leijtens used a unique combination of tin, lead, cesium, iodine and organic materials to create an efficient cell with a small energy gap.

“We developed a novel perovskite that absorbs lower-energy infrared light and delivers a 14.8 percent conversion efficiency,” Eperon said. “We then combined it with a perovskite cell composed of similar materials but with a larger energy gap.”

The result: A tandem device consisting of two perovskite cells with a combined efficiency of 20.3 percent.

“There are thousands of possible compounds for perovskites,” Leijtens added, “but this one works very well, quite a bit better than anything before it.”

Seeking stability

One concern with perovskites is stability. Rooftop solar panels made of silicon typically last 25 years or more. But some perovskites degrade quickly when exposed to moisture or light. In previous experiments, perovskites made with tin were found to be particularly unstable.

To assess stability, the research team subjected both experimental cells to temperatures of 212 degrees Fahrenheit (100 degrees Celsius) for four days.

“Crucially, we found that our cells exhibit excellent thermal and atmospheric stability, unprecedented for tin-based perovskites,” the authors wrote.

“The efficiency of our tandem device is already far in excess of the best tandem solar cells made with other low-cost semiconductors, such as organic small molecules and microcrystalline silicon,” McGehee said. “Those who see the potential realize that these results are amazing.”

The next step is to optimize the composition of the materials to absorb more light and generate an even higher current, Snaith said.

“The versatility of perovskites, the low cost of materials and manufacturing, now coupled with the potential to achieve very high efficiencies, will be transformative to the photovoltaic industry once manufacturability and acceptable stability are also proven,” he said.

North America-based manufacturers of semiconductor equipment posted $1.60 billion in orders worldwide in September 2016 (three-month average basis) and a book-to-bill ratio of 1.05, according to the September Equipment Market Data Subscription (EMDS) Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.05 means that $105 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in September 2016 was $1.60 billion. The bookings figure is 8.5 percent lower than the final August 2016 level of $1.75 billion, and is 3.2 percent higher than the September 2015 order level of $1.55 billion.

The three-month average of worldwide billings in September 2016 was $1.53 billion. The billings figure is 10.2 percent lower than the final August 2016 level of $1.71 billion, and is 2.6 percent higher than the September 2015 billings level of $1.50 billion.

“Semiconductor equipment bookings continue to outpace equipment billings,” said Denny McGuirk, president and CEO of SEMI.  “Year-to-date bookings and billings data are on trend to surpass last year’s levels.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
April 2016

$1,460.2

$1,595.4

1.09
May 2016

$1,601.5

$1,750.5

1.09
June 2016

$1,715.2

$1,714.3

1.00
July 2016

$1,707.9

$1,795.4

1.05
August 2016 (final)

$1,709.0

$1,753.4

1.03
September 2016 (prelim)

$1,534.4

$1,604.1

1.05

Source: SEMI (www.semi.org), October 2016

Researchers at Tokyo Institute of Technology in collaboration with the University of Cambridge have studied the interaction between microwave fields and electronic defect states inside the oxide layer of field-effect transistors at cryogenic temperatures. It has been found that the physics of such defect states are consistent with driven two-level systems possessing long coherence times, and that their induced dynamics can be coherently and independently controlled.

Due to the nature of this work, it is hoped that such results will contribute to the field of correlated electronic glassy dynamics in condensed matter physics; give a better understanding of charge noise effects in mesoscopic devices; and enable new studies for developing novel technologies in the important field of semiconductor-based quantum information processing.

(a) Schematic representation of the FET device used in this work. (b) Schematic diagram of the interaction between the trapped electron and the percolation pathways mediated by the MW field (top). Multilevel RTN events recorded in the FET current measured at 80 K (bottom). (c) Wideband CW microwave spectroscopy of the FET channel current performed at 4.2 K. Each narrow spike is a separate resonance that is resolved into a Fano or Lorentzian shape at higher resolution (inset). (d) Density of states (red), amplitude change (blue) and coherence times (inset) histograms. Credit: Nature Materials

(a) Schematic representation of the FET device used in this work. (b) Schematic diagram of the interaction between the trapped electron and the percolation pathways mediated by the MW field (top). Multilevel RTN events recorded in the FET current measured at 80 K (bottom). (c) Wideband CW microwave spectroscopy of the FET channel current performed at 4.2 K. Each narrow spike is a separate resonance that is resolved into a Fano or Lorentzian shape at higher resolution (inset). (d) Density of states (red), amplitude change (blue) and coherence times (inset) histograms. Credit: Nature Materials

Defect states acting as electron traps in oxide-semiconductor interfaces usually are sources of noise and tend to reduce the performance of nanoscale devices. Such defect states can modify the electrostatic environment experienced by conducting electrons, forcing them to percolate through nanowire-like pathways at low enough temperatures. This effectively allows a detection mechanism of the occupation of such trap sites by the current measured in the conduction channel. Such effect is normally observed as random telegraph noise (RTN), which corresponds to the incoherent emission and capture of electrons in the trap states, mediated by the thermal background.

Motivated by the big changes in the conductivity caused by RTN in field-effect transistors (FET), scientists at the Quantum Nanoelectronics Research Center, Institute of Innovative Research (Tokyo Tech), the Center for Advanced Photonics and Electronics (University of Cambridge), and Cavendish Laboratory (University of Cambridge) investigated possible mechanisms in which the occupation of defects states could be both observed and dynamically mediated by means of coherent microwave fields. Working at cryogenic temperatures, it was found that the dynamics of such trap states are consistent with two-level systems (TLS), in which the energy levels are discrete and only the two lowest are accessible within the energy of the excitation signal. A TLS can represent the basis for a quantum bit implementation.

From the microwave spectroscopic signature of the response of the FET used in this work, displaying a great number of high-quality factor resonances (Q > 10000), the extracted coherence times observed in this study are considerably longer, by almost three orders of magnitude, than other defect-based implementations of TLS. Performing single-pulse experiments gives the possibility to study the dynamics of the trapped electrons, which have been found not to depend on the chemistry of the dielectric used. And using a standard Ramsey protocol, coherent control was achieved. Furthermore, employing an optical master equation that captures the dynamics of the trapped electrons and a physical model based on linear response theory, it was possible to reproduce the experimental behavior observed in the experiments.

Furthermore, it was found that the defect states are relatively well protected against phonons, explaining the long decoherence times measured, and that the main source of back-action could be related to long-range Coulombic interactions with other charges. Finally, since each resonance can be addressed independently in frequency space, the wide distribution of long coherence times observed, and the quasi-uniform density of states measured, it is hoped that this work could motivate the possibility to use such systems as quantum memories or quantum bits in future quantum information processing implementations.

IC Insights will release its October Update to the 2016 McClean Report later this week.  This Updateincludes a review of IC Insights’ latest 2016 IC market forecast, an update on the rebounding DRAM market, and an extensive analysis of the optoelectronics, sensor/actuator, and discrete (O-S-D) markets. An excerpt from the October Update, describing the upgraded 2016 IC market forecast, is shown below.

IC Insights has raised its IC market forecast for 2016 by three percentage points from a 2% decline to a 1% increase and its 2016 IC unit volume shipment growth rate forecast from 4% to 6%.  A large portion of this revision is due to a strengthening DRAM market.

Although the average third quarter sequential increase in the worldwide IC market since 2002 has been 8%, last year’s 3Q growth rate was barely positive with a meager 1% increase.  However, 3Q16 results were slightly above the past 15-year average and posted a strong 9% jump.  Moreover, with an anticipated increase of 1% next quarter, the total 4Q16 IC market is forecast to climb to $76.9 billion, a new quarterly record high, surpassing the previous high of $76.7 billion posted in 4Q14.

It should be noted that the average second half versus first half of the year growth rate in the IC market since 1990, including the forecast for 2016, is 8.9% (Figure 1).  However, IC Insights is forecasting that the 2H16 IC market will be up 12.3% as compared to 1H16, a strong turnaround from the extremely poor second half result of -1.2% posted last year and the highest second half growth rate since 2009.

With expectations for slightly better worldwide GDP growth in 2017 as compared to 2016 and continued firming of both DRAM and NAND memory prices, IC Insights believes that the worldwide IC market will grow by 4% next year (IC Insights’ detailed 2016-2020 IC market forecast by product type will be presented in the November Update).

history of ic growth

By Ji-Won Cho, SEMI Korea

SEMI Korea has hosted a SEMI member event every year for its members since 2008 to provide networking opportunities and insight on the ever-changing issues in the industry. This year, over 225 SEMI members in Korea from 132 companies ─ including the chipmakers, Samsung and Dongbu Hitek ─ participated in SEMI Members Day on October 6. Almost 70 percent of the attendees were executive level. Five speakers shared their thought-provoking perspectives: global semiconductor outlook, technology trends, flexible AMOLED technology, autonomous vehicle, and robot industry.

Soo Kyum Kim, director at IDC Korea, presented “Global Semiconductor Industry Outlook.”  Kim pointed out that global semiconductor market will decrease 2.9 percent in 2016 and recover slightly 0.6 percent in 2017 while the dedicated foundry market will face a short correction. He also forecasted that the CAGR of global semiconductor market will be 2.6 percent between 2017 and 2020. This growth will be led by non-traditional areas; automotive, industrial and smart home. He believes that IoT and Intelligent system penetration will drive both MPU and MCU in processor market.

Worldwide-MCU-Opportunity

Sei Cheol Lee, principal analyst at NH Securities, presented “Semiconductor Technology Trends.” Lee discussed how the solid state drives (SSD) and UFS markets are rapidly growing and 3D NAND stack will move from 48 to 64 layers. Lee added that increasing layers will lead to more dry etch than wet etch in processes and incease in KrF patterning, PECVD/ALD,  and test. Lee forecasted that the test market will grow to $3 billion in 2017 from only $2.2 billion in 2016 due to high-end SSD and DDR4’s bus speed enhancement.

Minsu Kang, analyst at IHS Technology, spoke about the Flexible AMOLED Industry Outlook. According to his presentation, flexible displays are mainly used for smartwatch and smartphone, but set manufacturers are also trying to apply them with foldable or rollable form-factors. Flexible AMOLED has clear advantages for flexible display technology, in terms of form-factor, size, PPI and picture quality. He pointed out that flexible AMOLED was expected to increase to over 13 percent of OLED panel shipment in 2016, and it will continue to grow rapidly because more set manufacturers are adopting the technology. Apple may try to apply it to their smartphone in 2017.

Ji-won-Korea article Photo 1

Kang highlighted that many panel manufacturers have been trying to increase flexible AMOLED capacity since 2015, but need to develop experience. He added that the curved forms of flexible display will be the mainstream until 2020, but foldable forms may be the mainstream after.  It depends on how the innovation resonates with the user experience

Seyong Kim, senior manager at Renesas Electronics Korea, presented “Technology Trends of the Autonomous Vehicle.” He said it may be fully realized between 2025 and 2030. Each country is now focusing on establishing the safety standards as like ISO 26262 to gain the initiatives.

Concerning the connected car, he mentioned the most important issue was security. Kim also added that a growing autonomous vehicle industry will need more semiconductors but the market share likely will remain under 10 percent of the entire semiconductor market.

Ji-won-Korea article Photo 2

Dongkyeong Kim, head of R&D center at Future Robot, wrapped up the day with a presentation on Artificial Intelligence (AI) and Intelligent Robots in the semiconductor industry. Kim stated that development of semiconductor technology has driven the Big Data and AI eras and it will increasingly result in strong demand for semiconductors. According to Kim, globally the robot industry has invested 1.8 billion USD and 50 percent of the amount was invested by China in 2015.

The attendees were interested in the topics and an ongoing dialogue took place during the Q&A after each presentation. In the survey, more than 92 percent of attendees responded that they were satisfied. The attendees recommended additional topics for next year’s program, including equipment and materials outlook, advanced packaging market outlook, and technology roadmap.

Jin Soo Ko, VP of Teradyne said, “SEMI Members Day was the best in terms of agenda and contents since I attended from 2007. I am very satisfied with all programs and networking opportunities provided by SEMI.”

Hyun-Dae Cho, president of SEMI Korea, said, “The SEMI Korea Members Day connects our members to peers and industry executives and gives first-hand information on the trends and technology in the industry. I hope SEMI members enjoyed the opportunities through this annual event.”

For information on becoming a SEMI member, visit www.semi.org/en/Membership.

The HSA Foundation has expanded its Academic Partnership Program with the addition of Northeastern University as the first HSA Academic Center of Excellence. The HSA Foundation will be expanding the program by driving innovation in heterogeneous processing to help usher in the next evolution in computing.

HSA is gaining increasing traction, noted HSA Foundation President Dr. John Glossner, with recently announced HSA compliant products, the launch earlier this year of the HSA 1.1 specification, and other key developments.

“The HSA Foundation is now developing relationships with key research universities worldwide that are looking to work on the next evolution in computing both in hardware and software,” said Glossner. “HSA Academic Centers of Excellence will be exploring a wide range of HSA related areas across computer graphics, computer vision, computational photography, programming language and model research, and more.”

Glossner added that research universities are key to driving forward the industry’s understanding of the challenges and possibilities in heterogeneous computing.

The Northeastern University Computer Architecture Research (NUCAR) Laboratory, led by Prof. David Kaeli, has recently released HeteroMark, the first set of benchmark applications developed to evaluate HSA systems. In addition to this contribution to the open source community, the NUCAR team has also introduced Multi2sim-HSA, the first architectural simulator that supports HSA execution. This new simulator has been integrated in the Multi2sim 5.0 framework (www.multi2sim.org), an open source heterogeneous simulation infrastructure used by hundreds of international researchers.

“It is a pleasure for us to work collaboratively with the HSA Foundation members. We are already seeing that our tools and workloads are being leveraged by both industry and academia, enabling them to explore the many benefits of this new computing model,” said Kaeli.

“The work on HeteroMark by Northeastern University is creating an excellent architecture- and API-neutral test suite for common data parallel workloads using modern heterogeneous architecture features,” said AMD Fellow Paul Blinzer. “It allows analysis of GPU and CPU contributions to traditional and collaborative compute patterns with either GPU or CPU as a producer and consumer of data, and provides a good point of comparison with traditional systems designs, clearly demonstrating the benefits of modern heterogeneous systems features defined by the HSA specifications and, for example, implemented via AMD’s ROCm infrastructure.”

Blinzer added that “Multi2sim is a popular system simulation tool in academic research. Integration of HSA system features allows researchers to better understand and analyze modern platform features available on heterogeneous platforms based on HSA technologies.”