Category Archives: Device Architecture

Peregrine Semiconductor Corp. today announced the promotion of Takaki Murata to vice president and general manager of the high performance analog (HPA) business unit.

“Peregrine Semiconductor was acquired by Murata in December of 2014, and they have proven to be a powerful and supportive parent company,” says Jim Cable, CEO of Peregrine Semiconductor. “Takaki has been preparing for this promotion for the last year and a half, as he served on the executive staff of our HPA business. The timing of this promotion reflects the success of our integration and the logical next step to further our assimilation into the Murata family of companies.”

A long-time veteran of Murata, Takaki has a Ph.D. in electrical engineering and 12 years of experience at Murata, in a range of different assignments including: LTCC material development, SAW filter development, antenna sales engineering, RF front-end sales engineering, corporate accounting and inductor business strategic planning. Most recently, Takaki served as the vice president of business development inside HPA. He has been in that role since early 2015.

“I am so impressed with the quality of engineering talent here at the HPA business unit of Peregrine,” says Takaki Murata, now vice president and general manager of the Peregrine HPA business unit. “When you add that talented pool of engineers to the uniqueness of the Peregrine UltraCMOS® platform and recent advances in the power management market to the wide support of an industry giant, like Murata, you have an unstoppable force. I look forward to facilitating many more successful collaborations in the very near future.”

“Murata is looking to Peregrine to provide semiconductor innovation to be applied to the Murata advantage in our growth markets of power, automotive, healthcare and 5G,” says Norio Nakajima, EVP communication and sensor business unit, and energy business group of Murata Manufacturing Co. “We have heavily invested in Peregrine because we see their technological advantage as critical to many of our new and growth initiatives. We believe that Takaki is ideally suited to his new position because of his technological expertise and his deep and long history with Murata Manufacturing.”

Since the purchase by Murata in December 2014, Peregrine Semiconductor has increased their employee base by 40 percent. Jim Cable adds, “The continued investment in Peregrine by Murata is an indicator of the significance that it places on our technology and innovation.”

The HPA business unit of Peregrine Semiconductor serves more than over 4,000 global customers in end markets ranging from wireless infrastructure and wired broadband to test & measurement (T&M), automotive and aerospace. Most recently, it launched its first product into the power/energy marketplace.  Products include RF switches, digital step attenuators (DSAs), digitally tunable capacitors (DTCs), tuning control switches, power limiters, phase-locked loops (PLLs), mixers, prescalers, DC-DC converters, monolithic phase and amplitude controllers (MPACs) and the fastest GaN FET driver available today.

Worldwide semiconductor capital spending is projected to decline 0.7 percent in 2016, to $64.3 billion, according to Gartner, Inc. (see Table 1). This is up from the estimated 2 percent decline in Gartner’s previous quarterly forecast.

“Economic instability, inventory excess, weak demand for PC’s, tablets, and mobile products in the past three years has caused slow growth for the semiconductor industry. This slowdown in electronic product demand has driven semiconductor device manufacturers to be conservative in increasing production,” said David Christensen, senior research analyst at Gartner. “Looking ahead, it appears the second half of 2016 may see improved demand. However, following Brexit, semiconductor inventory levels may rise in the third and fourth quarters, which could lead to reduced production volumes.”

Table 1

Worldwide Semiconductor Capital Spending and Equipment Spending Forecast, 2015-2018 (Millions of Dollars)

2015

2016

2017

2018

Semiconductor Capital Spending ($M)

64,750.8

64,278.3

66,010.5

68,523.7

Growth (%)

0.3

-0.7

2.7

3.8

Wafer-Level Manufacturing Equipment ($M)

33,248.1

32,890.9

34,842.2

37,704.3

Growth (%)

-1.1

-1.1

5.9

8.2

Wafer Fab Equipment ($M)

31,485.4

31,071.8

32,862.1

35,491.5

Growth (%)

-1.3

-1.3

5.8

8.0

Wafer-Level Packaging and Assembly Equipment ($M)

1,762.7

1,819.1

1,980.1

2,212.9

Growth (%)

4.1

3.2

8.9

11.8

Source: Gartner (July 2016)

The PC, ultramobile (tablet) and smartphone production forecast for the second half of 2016 has been lowered from 2015, as the industry slowdown continues. These reductions have resulted in a forecasted 3 percent decline for the semiconductor market. Memory revenue growth for 2016 is also revised downward compared with the previous forecast, due to a weaker pricing outlook.

“While currency exchange rates are another reason for the ongoing revenue decrease, the aggressive pursuit of semiconductor manufacturing capability by the Chinese government and related investment companies is becoming a major factor,” said Mr. Christensen. “This will dramatically affect the competitive landscape of the global semiconductor manufacturing in the next few years as China becomes a major market for semiconductor usage and manufacturing.”

This research is produced by Gartner’s Semiconductor Manufacturing program. This research program, which is part of the overall semiconductor research group, provides a comprehensive view of the entire semiconductor industry, from manufacturing to device and application market trends. Additional analysis on the outlook for the market can be found at “Forecast: Semiconductor Capital Spending, Worldwide, 2Q16 Update.”

North America-based manufacturers of semiconductor equipment posted $1.71 billion in orders worldwide in June 2016 (three-month average basis) and a book-to-bill ratio of 1.00, according to the June Equipment Market Data Subscription (EMDS) Book-to-Bill Report published today by SEMI.  A book-to-bill of 1.00 means that $100 worth of orders were received for every $100 of product billed for the month.

SEMI reports that the three-month average of worldwide bookings in June 2016 was $1.71 billion. The bookings figure is 2.1 percent lower than the final May 2016 level of $1.75 billion, and is 12.9 percent higher than the June 2015 order level of $1.52 billion.

The three-month average of worldwide billings in June 2016 was $1.71 billion. The billings figure is 7.0 percent higher than the final May 2016 level of $1.60 billion, and is 10.2 percent higher than the June 2015 billings level of $1.55 billion.

“Although order activity slowed for the most recent month,” said Denny McGuirk, president and CEO of SEMI. “Billings activity for equipment companies based in North America are at their highest level since February 2011.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
January 2016

$1,221.2

$1,310.9

1.07
February 2016

$1,204.4

$1,262.0

1.05
March 2016

$1,197.6

$1,379.2

1.15
April 2016

$1,460.2

$1,595.4

1.09
May 2016 (final)

$1,601.5

$1,750.5

1.09
June 2016 (prelim)

$1,714.0

$1,713.2

1.00

Source: SEMI (www.semi.org), July 2016

For more than six decades, the annual IEEE International Electron Devices Meeting (IEDM) has been the world’s largest and most influential forum for technologists to unveil breakthroughs in transistors and related micro/nanoelectronics devices.

That tradition continues this year with a few new twists, including a supplier exhibition and a later paper-submission deadline (August 10) of a final, four-page paper. Accepted papers will appear in the proceedings without any changes. This streamlined process will ensure that even as the pace of innovation in electronics quickens, IEDM remains the place to learn about the latest and most important developments.

The 62nd annual IEDM will be held in San Francisco December 3 – 7, 2016, beginning with a weekend program of 90-minute tutorials and all-day Short Courses taught by industry leaders and world experts in their respective technical disciplines. These weekend events will precede a technical program of some 220 papers and a rich offering of other events including thought-provoking plenary talks, spirited evening panels, special focus sessions on topics of great interest, IEEE awards and an event for entrepreneurs sponsored by IEDM and IEEE Women in Engineering.

“The industry is moving forward at an accelerated pace to match the increasing complexity of today’s world, and a later submission deadline enables us to shorten the time between when results are achieved in the lab and when they are presented at the IEDM,” said Dr. Martin Giles, IEDM 2016 Publicity Chair, Intel Fellow, and Director of Transistor Technology Variation in Intel’s Technology and Manufacturing Group.

Tibor Grasser, IEDM 2016 Exhibits Chair, IEEE Fellow and Head of the Institute for Microelectronics at TU Wien, added, “We have decided to have a supplier exhibition in conjunction with the technical program this year, as an added way to provide attendees with the knowledge and information they need to advance the state-of-the-art.”

Here are some of the noteworthy events that will take place at this year’s IEDM:

Special Focus Sessions

  • Wearable Electronics and Internet of Things
  • Quantum Computing
  • System-Level Impact of Power Devices
  • Ultra-High-Speed Electronics

90-Minute Tutorials – Saturday, Dec. 3

A program of 90-minute tutorial sessions on emerging technologies will be presented by experts in the fields, bridging the gap between textbook-level knowledge and leading-edge current research. Advance registration is recommended.

  • The Struggle to Keep Scaling BEOL, and What We Can Do Next, Rod Augur, Distinguished Member of the Technical Staff, GLOBALFOUNDRIES
  • Electronic Circuits and Architectures for Neuromorphic Computing Platforms, Giacomo Indiveri, Univ. of Zurich and ETH Zurich
  • Physical Characterization of Advanced Devices, Robert Wallace, Univ. Texas at Dallas
  • Present and Future of FEOL Reliability—from Dielectric Trap Properties to Reliable Circuit Operation, Ben Kaczer, Principal Scientist, imec
  • Spinelectronics: From Basic Phenomena to Magnetoresistive Memory (MRAM) Applications, Bernard Dieny, Chief Scientist, Spintec CEA
  • Technologies for IoT and Wearable Applications, Including Advances in Cost-Effective and Reliable Embedded Non-Volatile Memories, Ali Keshavarzi, Vice President of R&D, Cypress Semiconductor

Short Courses – Sunday, Dec. 4

The Short Courses provide the opportunity to learn about important areas and developments, and to benefit from direct contact with world experts. Advance registration is recommended.

  • Technology Options at the 5-Nanometer Node, organized by An Steegen and Dan Mocuta of imec (Sr. Vice President of Technology Development/Director of Logic Device and Integration, respectively)
  • Design/Technology Enablers for Computing Applications, organized by John Chen, Vice President of Technology and Foundry Management, NVIDIA

Plenary Presentations – Monday, Dec. 5

  • Memory Scaling – Challenges and Opportunities, Seok-Hee Lee, Executive Vice President and Head of DRAM Product and Technology, Hynix
  • Brain-Inspired Computing, Dharmendra S. Modha, IBM Fellow and Chief Scientist for Brain-Inspired Computing, IBM
  • Differentiating Technologies and Novel Opportunities for the Future Internet of Everything: the Quest for Power Efficiency, Marie-Noëlle Semeria, CEO, Leti

Evening Panel Session – Tuesday evening, Dec. 6

The IEDM offers attendees two evening sessions where experts give their views on important industry topics. Audience participation is encouraged to foster an open and vigorous exchange of ideas.

  • How Will the Semiconductor Industry Change to Enable 50 Billion Connected Devices? Moderator: Prof. Aaron Thean, University of Singapore
  • Challenges and Opportunities for Neuromorphic and Machine Learning, Moderator: Marc Duranton, Sr. Member of the Embedded Computing Lab, CEA

Entrepreneurs Lunch – Wednesday, Dec. 7

Jointly sponsored by IEDM and IEEE Women in Engineering, the Entrepreneurs Lunch will feature Vamsee Pamula, co-founder of Baebies, Inc. a company developing digital microfluidics technology for newborn screening and pediatric testing. Pamula co-founded Baebies in 2014, following the sale of a predecessor microfluidics company that he also co-founded – Advanced Liquid Logic – to Illumina, Inc.

Vamsee has years of experience with digital microfluidics. He has served as Principal Investigator on several National Institutes of Health-funded projects, and has led many talks and published more than 60 articles, five book chapters and a book on the topic. He has more than 200 issued and pending patents, a PhD in Electrical and Computer Engineering from Duke University, and also serves as Adjunct Professor there.

Late-News Deadline

A very limited number of Late News Papers will be accepted, focusing on very recent developments, with a submission deadline of September 12. The submission format is the same as for regular papers.

Further information about IEDM

For registration and other information, visit www.ieee-iedm.org.

The Semiconductor Industry Association (SIA) announced the release of the 2015 International Technology Roadmap for Semiconductors (ITRS), a collaborative report that surveys the technological challenges and opportunities for the semiconductor industry through 2030. The ITRS seeks to identify future technical obstacles and shortfalls, so the industry and research community can collaborate effectively to overcome them and build the next generation of semiconductors – the enabling technology of modern electronics. The current report marks the final installment of the ITRS.

“For a quarter-century, the Roadmap has been an important guidepost for evaluating and advancing semiconductor innovation,” said John Neuffer, president and CEO, Semiconductor Industry Association. “The latest and final installment provides key findings about the future of semiconductor technology and serves as a useful bridge to the next wave of semiconductor research initiatives.”

Faced with ever-evolving research needs and technology challenges, industry leaders have decided to conclude the ITRS and transition to new ways to advance semiconductor research and bring about the next generation of semiconductor innovations. While the final ITRS report charts a path for existing technology research, additional research is needed as we transition to an even more connected world, enabled by innovations like the Internet of Things. Some of these technology challenges were outlined in a recent SIA-Semiconductor Research Corporation (SRC) report, “Rebooting the IT Revolution,” but work continues to define research gaps and implement new research programs.

The ITRS is sponsored by five regions of the world – Europe, Japan, Korea, Taiwan, and the United States. Through the cooperative efforts of the global chip manufacturers and equipment suppliers, research communities and consortia, the ITRS has identified critical gaps, technical needs, and potential solutions related to semiconductor technology.

“SIA appreciates the hard work, dedication, and expertise of those involved with the ITRS over the years and looks forward to continuing the industry’s work to strengthen semiconductor research and maintain the pipeline of semiconductor innovations that fuel the digital economy,” Neuffer said.

With an eye to the next generation of tech gadgetry, a team of physicists at The University of Texas at Austin has had the first-ever glimpse into what happens inside an atomically thin semiconductor device. In doing so, they discovered that an essential function for computing may be possible within a space so small that it’s effectively one-dimensional.

In a paper published July 18 in the Proceedings of the National Academy of Sciences, the researchers describe seeing the detailed inner workings of a new type of transistor that is two-dimensional.

Transistors act as the building blocks for computer chips, sending the electrons on and off switches required for computer processing. Future tech innovations will require finding a way to fit more transistors on computer chips, so experts have begun exploring new semiconducting materials including one called molybdenum disulfide (MoS2). Unlike today’s silicon-based devices, transistors made from the new material allow for on-off signaling on a single flat plane.

Keji Lai, an assistant professor of physics, and a team found that with this new material, the conductive signaling happens much differently than with silicon, in a way that could promote future energy savings in devices. Think of silicon transistors as light bulbs: The whole device is either turned on or off at once. With 2-D transistors, by contrast, Lai and the team found that electric currents move in a more phased way, beginning first at the edges before appearing in the interior. Lai says this suggests the same current could be sent with less power and in an even tinier space, using a one-dimensional edge instead of the two-dimensional plane.

“In physics, edge states often carry a lot of interesting phenomenon, and here, they are the first to turn on. In the future, if we can engineer this material very carefully, then these edges can carry the full current,” Lai says. “We don’t really need the entire thing, because the interior is useless. Just having the edges running to get a current working would substantially reduce the power loss.”

Researchers have been working to get a view into what happens inside a 2-D transistor for years to better understand both the potential and the limitations of the new materials. Getting 2-D transistors ready for commercial devices, such as paper-thin computers and cellphones, is expected to take several more years. Lai says scientists need more information about what interferes with performance in devices made from the new materials.

“These transistors are perfectly two-dimensional,” Lai says. “That means they don’t have some of the defects that occur in a silicon device. On the other hand, that doesn’t mean the new material is perfect.”

Lai and his team used a microscope that he invented and that points microwaves at the 2-D device. Using a tip only 100 nanometers wide, the microwave microscope allowed the scientists to see conductivity changes inside the transistor. Besides seeing the currents’ motion, the scientists found thread-like defects in the middle of the transistors. Lai says this suggests the new material will need to be made cleaner to function optimally.

“If we could make the material clean enough, the edges will be carrying even more current, and the interior won’t have as many defects,” Lai says.

The paper’s other authors are postdoctoral researchers Di Wu and Xiao Li; research scientist Lan Luan, and graduate students Xiaoyu Wu and Zhaodong Chu, and professor Qian Niu in UT Austin’s Department of Physics; and graduate student Wei Li, former graduate student Maruthi N. Yogeesh, postdoctoral researcher Rudresh Ghosh, and associate professor Deji Akinwande of UT Austin’s Department of Electrical and Computer Engineering.

Earlier this year, both Lai and Akinwande won Presidential Early Career Awards for Scientists and Engineers, the U.S. government’s highest honor for early-stage scientists and engineers.

Toshiba Corporation (TOKYO:6502) and Western Digital Corporation (NASDAQ:WDC) today celebrated the opening of the New Fab 2 semiconductor fabrication facility located in Yokkaichi, Mie Prefecture, Japan.

Expanded use of flash memory in smartphones, SSDs, and other applications is driving continued growth of the global flash memory market. The New Fab 2 facility will support the conversion of the companies’ 2D NAND capacity to 3D flash memory, allowing realization of solutions offering higher densities and better device performance.

Construction of New Fab 2 began in September 2014. Following partial completion of the facility in October 2015, Toshiba and SanDisk (acquired in May 2016 by Western Digital Technologies Inc., a wholly owned subsidiary of Western Digital Corporation) worked together to implement leading-edge manufacturing capabilities for mass production of 3D flash memory, and first-phase production started in March of this year. The parties intend to further invest to expand production capacity over time, depending on market conditions.

In addition, Yokkaichi operations will leverage the site-wide integrated production system, which employs big data processing to analyze over 1.6 billion data points each day, to further improve manufacturing efficiency and the quality of 3D flash memory.

The parties are committed to working together to enhance the value they offer to customers and to continue innovation as market leaders.

Satoshi Tsunakawa, President and CEO of Toshiba Corporation, said, “Advanced technologies underline our commitment to respond to continued demand as an innovator in flash memory. We are enhancing manufacturing efficiency and the quality of our world-class facility. Building on that, we also plan investments of as much as 860 billion yen by FY2018, in line with market situation. Our commitment is firm, and we are confident that our joint venture with Western Digital will produce cost competitive next generation memories at Yokkaichi.”

Steve Milligan, Chief Executive Officer of Western Digital, said, “As a leader in non-volatile memory products and solutions, we are excited to be entering the 3D NAND era with our partner Toshiba. The New Fab 2 enables us to begin the conversion of our existing 2D NAND capacity to 3D NAND and continues our long-standing presence in Yokkaichi, Mie Prefecture, and Japan.”

Infineon Technologies AG and Cree, Inc. (Nasdaq:  CREE) announced today that Infineon has entered into a definitive agreement to acquire the Wolfspeed Power and RF division (“Wolfspeed”) of Cree. The deal also includes the related SiC wafer substrate business for power and RF power. The purchase price for this planned all-cash transaction is US Dollar 850 million (approximately Euro 740 million). This acquisition will enable Infineon to provide the broadest offering in compound semiconductors and will further strengthen Infineon as a leading supplier of power and RF power solutions in high-growth markets such as electro-mobility, renewables and next-generation cellular infrastructure relevant for IoT.

Dr. Reinhard Ploss, CEO of Infineon Technologies AG, said: “Joining forces with Wolfspeed represents a unique growth opportunity. Wolfspeed’s and Infineon’s businesses and expertise are highly complementary, bringing together industry leading experts for compound semiconductors. This will enable us to create additional value for our customers with the broadest and deepest portfolio of innovative technologies and products in compound semiconductors available in the market. With Wolfspeed we will become number one in SiC-based power semiconductors. We also want to become number one in RF power. This will accelerate the market introduction of these innovative technologies, addressing the needs of modern society – such as energy efficiency, connectivity and mobility.”

Chuck Swoboda, Cree Chairman and CEO, said: “After much consideration and due diligence over the past year, we concluded that selling Wolfspeed to Infineon was the best decision for our shareholders, employees and customers. We believe that Wolfspeed will now be able to more aggressively commercialize its unique silicon carbide and gallium nitride technology as part of Infineon.”

Frank Plastina, Wolfspeed CEO, said: “By joining the Infineon team, Wolfspeed will now have all the advantages of a global company in our sector, including the ability to leverage Infineon’s market reach and infrastructure. With Infineon’s complementary culture and additional investment, we’ll be better positioned to unlock the potential of our portfolio and our people.”

Wolfspeed is based in Research Triangle Park, North Carolina, USA, and has been a part of Cree for almost three decades. Wolfspeed is a premier provider of SiC-based power and GaN-on-SiC-based RF power solutions. This also includes the related core competencies in wafer substrate manufacturing for SiC, as well as for SiC with a monocrystalline GaN layer for RF power applications. With these competencies, more than 550 highly skilled employees and a strong IP portfolio of approximately 2,000 patents and patent applications, this deal complements Infineon’s previous acquisition of International Rectifier in early 2015. Wolfspeed’s SiC-based product portfolio ideally adds to Infineon’s offering.

Power management solutions based on compound semiconductors have several advantages enabling Infineon’s customers to develop systems with higher energy-efficiency, smaller footprints and lower system costs. Combining the comprehensive portfolios of technologies, products and manufacturing capabilities, Infineon and Wolfspeed will accelerate the development of components enabling customers to develop differentiating systems. Major areas where the applications will profit from SiC are renewables and especially automotive. Both areas benefit from the increased power density and improved efficiency. In automotive it fits well with the recent increased commitment of the industry to plug-in hybrid and all-electric vehicles (xEV). Combining both portfolios and competencies will significantly accelerate the time-to-market for new products based on compound semiconductors.

Next-generation cellular infrastructure standards such as 5G and beyond will use frequencies up to 80 gigahertz. Only advanced compound semiconductors can deliver the required efficiencies at these high frequencies. GaN-on-Si allows higher levels of integration and offers its advantages at operating frequencies of up to 10 gigahertz. GaN-on-SiC enables maximum efficiency at frequencies of up to 80 gigahertz. Both technologies are crucial for next generation cellular infrastructure standards. Together with its Si-based LDMOS products Infineon is the industry’s most complete provider for RF power components.

The combined portfolio advances Infineon’s strategic “Product to System” approach. Additionally, Infineon will benefit from accelerating the adoption of SiC- and GaN-based components in early-adopter markets, e.g. electro-mobility, high-end photovoltaic inverter, xEV charging infrastructure, and RF power components in cellular infrastructure.

The business to be acquired by Infineon has generated pro-forma revenues of US Dollar 173 million in the twelve months ending March 27, 2016. The acquisition will be immediately accretive to Infineon’s adjusted earnings-per-share and margin. Infineon will fund the transaction with bank financing of US Dollar 720 million and US Dollar 130 million of cash-on-hand. Infineon will maintain its strong balance sheet after the cash- and debt-financed transaction. Infineon’s capital structure will stay well within the previously communicated targets of Euro 1 billion gross cash plus 10 to 20 percent of revenue, and no more than two times the gross debt-to-EBITDA.

Cree’s Board of Directors and Infineon’s Supervisory Board have approved the acquisition. The closing of the transaction is subject to regulatory approvals in various jurisdictions and is expected by the end of calendar year 2016.

Leti, an institute of CEA Tech, and the Korea Institute of Science and Technology (KIST) today announced an agreement to jointly explore a variety of technologies, including monolithic 3D, neuromorphic architectures, non-volatile 3D memory, spintronics and ultra-low power semiconductors.

The five-year joint project also will focus on creating a broad network to foster international collaboration on ultra-low power semiconductors, which both institutes agree will be required to power the ever-increasing spread of digital devices and the Internet of Things.

“Like Leti, KIST has helped set the standards for government-supported research institutes for 50 years,” said Leti CEO Marie Semeria. “This agreement reflects that we have identified numerous vital technology fields that must be developed to make industry more productive, companies more innovative and society more responsive to people in many aspects of their lives.”

“Post-Silicon Semiconductor Institute (PSI) of KIST is playing a key role in semiconductor R&D in Korea. With this agreement, KIST and Leti will strengthen the collaborative relationship to achieve global leadership in the field of semiconductors.” said KIST president Byung Gwon LEE.

Leti partners with large industrials, SMEs and startups to tailor advanced solutions that strengthen their competitive positions. It has launched 59 startups. Its 8,500m² of new-generation cleanroom space feature 200mm and 300mm wafer processing of micro and nano solutions for applications ranging from space to smart devices. With a staff of more than 1,900, Leti is based in Grenoble, France, and has offices in Silicon Valley, Calif., and Tokyo.

KIST is a multi-disciplinary research institute located in Seoul, S. Korea. Founded in 1966, it is the first multi-disciplinary scientific research institute in Korea and has contributed significantly to the economic development of the country, particularly during the years of accelerated growth in the 1970s and 1980s.

9:00 am – 10:00 am
“CONNECT” Executive Summit
SEMI’s Denny McGuirk moderates a panel of execs from Lam, Qualcomm, Intel and Entegris
Keynote Stage

9:00 am – 3:00 pm
Women in Technology Forum
Room 304, Esplanade

12:30 am –2:00 pm
The Business Case for Supplier Diversity: Why it Matters to You
Intel presentation and panel discussion
Rm 308, Esplanade

1:00 pm – 5:00 pm
From Collision to Convergence: Co-creating Soutions in the Semiconductor and MEMS/Sensors Industries
San Francisco Marriott Marquis

2:00 pm – 4:00 pm
World of IoT Innovation
Innovation and IoT Theater

3:00 pm –4:30 pm
Bulls & Bears Panel
W Hotel