Category Archives: Device Architecture

200mm fabs reawakening


July 13, 2016

By David Lammers, Contributing Editor

Buoyed by strong investments in China, 200mm wafer production is seeing a re-awakening, with overall 200mm capacity expected to match its previous 2006 peak level by 2019 (Figure 1).

Figure 1. By 2019, 200mm fab capacity should be close to the previous peak seen in 2006, according to SEMI. Several new 200mm fabs are expected to open in China. (Source: SEMICON West presentation by Christian Dieseldorff).

Figure 1. By 2019, 200mm fab capacity should be close to the previous peak seen in 2006, according to SEMI. Several new 200mm fabs are expected to open in China. (Source: SEMICON West presentation by Christian Dieseldorff).

Speaking at a SEMI/Gartner market symposium at SEMICON West, SEMI senior analyst Christian Dieseldorff said over the next few years “we don’t see 200mm fabs closing, in fact we see new ones beginning operation. To me, that is just amazing.”

The numbers back up the rebound. Excluding LEDs, the installed capacity of 200mm fabs will reach about 5.3 million wafers per month (wspm) in 2018, almost matching the 2007 peak of 5.6 million wspm. As shown in Figure 1, By 2019 as new 200mm fabs start up in China, 200mm wafer production will surge beyond the previous 2007 peak, a surprising achievement for a wafer generation that began more than 25 years ago. Figure 2 shows how capacity, which held steady for years, is now on the increase.

Figure 2. 200mm fab capacity, which remained relatively constant for years, is now increasing.

Figure 2. 200mm fab capacity, which remained relatively constant for years, is now increasing.

Case in point: On the opening day of Semicon West, Beijing Yangdong Micro announced a new OLED 200mm fab that will be opening in the second half of 2018 to make OLED drivers, according to Dieseldorff.

Over the past few years, Japan-based companies have closed 10 200mm fabs, mostly outdated logic facilities, while expanding production of discrete power and analog ICs on 200mm wafers. But with China opening several new 200mm fabs and the expansions of existing 200mm fabs worldwide, SEMI sees an additional 274,000 wafer starts per month of 200mm production over the 2015-2018 period, adding expansions and additional fabs, and subtracting closed facilities.

“One message from our research is that we believe the existing 200mm fabs are full. Companies have done what they can to expand and move tools around, and that is coming to an end,” he said. SEMI reckons that 19 new 200mm fabs have been built since 2010, at least six of them in China.

SEMI’s Christian Dieseldorff.

SEMI’s Christian Dieseldorff.

Dieseldorff touched on a vexing challenge to the 200mm expansion: the availability of 200mm equipment. “People have problems getting 200mm equipment, used and even new. The (200mm) market is not well understood by some companies,” he said. With a shortage of used 200mm equipment likely to continue, the major equipment companies are building new 200mm tools, part of what Dieseldorff described as an “awakening” of 200mm manufacturing.

 

China is serious

Sam Wang, a research vice president at Gartner who focuses on the foundry sector, voiced several concerns related to 200mm production at the SEMI/Gartner symposium. While SMIC (which has a mix of 200mm and 300mm fabs) has seen consistently healthy annual growth, the five second-tier Chinese foundries – — Shanghai Huahong Grace, CSMC, HuaLi, XMC, and ASMC — saw declining revenues year-over-year in 2015. Overall, China-based foundries accounted for just 7.8 percent of total foundry capacity last year, and the overall growth rate by Chinese foundries “is way below the expectations of the Chinese government,” Wang said.

The challenge, he said, is for China’s foundries which rely largely on legacy production to grow revenues in a competitive market. And things are not getting any easier. While production of has shown overall strength in units, Wang cautioned that price pressures are growing for many of the ICs made on 200mm wafers. Fingerprint sensor ICs, for example, have dropped in price by 30 percent recently. Moreover, “the installation of legacy nodes in 300mm fabs by large foundries has caused concern to foundries who depend solely on 200 mm.”

But Wang emphasized China’s determination to expand its semiconductor production. “China is really serious. Believe it,” he said.

New markets, new demand

The smart phone revolution has energized 200mm production, adding to a growing appetite for MEMS sensors, analog, and power ICs. Going forward, the Internet of Things, new medical devices, and flexible and wearable products may drive new demand, speakers said at the symposium.

Jason Marsh, director of technology for the government and industry-backed NextFlex R&D alliance based in San Jose, Calif., said many companies see “real potential” in making products which have “an unobtrusive form factor that doesn’t alter the physical environment.” He cited one application: a monitoring device worn by hospital patients that would reduce the occurrence of bed sores. These types of devices can be made with “comparatively yesteryear (semiconductor) technology” but require new packaging and system-level expertise.

Legacy devices made on 200mm wafers could get a boost from the increasing ability to combine several chips made with different technologies into fan out chip scale packages (FO CSPs). Bill Chen, a senior advisor at ASE Group, showed several examples of FO CSPs which combine legacy ICs with processors made on leading-edge nodes. “When we started this wafer-level development around 2000 we thought it would be a niche. But now about 30 percent of the ICs used in smart phones are in wafer-level CSPs. It just took a lot of time for the market forces to come along.”

More coverage from this year’s SEMICON West can be found here.

Semiconductor manufacturers and their suppliers – both process tool vendors and providers of sub-fab systems – are looking to an open industrial networking methodology, EtherCAT, developed by Beckhoff Automation (Verl, Germany; m.beckhoff.com) to address the increasingly stringent control requirements of emerging high-precision processes.

During SEMICON West, early adopters are promoting EtherCAT as a next-generation real-time Ethernet control solution, with a variety of attributes: it is fast (good for controlling ever-more precise process recipes), open, and extendable to many more nodes than existing networking protocols. Those attributes make EtherCAT attractive to tool makers such as Applied Materials, Lam Research, and Tokyo Electron Ltd., as well as sub-systems suppliers such as Edwards (Crawley, England).

Fab managers increasingly are looking ahead to the availability of predictive maintenance and other data-based productivity approaches, all of which require fast, extendable networks.

EtherCAT is fast enough for near real-time control. Andrew Chambers, a product manager at Edwards, gave the example of a process recipe that requires a change in gas flow, resulting in a deviation in chamber pressure. To maintain good process control the pressure controller must respond to the change in flow as quickly as possible in order not to lose time as the process chamber conditions stabilize. The EtherCAT control architecture can enable the change in flow, and pre-emptively adjust the pressure control, in real time, using a central controller over the EtherCAT network, rather than relying on the devices responding individually to changes in circumstances.

Increasingly, shrinking device geometries and the trend towards “atomic-scale engineering” are putting pressure on the process tools to control all process parameters with high precision in real time. EtherCAT supporters argue that with very short cycle times and response rates, real-time process control becomes realizable, overcoming the problems that arise from serial control and looped-in control, which can introduce delays in the system.

Edwards’ Gerald Shelley said as tool vendors seek to improve processes, they may need to reduce individual process steps to less than one second. That in turn requires a fast network to enable parameter changes at a correspondingly high rate.

Beckhoff Automation developed EtherCAT based on a specific functional principle, they describe it as “processing on the fly,” which supports very short cycle times. EtherCAT’s rapid response times have therefore proved attractive to semiconductor process tool developers, Shelley said.

Flexibility, another key virtue, allows EtherCAT to support more than 65,000 nodes on a network. “It’s extendable. It can be reconfigured. And there is an emerging option where the network itself can provide power to the devices attached to the network, which reduces the cabling requirements to the system,” Chambers said. Pre-existing, conventional fieldbus networks can be added to the EtherCAT network as additional nodes. “If you’ve got a pre-existing system that you want to integrate into something new that has an EtherCAT network, then you can do that,” he also noted.

As an open protocol network, any party can use EtherCAT, which is described in international standards.

“It has the benefit that it doesn’t need any particularly special infrastructure components to make it run. There’s not a special master device. The devices themselves can incorporate the EtherCAT protocol. You can simply plug a device into the network and have it run. That makes it relatively easy to use,” Shelley added.

Toolmakers, such Applied Materials, Lam Research and Tokyo Electron Ltd., currently use a wide variety of tool control systems on their diverse product ranges. EtherCAT is seen as a route towards a common, adaptable control architecture that could support a diversity of process tools on a common platform.

Beckhoff Automation, with about 3,000 employees worldwide, has worked with its business partners to set up the EtherCAT Technology Group to further develop EtherCAT. The technology group currently has 3,810 members, up from just 300 in 2006.

“There will be open standards so that they’re available to all interested parties, but in particular the profiles of the devices which can be added to any EtherCAT network, the profiles which control how devices respond and communicate with a network, are being generated and developed by the supplier working groups, of which Edwards is a member. We, along with a wide range of other sub-system suppliers are developing devices to meet the requirements for installation in EtherCAT networks, to be able to provide the functions and features that are needed by the semiconductor industry,” Shelley said.

In the future, process tool manufacturers will be able to select from a range of devices with similar functionality which will fit on the same network, so it reduces the dependency of toolmakers on specific individual suppliers. This enables process tool makers to develop advanced bespoke control algorithms and address emerging process challenges.

“From a total process control perspective, our view is that as high volume manufacturing moves towards smaller and smaller nodes, introduction of those processes is going to depend on a complete sub-fab process solution per process tool. These solutions will be based on some kind of integrated best-known method that describes how you set up the sub-fab equipment to deliver what the process vendor needs,” Chambers added.

Predictive maintenance, Intelligent devices

Next-generation sub-fab systems will require the ability to analyze data gathered within the system, or within the submodules within the system. The system will be comprised of intelligent devices, all generating data. “The question that we all have to address is how do you turn huge amounts of data into useful information. We believe that the manufacturer of the sub-fab equipment is well placed to turn raw data into useful information, which then can be relayed to the process tool,” Chambers said.

Relaying that information to the process tool is where the EtherCAT network plays an important role. “The sub-fab equipment could be hooked up to the process tool control network as a node on the EtherCAT network, despite the fact that what’s going on within the integrated sub-fab system doesn’t depend on EtherCAT for its functionality,” he said.

The process tool and the sub-fab equipment are able to exchange operational data or information in real time over an EtherCAT network. “That means if things are happening in the process tool that would benefit from a change in what’s happening in the sub-fab, then that data can be shared, and the sub-fab equipment can adapt itself to whatever the process tool is doing at that specific time, with the result that new and more efficient modes of operation are possible across the tool” he added.

“The equipment in the sub-fab will be generating vast amounts of data. Our intent is that the sub-fab equipment itself processes the data to turn it into information, and the kinds of information that we’re talking about is working up predictive maintenance algorithms so you can effectively predict when, for example, a dry pump or abatement system is going to need service attention, with sufficient advance notice that it can be scheduled into the process tools job schedule,” he said.

“The key point is neither a process toolmaker nor a sub-fab equipment supplier is able to do this in isolation. The whole thing becomes an iterative partnership between the tool operator, the OEM, and the sub-fab equipment maker. Going forward, we can see the emergence of process-specific predictive algorithms as a necessary requirement to enable fully cost-effective device manufacturing,” Chambers said.

Leti, a CEA Tech institute, today announced it has developed a new on-chip communications system to improve high-performance computing (HPC) that is faster and more energy efficient than current solutions and is compatible with 3D architectures.​

Leti researchers, working in the frame of IRT Nanoelec, boosted computing power and slashed energy consumption by stacking chips on top of each other in a single enclosure, or by placing the chips side by side on a silicon interposer. The chips, which have progressed from demonstrator to fabrication-ready, exchange data via a new communications network that is part of the network on chip (NoC) called 3D-NoC.

3D-NoC technology has been demonstrated with a homogeneous 3D circuit that is comprised of regular tiles assembled using a 4x4x2 NoC. It also features robust and fault-tolerant asynchronous 3D links, and provides 326 MFlit/s @ 0.66 pJ/bit. It was fabricated in a CMOS 65nm technology using 1,980 TSVs in a Face2Back configuration.

This second generation 3D-NoC technology has been integrated in the INTACT circuit developed in the frame of IRT Nanoelec. The 3D circuit, currently in foundry, combines a series of chiplets fabricated at the FDSOI 28nm node and co-integrated on a 65nm CMOS interposer.  The active interposer embeds several lower-cost functions, such as communication through the NoC and system I/Os, power conversion, design for testability and integrated passive components.

Moreover, the chip requires 20 times less energy for data transmission than chips placed on an electronic circuit board. This new IP is compatible with standard remote direct-memory-access-type software used for data transmission and has likely industrial uses in virtual-server migration applications.

“The steady rise in the number of applications that require high-performance computing creates a demand for new hardware-plus-software communications solutions that improve both performance and energy consumption,” said Denis Dutoit, Leti strategic marketing manager. “This new technology brick makes it possible to transfer data between processors via a network-on-chip delivering more powerful, energy-efficient computing.”

Leti will host its annual workshop during Semicon West on “Sensing your Future with Leti” at 5 p.m., July 12, at the W Hotel.  Registration is here.

Leti scientists will be available at booth #2028 in the South Hall during Semicon West to discuss this announcement and other recent research developments and initiatives.

By Pete Singer, Editor-in-Chief

On Monday, imec – the Leuven Belgium-based research consortium – hosted its annual imec Technology Forum (ITF) USA, a half-day conference at the Marriott Marquis. With the theme ‘Towards the Ultimate System’, imec’s speakers and industrial keynote speakers looked at the co-optimization of design and new technology, and how technology innovation can deliver the right building blocks to build these systems.

Delivering the keynote address at the event was Luc Van den hove, President and CEO of imec. He talked about how the world was in the middle of a decade of digital disruption brought about by integrated circuit innovation. He then provided an outlook of how the industry could continue to stay on the path defined by Moore’s Law by moving to nanowires and the 3rd dimension.

Luc van den hove, president and CEO of imec, tipped his hat to Gordon Moore, showing a short video clip and describing a future where Moore’s Law will live on through 3D integration.

Luc van den hove, president and CEO of imec, tipped his hat to Gordon Moore, showing a short video clip and describing a future where Moore’s Law will live on through 3D integration.

Van den hove noted what he said were obvious example of disruption today: Uber, the world’s largest taxi company that doesn’t own any taxis. Airbnb, the world’s largest accommodation provider that doesn’t own any real estate. Facebook, the world’s largest media provider, that doesn’t generate any media content.

“These are just a few examples, but we will see this kind of disruption everywhere, in every market and every segment,” he said. “Companies will have to adapt. They will have to reposition themselves in the value chain and come up with new business models. This is just the beginning.”

What’s made this disruption possible is IC technology and ubiquitous mobile computing. What’s been particularly beneficial over the last 50 years is that, in addition to the increased functionality that comes with scaling, there were advantages of faster operation at lower power. “This combination of effects that occurs simultaneously with scaling has resulted in the phenomenal evolution,” he said.
After a short video clip of Gordon Moore talking about the benefits of microprocessors, Van den hove give a realistic view of the future.

“Today, there is a lot of debate about the continuity of Moore’s Law. Yes, we’re faced with several tradeoffs. It’s getting harder and harder (to scale) and when we scale down our transistors we do not automatically the performance improvement that we used to with previous generations,” he said. “But we are sure there are sufficient solutions out there that will allow us to continue Moore’s legacy for several more decades. I am convinced that scaling will not only continue, it has to continue. If you want to enable the IoT wave, we will have to succeed in extending Moore’s law to generate the required compute power and storage capacity.”

Van den hove added that Moore’s Law is on the verge of morphing. “We will need other techniques in order to realize this complexity increase,” he said. “We will continue 2D scaling. It will evolve from the FinFET that is in mass production today towards horizontal nanowires, towards most likely vertical nanowires. This will bring us to at least the 3nm generation if not one or two generations more. This will keep us busy for the next 10-15 years.”

He stood by his past comments on the production-worth status of EUV. “To enable this, we will need a cost-effective lithography. We absolutely need EUV lithography to make this happen. I’m sure, based on the progress I’ve seen over the last 12 months, that EUV is ready to enter manufacturing. But we have to be realistic. Eventually, 2D scaling will slow down. I’m not saying it’s going to stop. But it’s getting harder and harder and hence it will require more time to transition from one geometry-based node to the next geometry node. We will need other ways to compensate for this gradual slowdown. One of the obvious ways to do so is to start using more extensively the third dimension, as the memory guys have started to do already,” he said.

Van den hove presented a future where devices are stacked on top of one another like Lego blocks. “Once we are using these vertical nanowires, it’s not so difficult to imagine that we may be stacking those transistors on top of each other – stack an n-FET on top of a p-FET and realize an SRAM cell. It’s obvious that such a 3D version of an SRAM cell has a much smaller footprint than its 2D equivalent. Once we can do that, we can even imagine that we may start stacking some of these building blocks on top of each other,” he said.

“It’s more straightforward to imagine that this can be done with a regular structure such as an SRAM design, but also FPGAs are very regular structures. We can even imagine that we could design random logic and design standard cells within the constraints of such a 3D Lego block and build up a logic circuit with these Lego blocks in a 3D fabric,” he continued.

Heterogeneous integration with photonics is also on the drawing board. “We will combine this also with 3D heterogeneous integration where we will be using chip stacking technology with high bandwidth, high density through silicon vias. We can then combine all these layers with 3D stacking and through-silicon vias, integrate all of this on an interposer, which can also be the substrate to integrate these 3D cubes,” he said. “By adding also photonics on such an interposer, we can also realize optical IOs. This is just another rendition of Moore’s Law which will allow more complexity in a smaller form factor.”

Photoresist manufacturers had reason to smile as fiscal 2015 closed, with sales growing nicely to $1.37B, a 6.2% increase over 2014. That bump has to sustain them through 2020, according to a new report from Techcet Group, “Critical Materials Report: Photoresists and Extensions and Ancillaries 2016.” Total volumes for photoresist and extension materials continue to grow with wafer starts, although revenues are expected to hover around $1.4B for the next 4 years. Growth from wafer starts in partially offset by reductions in photoresist thicknesses for critical layers in leading edge devices.

Virtually all of the growth in lithography materials can be attributed to volume growth in advanced nodes. While the 5 year CAGR outlook for silicon wafer starts is -2% for the 45nm node and larger, that same outlook is +10% for the 28nm node and smaller. ArF (193nm wavelength) resists already comprise over 40% of the total market. Extreme ultra-violent lithography (EUVL @ ~13nm wavelength) remains in the forecast for 2020, but it will be limited to mix-and-match implementation at the 10nm node due to its premium cost and low throughput. Nano-Imprint Lithography (NIL) is in limited use by one Asian memory fab. Multi-patterning with 193nm immersion will remain the workhorse for all leading edge IC fabs.

The category of resolution “extension” materials to enable finer feature patterning grows out of the segment for bottom anti-reflection coatings (BARC) and spin-on hard-masks (HM), which can be combined with a top layer of photoresist in a so-called “Tri-Layer Resist” (TLR) approach. Extensions also include specialty chemical formations to “trim” lines by removing photoresist material, or to “shrink” holes by adding material to sidewalls. The extension materials market is now the fastest growing segment, already at $650M in 2015 it is forecast to reach $790M by 2020, as detailed in TECHCET’s Report.

The photoresist ancillary segment that includes strippers/removers, developers, edge-bead removers (EBR) and specialty solvents is expected to suffer a slow decline from today’s $600M to $575M by 2020, primarily due to volume reductions associated with thinner photoresists. Also, ancillaries are generally sourced in large quantities from local suppliers, and regional pricing pressures further depress revenues in this sub-market.

There are six major suppliers controlling 90% of the global resist market, with a total of eleven key manufacturers offering standard and advanced photoresist products and critical ancillaries. JSR and TOK share 53% of the market, with others at 12% or less. In addition to market analysis, critical supply chain issues and technical trends, the report includes profiles and updates for major suppliers of photoresist and related materials to the global semiconductor industry.

Imec, a nanoelectronics research center, today announced the opening of imec Florida, a new entity focusing on photonics and high-speed electronics IC design based in Osceola, Florida. Imec Florida kicked off with the signing of a collaboration agreement with the University of Central Florida (UCF), Osceola County and the International Consortium for Advanced Manufacturing Research (ICAMR), that is setting up fab facilities for the development and production of highly innovative III-V-on-silicon solutions for a broad range of applications including sensors, high-speed electronics and photonics.

Imec Florida will be established as a design center facilitating the collaboration between imec’s headquarters, based in Leuven, Belgium, and U.S.-based semiconductor and system companies, universities, and research institutes. Imec Florida’s initial focus will be the R&D of high speed electronics and photonics solutions, starting with an offering of IC design research for a broad set of semiconductor-based solutions such as THz and LIDAR sensors, imagers, and a broad range of sensors.  It will also provide IC design needs that will be driving the ICAMR manufacturing research. Through imec Florida, imec’s design, prototyping and low-volume production service – also named imec IC-link – will provide the US market low-cost access to advanced foundry services, helping entrepreneurs to (industry and academia) design innovative products and get them to market.

Funding for imec Florida will come from Osceola County, and the University of Central Florida. The new center will attract top talent through future strategic partnerships, with the aim to employ about 10 scientists and engineers by the end of the year and increase to 100 researchers in the next five years. Heading up the facility as General Manager will be imec’s Vice President Bert Gyselinckx who previously served as general manager at imec in Eindhoven, the Netherlands and helped to co-invent many technologies deployed by innovative semiconductor and consumer electronics companies.

“As the U.S. semiconductor market continues to strengthen with semiconductor manufacturing, equipment, materials and system innovation, we are extremely pleased to collaborate with partner organizations in Florida and see Osceola County in the Orlando region as an interesting location to drive the next phase of imec’s growth and innovation,” stated Luc Van den hove, president and CEO of imec. “Together with industrial and academic partners, we want to develop sustainable solutions and technology to accelerate innovation and stimulate economic growth within Osceola County and the State of Florida.”

“Imec’s international prestige gives us the opportunity to leverage its standing in a field that is growing exponentially in order to recruit more partners and funding for our work at the new Design Center and the Florida Advanced Manufacturing Research Center,” said Osceola County Commission Chairwoman Viviana Janer. “The relationships and people that imec brings to our operation are tangible ways that Osceola County’s 5-year, $15 million investment will be more than re-paid. It’s important to realize that the new Design Center is going to capture the attention of everyone in this field, thereby ensuring maximum utilization and value of the FAMRC.”

“The imec Design Center is the funnel that will fill ICAMR with high-value manufacturing opportunities and we will work closely with them to make sure our capabilities tightly align with their technology direction, said ICAMR CEO Chester Kennedy.  “This partnership is poised to shine the global high-tech spotlight on Central Florida.”

On July 11, 2016, imec will introduce imec Florida to the semiconductor industry at its annual Imec Technology Forum (ITF) USA, a half-day conference in San Francisco Calif., at the Marriott Marquis. ITF USA is part of imec’s prestigious worldwide ITF events, organized in conjunction with SEMICON West and supported by SEMI. With the theme ‘Towards the Ultimate System’, imec’s highly acclaimed speakers and industrial keynote speakers will look at the co-optimization of design and new technology, and how technology innovation can deliver the right building blocks to build these systems.

The health of the semiconductor industry is increasingly tied to the health of the worldwide economy. Rarely can there be strong semiconductor market growth without at least “good” worldwide economic growth to support it. Consequently, IC Insights expects annual global semiconductor market growth rates to continue to closely track the performance of worldwide GDP growth (Figure 1).  In its upcoming Mid-Year Update to The McClean Report 2016 (to be released at the end of July), IC Insights forecasts 2016 global GDP growth of only 2.3%, which is below the 2.5% level that is considered to be the global recession threshold.

Figure 1

Figure 1

In many areas of the world, local economies have slowed.  China, which is the leading market for personal computers, digital TVs, smartphones, new commercial aircraft, and automobiles, is forecast to continue to lose economic momentum in 2016.  Its GDP is forecast to increase 6.6% this year, which continues a slide in that country’s annual GDP growth rate that started in 2010 when growth rates exceeded 10%.

IC Insights believes that the worldwide economy will be negatively impacted, at least over the next year or two, by the Brexit vote this past June.  At this point, since the U.K. is unlikely to officially be able to leave the European Union (EU) for a couple of years, the biggest negative effect on economic growth is the uncertainty of the entire situation.  Some of the uncertainty created by the vote includes:

•    Whether the U.K. will actually leave the EU.  Since the Brexit vote is not legally binding, and still needs to be approved by the U.K. government, there is uncertainty if its departure from the EU will actually happen.

•    Whether the U.K. will come apart itself.  There are rumblings about Scotland breaking away from being a part of the U.K. in order for it to remain as part of the EU.

•    What trade deals will be made by the U.K. if it does leave the EU?  As part of its exit from the EU, the U.K. will need to establish numerous new trade deals with the EU.  There is tremendous uncertainty regarding whether these deals would have a positive or negative effect on the U.K. economy.

•    Will other countries follow the U.K. and depart from the EU?  Anxiety persists over whether the EU will fall apart as other countries attempt their own exit.  Some countries mentioned as possibly following the U.K. out of the EU include the Netherlands (Nexit), France (Frexit), Italy, Austria, and Sweden (Swexit).

The other major “culprit” dragging down semiconductor industry growth this year is the very weak DRAM market.  At $45.0 billion, the DRAM market was the largest single product category in the semiconductor industry in 2015.  IC Insights forecasts that the DRAM market will register a 19% drop of $8.5 billion this year to $36.5 billion.  The DRAM market alone is forecast to shave three percentage points off of total semiconductor market growth this year. Semiconductor market growth excluding DRAM is forecast to be +2%.

Most of the DRAM market decline expected for this year is due to a rapid decline in DRAM pricing over the past 18 months.  For 2016, the average price for a DRAM device is forecast to drop to $2.55, a steep 16% decline as compared to 2015’s DRAM ASP of $3.03. Further trends and analysis relating to semiconductor market forecasts through 2020 will be covered in the 250-plus-page Mid-Year Update to the 2016 edition of The McClean Report.

Lattice Semiconductor Corporation (NASDAQ:LSCC) today announced that its Board of Directors has appointed Brian Beattie to the Company’s Board of Directors and Audit Committee. Mr. Beattie brings to the Board more than 35 years’ experience in finance, business operations, information technology, corporate development and strategy.

Mr. Beattie is currently Executive Vice President, Business Operations, and Chief Administrative Officer of Synopys, Inc. (NASDAQ: SNPS), where he served as Chief Financial Officer from January 2006 to December 2014. Prior to joining Synopsys, Mr. Beattie was Chief Financial Officer and Executive Vice President of Finance and Administration at SupportSoft for 6 years. He was instrumental in growing the business and helped lead the company from the start-up phase through its successful IPO in 2000. Mr. Beattie began his career at Nortel Networks where over a 19 year period he took on increasing corporate, financial and operational responsibilities, and rose to become the finance executive responsible for the company’s merger and acquisition strategy. He earned both his Bachelor of Commerce degree and MBA in International Finance and Management from Concordia University in Montreal, Canada.

John Bourgoin, Lattice’s Chairman of the Board, commented, “We are very pleased to have Brian join our Board of Directors given his proven track record. He brings substantial additional financial and operations expertise to our Board, which will be helpful as the Company continues to execute on its business strategy and lays the groundwork for its longer-term growth.”

According to the latest market research report by Technavio, the semiconductor chip handler market is expected to grow at a CAGR of over 4% until 2020.

In this report, Technavio covers the present scenario and growth prospects of the global semiconductor chip handler market for 2016-2020. To calculate the market size, we consider the revenue generated from the sales of automated test equipment and the contribution of chip handlers in the automated test equipment market.

“A large number of fabless semiconductor companies are increasing the net aggregate demand for semiconductor ICs, creating the demand for automated test equipment. An increase in test houses has resulted in a rising number of potential automated test equipment customers, boosting revenue sales of market vendors,” said Asif Gani, one of Technavio’s lead industry analysts for semiconductors.

Semiconductor chip handler market in APAC: largest region

The global chip handler market in APAC was valued at USD 469.8 million in 2015. Taiwan, South Korea, China, and Japan are the key countries contributing to the growth of this region. The presence of prominent semiconductor foundries, such as Taiwan Semiconductor Manufacturing Company, United Microelectronics Corporation, and Semiconductor Manufacturing International, is creating the demand for chip handlers in APAC. The increase in the demand for consumer electronics and the rollout of LTE technology have led to an expansion of LTE base station infrastructure in China, increasing the demand for semiconductor ICs. These ICs need to be tested to avoid glitches and snags, thereby creating the demand for chip handlers.

The presence of prominent mobile and consumer electronic device manufacturers such as Samsung, LG, Fujitsu, and Panasonic in APAC is supporting the demand for semiconductor devices and thereby the demand for chip handlers in the region.

Semiconductor chip handler market in the US: second largest region

The global chip handler market in the US was valued at USD 104.4 million in 2015. The sports nutrition market in Europe is growing steadily. The increase in the demand for communication devices, such as smartphones and phablets, and automobile applications has been driving the production of semiconductor ICs in the US. The presence of few prominent semiconductor manufacturers, such as GlobalFoundries and Intel that fabricate wafers of sizes 200 nm and 300 nm, will create the demand for chip handlers in the nation.

Semiconductor chip handler market in Europe

The global chip handler market in Europe was valued at USD 43.96 million in 2015. Infineon Technologies, NXP Semiconductors, and STMicroelectronics are among the semiconductor manufacturing companies that account for the majority market share in this region. However, Europe will contribute low revenue to this market during the forecast period due to small concentrations of semiconductor IC manufacturers compared to APAC and the US. In addition, the Euro crisis in 2009 compelled many manufacturers to shift their semiconductor manufacturing facilities to APAC due to the availability of cheaper resources. This is likely to reduce the demand for chip handlers in the region during the forecast period.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $26.0 billion for the month of May 2016, an increase of 0.4 percent compared to the previous month’s total of $25.9 billion, but a decrease of 7.7 percent compared to the May 2015 total of $28.1 billion. Month-to-month sales into all regional markets held relatively steady, with China leading the way with 3.1 percent market growth. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The small uptick in global semiconductor sales in May marked the market’s largest month-to-month growth in six months, but the overall landscape remains somewhat stagnant due to soft demand and unfavorable macroeconomic conditions,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Most regional markets have struggled to gain traction in 2016, with the Americas falling well behind sales posted through the same point last year. Sales of analog products were a bright spot in May, notching both month-to-month and year-to-year increases.”

Regionally, month-to-month sales increased in China (3.1 percent), but slipped slightly in the Americas (-0.1 percent), Europe(-0.8 percent), Asia Pacific/All Other (-0.8 percent), and Japan (-1.8 percent). Year-to-year sales increased marginally in Japan(0.4 percent), but dropped in China (-0.5 percent), Europe (-8.8 percent), Asia Pacific/All Other (-11.5 percent), and the Americas (-15.0 percent).

May 2016

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

4.78

4.78

-0.1%

Europe

2.64

2.62

-0.8%

Japan

2.60

2.55

-1.8%

China

7.80

8.04

3.1%

Asia Pacific/All Other

8.03

7.96

-0.8%

Total

25.85

25.95

0.4%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

5.62

4.78

-15.0%

Europe

2.87

2.62

-8.8%

Japan

2.54

2.55

0.4%

China

8.08

8.04

-0.5%

Asia Pacific/All Other

9.00

7.96

-11.5%

Total

28.11

25.95

-7.7%

Three-Month-Moving Average Sales

Market

Dec/Jan/Feb

Mar/Apr/May

% Change

Americas

5.03

4.78

-5.0%

Europe

2.66

2.62

-1.5%

Japan

2.47

2.55

3.0%

China

8.03

8.04

0.2%

Asia Pacific/All Other

7.83

7.96

1.6%

Total

26.03

25.95

-0.3%