Category Archives: Device Architecture

By Jean-Eric Michallet, Leti Vice President for Sales and Marketing

The pervasiveness of the Internet of Things (IoT) and its connections ranging from $1 objects to connected cars requires security to be reliable, simple, safe and affordable. Because the Internet of Things is made up of objects (hardware) connected to a network (software), security has to be factored in from the application or use’s conception. In short, assuring IoT security will require strategies to manage the entire value and supply chains.

Attendees at the recent Leti Innovation Day 2016 in Lyon, France, heard several variations of that message from industry experts and Leti scientists, against a backdrop of a proliferation of security and data threats.

Didier Lamouche, CEO of Oberthur Technologies, a provider of embedded security software products and services, noted industry forecasts of 10 billion connected devices shipped annually by 2020. This amounts to an exponential increase in security risks, as well. “This is the wave we have to catch,” he said.

Security is a brand problem

Recalling the 2013 data breach at Target in the U.S., in which 40 million credit and debit card numbers and 70 million items of customer personal information were compromised, Lamouche said that cybersecurity is not only a problem for security officers and CIOs. It has become a problem for CEOs and board of directors, as the 2014 resignation of Target CEO Gregg Steinhafel showed. In fact, he said, cybersecurity is becoming a brand problem, because of the severe damage fraud and data breaches can cause for a company.

Retail is not the only at-risk industry. Lamouche noted that more than 76 million Sony PlayStation user accounts were breached and 3.6 million connected vehicles in the U.S. and Europe have been hacked.

In recent years, “card not present” (CNP) transactions, primarily online purchases, accounted for approximately 65 percent of fraud in Europe, Australia and Canada, and 49 percent in the U.S., which still amounted to $6 billion in 2014.

Credits cards with continuously updated security codes

To address the growth of CNP fraud, Oberthur has developed MOTION CODE for credit card issuers. It secures online transactions by automatically and randomly updating a cryptogram security code on the back of the card. If the card is lost or stolen, it can be rendered useless quickly.

Keynoting the session on “Strengthening Security with Advanced Technologies,” Jean-Marie Saint-Paul, Europe application director for Mentor Graphics, outlined numerous security challenges involving hardware. 

Who can you trust?

Thieves looking for ways to steal money, companies looking for competitors’ vulnerabilities and even users “playing” with the system can create risks. The supply chain presents numerous risks, as well. Specific hardware challenges include:

  • A “vast space” of possible intrusions during IC, printed circuit board and embedded design and in the supply chain
  • Unknown bugs and frequent field updates that open back doors for attackers
  • The “fading of a trusted foundry” and proposed solutions that may not be viable
  • Counterfeit ICs that cause economic loss similar to yield loss discovered much later
  • For mission-critical apps, fake ICs that compromise devices risking security and safety

“Whatever structure we put in place, we have to put it in place with something we trust,” he said.

Digital disruption across the board

Borrowing information from IBM, Saint-Paul closed his presentation with a slide that highlights some of the most disruptive changes in business, industry and society at large that digital technology has enabled.

  • World’s largest taxi company owns no taxis (Uber)
  • Largest accommodation provider owns no real estate (Airbnb)
  • Largest phone company owns no telco infrastructure (Skype)
  • World’s most valuable retailer owns no inventory (Alibaba)
  • Most popular media owner creates no content (Facebook)
  • Fastest-growing banks have no actual money (SocietyOne)
  • World’s largest movie house owns no cinemas (Netflix)
  • Largest software vendors don’t write apps (Apple, Google)

The slide also asked when disruption will happen in semiconductors and electronics, when the world’s largest trusted foundry will own no fab or equipment, the top trusted contract manufacturer will own no assembly line and the leading secure electronics supplier will not purchase boards or chips. Will it be true? Maybe not, Saint-Paul said, but the industry needs some new models to reinvent itself.

Sameer Sharma, general manager of Intel’s IoT Group, said the IoT will provide pervasive, real-time intelligence from the physical world to data centers and the cloud: mobile devices via networks, and industrial and home applications via gateways. He cited a projection of 50 billion devices sharing 44 zetabytes of data.

Intel and Leti recently signed a multi-year collaboration agreement involving a variety of subjects such as making the IoT more secure, enabling 5G networks and device innovation, and driving the future of high-performance computing. 

85 percent of systems not connected

Combining revealing statistics from the past with projections about the direction the industry is headed, Sharma noted that the rapidly evolving digital era is spurring transformation across many fields, supported by a shift to open standards. Fixed-function ASICs are giving way to programmable architectures, dedicated appliances are now parts of virtualized systems, and purpose-built hardware is transforming into general-purpose hardware and software-defined functions.

Dramatically declining costs are a key driver for this transformation. In the past 10 years, the costs for sensors have fallen 2x, the cost of bandwidth has dropped 40x and the cost of processing 60x.

One of the most arresting facts Sharma shared relates to the huge potential, and need, for more hardware and software systems to keep up with the exponential growth of connected devices. Eighty-five percent of deployed systems are not connected and do not share data with each other or the cloud.

IoT threat landscape

Even so, Sharma said, attacks on IoT devices will increase rapidly due to hyper-growth in the number of connected objects, “poor security hygiene” and high value of data on those devices. A recent study of IoT devices showed that an average of “25 holes or risks of compromising the home network” were found on every device evaluated.

Sharma outlined a path to IoT security paved by infrastructure, end-to-end security, and 5G network and connectivity and standards. He said the Intel IoT Platform offers secure, scalable and interoperable building blocks for data acquisition, analytics and actions to improve business and peoples’ lives. Like other speakers, Sharma emphasized that security must be part of system concept and design.

“Security cannot be an add-on. Those days are gone,” he said.

Devices to protect biological, radiological and chemical data

Leti’s Alain Merle noted that privacy and security far outweigh other user concerns about connected devices. Integration in advanced technology, a focus of Leti R&D, is required, including use of security primitives, or low-level cryptographic algorithms. Secure IoT nodes face a complex array of potential weaknesses beyond physical attacks, such as attacks through communication interfaces, fault injection (glitches, light, laser, electromagnetism) and software, in which a single error can open the door to a hacker.

Beyond its cybersecurity programs, Leti is working with its partners to develop dedicated security devices to protect biological, radiological, chemical and weapons data. CESTI is Leti’s evaluation laboratory to determine whether security components and devices are designed and manufactured to prevent breaches and whether they are capable of withstanding attacks from terrorists, criminals or others.

The CESTI lab has evaluated products from leading companies such as SAFRAN, Samsung, ATMEL, STMicroelectronics, Gemalto, Oberthur and Inside Secure. The lab is part of Leti’s Strategic Security and Defense Programs, which promotes the development of innovative security solutions for information and communication (ICT) technologies for transfer to defense and commercial markets.

‘System approach with partners’

In her closing remarks, Leti CEO Marie Semeria noted that reliability, security and privacy are “must haves” to support the many key uses of digital technology. “Leti relies on a combination of hardware and software, so we pursue system approaches with our partners,” she said.

Focusing on micro- and nanotechnologies, architectures, tools and design methodologies, Semeria underlined that Leti is a worldwide recognized important center of competencies in developing innovations to propose efficient and reliable elements & architectures for emergent computing systems. She highlighted several recent Leti innovations for the Internet of Things and advanced computing for health, automotive and other sectors.

Leti has unique know-how and access to shielding, sensors, architectures and embedded software technologies for designing ASICs and SOCs for security applications. Moreover, its unique concentration of experts in materials, technologies integration, design and systems, even in biology and clinical domains, allows Leti to make the best trade offs possible between security, such as resistance to attacks, and application constraints, such as power, cost and performance.

Leti will celebrate its 50th anniversary next year as part of Leti Innovation Day in Grenoble.

Scientists at Hokkaido University have developed a device that employs both magnetic and electronic signals, which could provide twice the storage capacity of conventional memory devices, such as USB flash drives.

Using two forms of strontium cobalt oxide with different oxygen content, the device can be switched from an insulating/non-magnet state to a metallic/magnet state simultaneously by electrochemical oxidation/reduction reaction at room temperature in air. Credit: Hiromichi OHTA, Hokkaido University

Using two forms of strontium cobalt oxide with different oxygen content, the device can be switched from an insulating/non-magnet state to a metallic/magnet state simultaneously by electrochemical oxidation/reduction reaction at room temperature in air. Credit: Hiromichi OHTA, Hokkaido University

Conventional USB flash drives are electronic data storage devices. They store information by using millions of small gates that process information into “words” consisting of various combinations of the numbers 0 and 1.

A team of scientists at Hokkaido University’s Research Institute for Electronic Science investigated the possibility of using a magnetic signal along with the electronic signal to allow double the storage capacity in these “multiplex writing/reading” devices. In addition to the binary 0/1 method of storing information, this would add an A/B store for the information as well. To do this would require finding a material that can switch back and forth from a magnet to a non-magnet state.

Using two forms of strontium cobalt oxide with different oxygen content, the device can be switched from an insulating/non-magnet state to a metallic/magnet state simultaneously by electrochemical oxidation/reduction reaction at room temperature in air. The use of magnetic signal along with electronic signal Using two forms of strontium cobalt oxide with different oxygen content, the device can be switched from an insulating/non-magnet state to a metallic/magnet state simultaneously by electrochemical oxidation/reduction reaction at room temperature in air. [copyright: Hiromichi OHTA, Hokkaido University]

The team investigated two forms of strontium cobalt oxide (SrCoOx): one is an insulating non-magnet while the other is a metal magnet. By changing the oxygen content in this compound, the team could cause it to switch between the two forms. However, the two methods currently available to do this have big drawbacks. One method requires using a high temperature heat treatment. This would make it impossible to use in devices that work at room temperature, such as your mobile phone. The other method involves using a dangerous alkaline solution. This would require a device that is sealed so that the solution does not leak. This method is difficult to miniaturize and is thus not suitable for information storage devices.

The team developed a new method to use strontium cobalt oxide safely at room temperature in air. They applied a sodium tantalate thin film, which can be used at room temperature without leaking alkaline solution, over layers of strontium cobalt oxide. When a three-volt current was applied (or about one-seventh of the voltage required in currently available USB flash drives), the insulating form of SrCoO2.5 reversibly switched to its metal magnet form, SrCoO3, in three seconds. By comparison, current devices can store information in 0.01 seconds. Making the device smaller would shorten the time needed for the compound to switch between an insulator and a magnet, the researchers say. This would allow the storage of an even larger number of photos and videos in mobile phones, for example.

asmlThe Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced Martin van den Brink, president and chief technology officer at ASML Holding and renowned pioneer in semiconductor manufacturing technology, has been named the 2016 recipient of SIA’s highest honor, the Robert N. Noyce Award. SIA presents the Noyce Award annually in recognition of a leader who has made outstanding contributions to the semiconductor industry in technology or public policy. Van den Brink will accept the award at the annual SIA Award Dinner on Thursday, Nov. 10 in San Jose, an event that will commemorate the 25thanniversary of the Noyce Award.

Many past award recipients will be in attendance to celebrate the anniversary, including the following semiconductor industry leaders and founders: Dr. Craig Barrett, Dr. Morris Chang, John Daane, Dr. John E. Kelly III, Stanley Mazor, Jim Morgan, Jerry Sanders, George Scalise, Mike Splinter, Ray Stata, Rich Templeton, and Pat Weber.

“Throughout his distinguished career, Martin van den Brink has been a true semiconductor industry innovator, champion, and visionary, pioneering optical lithography methods that have given rise to the smaller, faster, more efficient chips that underpin modern technology,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Martin’s myriad accomplishments over the last 30 years have strengthened our industry and fundamentally transformed semiconductor manufacturing. On behalf of the SIA board of directors, it is a pleasure to announce Martin’s selection as the 2016 Robert N. Noyce Award recipient in recognition of his outstanding achievements.”

During Van den Brink’s three decades at ASML, he has led transformative advances in optical lithography procedures used to manufacture semiconductors. Optical lithography, a microfabrication process in which light-sensitive chemicals are used to transfer circuit patterns onto chip wafers, is the primary technology used for the production of semiconductors and has allowed for the continued miniaturization of chips. Thanks in large part to Van den Brink’s technological leadership, ASML is now the world’s largest supplier of optical lithography equipment for the global semiconductor industry.

Van den Brink was one of ASML’s first employees, joining when the company was founded in 1984. He has held various engineering positions since that time, including Vice President, Technology and Executive Vice President, Marketing & Technology. He has served on ASML’s Board of Management since 1999 and was appointed President and CTO on July 1, 2013. Van den Brink earned a degree in Electrical Engineering from HTS Arnhem, and a degree in Physics from the University of Twente, the Netherlands.

“I’m extremely gratified to accept this honor and enter the company of previous Noyce Award recipients, many of whom I’m proud to call friends, colleagues, and mentors,” said Van den Brink. “Throughout my career, I have been privileged to work with some of the finest scientists, engineers, and researchers in the world, individuals who have helped strengthen the semiconductor industry, the tech sector, and the global economy. It is with them in mind that I thankfully accept this award and look forward to continuing to work alongside them to advance semiconductor innovation.”

The Noyce Award is named in honor of semiconductor industry pioneer Robert N. Noyce, co-founder of Fairchild Semiconductor and Intel.

“I’m also pleased that we will be joined at this event by so many of the past winners of the Noyce Award who have built this industry and driven its success over the years,” Neuffer said. “This event will be a unique opportunity to celebrate the industry and the promise for the future.”

FormFactor, Inc. today announced that it has completed the acquisition of Beaverton, Oregon-based Cascade Microtech, Inc.

“By completing the acquisition of Cascade Microtech, FormFactor transforms into a broader test and measurement market leader with significant scale and increased diversification,” said Mike Slessor, FormFactor’s President and Chief Executive Officer. “Against a robust demand environment for the combined company’s products and technologies, we will benefit from significant financial synergies, driving improved gross margins, profitability and earnings accretion on a non-GAAP basis in the second half of 2016 and beyond,” added Slessor.

In conjunction with this acquisition, FormFactor is appointing Mr. Ray Link to its board of directors, effective June 27, 2016. Mr. Link, formerly a member of the Cascade Microtech’s board of directors, brings his significant financial and operational management experience with publicly held companies in the technology sector. He also currently serves on the board of directors of Electro Scientific Industries, Inc., and nLight Corporation.

The former shareholders of Cascade Microtech approved of the transaction on June 23, 2016. At the effective time of the acquisition, the outstanding shares of Cascade Microtech common stock were each cancelled and converted into the right to receive $16.00 in cash, without interest, and 0.6534 of a share of FormFactor common stock. The total consideration payable on the cancelled shares consists of approximately 10.5 million shares of FormFactor common stock and approximately $255.9 million in cash to former Cascade Microtech shareholders. As a result of the acquisition, Cascade Microtech shares will cease to be traded on the NASDAQ Global Market effective today, June 24, 2016.

In connection with the acquisition, FormFactor entered into a Credit Agreement with HSBC Bank USA, National Association, as administrative agent, co-lead arranger, sole bookrunner and syndication agent, and other lenders that may from time to time be a party to the Credit Agreement. Pursuant to the Credit Agreement, the lenders have provided FormFactor with a senior secured term loan facility of $150 million to finance a portion of the cash used to complete the transaction and pay fees and expenses related to the facility.

Needham & Company, LLC, acted as financial advisor and Davis Polk & Wardwell LLP acted as legal counsel to FormFactor. Stifel, Nicolaus & Company, Incorporated, acted as financial advisor and Perkins Coie LLP acted as legal counsel to Cascade Microtech.

Presto Engineering Inc., a semiconductor product engineering and supply chain service provider, announced today that it has signed a multi-year supply agreement with NAGRA, a Kudelski Group company in secure digital TV access and management systems. Presto will provide supply chain management and production services for several of NAGRA’s key products in the Pay TV market.

“We are delighted that NAGRA has placed trust in Presto to be its production partner for volume products,” said Michel Villemain, CEO, Presto Engineering. “Leveraging team and expertise acquired from INSIDE Secure in 2015, this is a natural complement to our strategy of deploying an independent subcontract back-end manufacturing and supply chain service for the secure card industry and IoT markets.”

Providing full production support and secured back-end operations (EAL5+), Presto Engineering will leverage the teams, operations and platforms it has established in France (Meyreuil) and Asia (Thailand, Taiwan and Hong Kong) to provide supply chain services for NAGRA.

“We wanted to secure a rapid and trouble-free transition for the production of some of our important products,” said Maurice Van Riek, Senior Vice President, Head of Content & Asset Security, NAGRA. “Presto Engineering has demonstrated flexibility, dedication, and a high degree of expertise in developing global solutions, which will ensure continuity and performance through the transition and in production. We are very pleased to initiate this partnership with them.”

 

SMIC acquires LFoundry


June 27, 2016

Semiconductor Manufacturing International Corporation, the largest and most advanced foundry in mainland China, jointly announces with LFoundry Europe GmbH (“LFE”) and Marsica Innovation S.p.A. (“MI”), the signing of an agreement on June 24, 2016 to purchase a 70% stake of LFoundry for a consideration of 49 million EUR.

LFoundry is an integrated circuit wafer foundry headquartered in Italy, which is owned by LFE and MI. At the closing, SMIC, LFE and MI will own 70%, 15% and 15% of the corporate capital of the target respectively. This acquisition benefits both SMIC and LFoundry, through increased combined scale, strengthened overall technology portfolios, and expanded market opportunities for both parties to gain footing in new market sectors.

This also represents the Mainland China IC foundry industry’s first successful acquisition of an overseas-based manufacturer, which marks a major step forward in internationalizing SMIC; furthermore, through this acquisition, SMIC has formally entered into the global automotive electronics market.

As the leading semiconductor foundry in Mainland China, in the first quarter of 2016, SMIC recorded profit for the 16th consecutive quarter with revenue of US$634.3 million, an increase of over 24% year-on-year. In 2015, SMIC recorded annual revenue of US$2.24 billion. In fiscal year 2015, LFoundry revenue reached 218 million EUR.

This acquisition will bring both companies additional room for business expansion. At present, SMIC’s total capacity includes 162,000 8-inch wafers per month and 62,500 12-inch wafers per month, which represents a total 8-inch equivalent capacity of 302,600 wafers per month. LFoundry’s capacity amounts to 40,000 8-inch wafers per month. Thus, by consolidating the entities, overall total capacity would increase by 13%; this combined capacity will provide increased flexibility and business opportunities for supporting both SMIC and LFoundry customers.

SMIC has a diversified technology portfolio, including applications such as radio frequency (“RF”), connectivity, power management IC’s (“PMIC”), CMOS image sensors (“CIS”), embedded memory, MEMS, and others—mainly for the communications and consumer markets. Complementarily, LFoundry’s key focus is primarily in automotive, security, and industrial related applications including CIS, smart power, touch display driver IC’s (“TDDI”), embedded memory, and others. Such consolidation of technologies will broaden the overall technology portfolios and enlarge the areas of future development for both SMIC and LFoundry.

Dr. Tzu-Yin Chiu, the CEO and Executive Director of SMIC said, “The successful completion of the LFoundry srl acquisition agreement is an important step in our global strategy. Both SMIC and LFoundry will mutually benefit from the shared technology, products, human talents and complementary markets. This will additionally expand our production scale and allows us to service the automotive IC market and for LFoundry to enter into China’s consumer electronics market, thus bolstering our overall development and growth. Through the acquisition, communication and cooperation in the semiconductor industry between China and Europe has been further enhanced, and contributes to the mutual success of the integrated circuit industry in both regions. In the future SMIC will continue to enhance, strengthen, and further expand leadership in the global semiconductor ecosystem.”

Sergio Galbiati, the Managing Director of MI and Chairman of LFoundry srl, said, “This is the beginning of a new era for LFoundry and our Italian fab. We are pleased to become part of a very strong worldwide player, SMIC. Together we can further improve LFoundry’s strength on optical sensor related technology, which is well recognized worldwide, and continue to contribute to the growth of technology in Europe, thanks to our partnerships with many relevant players. The agreement with SMIC will enable us to have a stronger level playing field in Europe.”

Günther Ernst, the Managing Director of LFE and CEO of LFoundry srl, said, “We have made significant efforts in achieving technology excellence. The agreement with SMIC will further enable us to better use our own manufacturing capacity and have access to SMIC’s extremely diverse technology offerings while taking advantage of SMIC’s commercial network and overall capacity. As part of SMIC, LFoundry will continue to pioneer technology to help our customers achieve success and drive value for our partners and employees around the world. We look forward to working closely with the SMIC team to ensure a smooth transition.”

Qualcomm Incorporated announced that it has filed a complaint against Meizu in the Beijing Intellectual Property Court. The complaint requests rulings that the terms of a patent license offered by Qualcomm to Meizu comply with China’s Anti-Monopoly Law, and Qualcomm’s fair, reasonable and non-discriminatory licensing obligations.  The complaint also seeks a ruling that the offered patent license terms should form the basis for a patent license with Meizu for Qualcomm’s fundamental technologies patented in China for use in mobile devices, including those relating to 3G (WCDMA and CDMA2000) and 4G (LTE) wireless communications standards.

Qualcomm has negotiated extensively and in good faith with Meizu to sign a patent license agreement consistent with the terms of the rectification plan submitted by Qualcomm to, and accepted by, China’s National Development and Reform Commission (NDRC) in 2015.  Although Qualcomm would have preferred to reach a resolution with Meizu without the need for litigation, Meizu, unfortunately, has been unwilling to negotiate in good faith and enter into a license agreement on the rectification plan terms while unfairly expanding its business through the use of Qualcomm’s innovations without compensating Qualcomm for the use of Qualcomm’s valuable technologies.  In contrast, more than 100 other companies have already accepted the rectification plan terms, including the largest Chinese mobile device suppliers.

“Qualcomm’s technologies are at the heart of all mobile devices.  Meizu is choosing to use these technologies without a license, which is not only unlawful, but is unfair to other licensees that are acting in good faith and respectful of patent rights, and ultimately damaging to the mobile ecosystem and consumers,” said Don Rosenberg, executive vice president and general counsel of Qualcomm Incorporated. “We are, and have been, a good partner in China, and we are pleased to see how China’s mobile ecosystem is thriving. Chinese smartphone suppliers are succeeding both domestically and globally, and we are pleased to help drive that growth.  Qualcomm looks forward to continuing to increase its level of commitment to, and investment in, China across both the wireless and semiconductor ecosystems.”

With a surface resembling that of plants, solar cells improve light-harvesting and thus generate more power. Scientists of KIT (Karlsruhe Institute of Technology) reproduced the epidermal cells of rose petals that have particularly good antireflection properties and integrated the transparent replicas into an organic solar cell. This resulted in a relative efficiency gain of twelve percent. An article on this subject has been published recently in the Advanced Optical Materials journal.

Biomimetics: the epidermis of a rose petal is replicated in a transparent layer which is then integrated into the front of a solar cell. Credit: Illustration: Guillaume Gomard, KIT

Biomimetics: the epidermis of a rose petal is replicated in a transparent layer which is then integrated into the front of a solar cell. Credit: Illustration: Guillaume Gomard, KIT

Photovoltaics works in a similar way as the photosynthesis of plants. Light energy is absorbed and converted into a different form of energy. In this process, it is important to use a possibly large portion of the sun’s light spectrum and to trap the light from various incidence angles as the angle changes with the sun’s position. Plants have this capability as a result of a long evolution process – reason enough for photovoltaics researchers to look closely at nature when developing solar cells with a broad absorption spectrum and a high incidence angle tolerance.

Scientists at the KIT and the ZSW (Center for Solar Energy and Hydrogen Research Baden-Württemberg) now suggest in their article published in the Advanced Optical Materials journal to replicate the outermost tissue of the petals of higher plants, the so-called epidermis, in a transparent layer and integrate that layer into the front of solar cells in order to increase their efficiency.

First, the researchers at the Light Technology Institute (LTI), the Institute of Microstructure Technology (IMT), the Institute of Applied Physics (APH), and the Zoological Institute (ZOO) of KIT as well as their colleagues from the ZSW investigated the optical properties, and above all, the antireflection effect of the epidermal cells of different plant species. These properties are particularly pronounced in rose petals where they provide stronger color contrasts and thus increase the chance of pollination. As the scientists found out under the electron microscope, the epidermis of rose petals consists of a disorganized arrangement of densely packed microstructures, with additional ribs formed by randomly positioned nanostructures.

In order to exactly replicate the structure of these epidermal cells over a larger area, the scientists transferred it to a mold made of polydimethylsiloxane, a silicon-based polymer, pressed the resulting negative structure into optical glue which was finally left to cure under UV light. “This easy and cost-effective method creates microstructures of a depth and density that are hardly achievable with artificial techniques,” says Dr. Guillaume Gomard, Group Leader “Nanopothonics” at KIT’s LTI.

The scientists then integrated the transparent replica of the rose petal epidermis into an organic solar cell. This resulted in power conversion efficiency gains of twelve percent for vertically incident light. At very shallow incidence angles, the efficiency gain was even higher. The scientists attribute this gain primarily to the excellent omnidirectional antireflection properties of the replicated epidermis that is able to reduce surface reflection to a value below five percent, even for a light incidence angle of nearly 80 degrees. In addition, as examinations using a confocal laser microscope showed, every single replicated epidermal cell works as a microlense. The microlense effect extends the optical path within the solar cell, enhances the light-matter-interaction, and increases the probability that the photons will be absorbed.

“Our method is applicable to both other plant species and other PV technologies,” Guillaume Gomard explains. “Since the surfaces of plants have multifunctional properties, it might be possible in the future to apply multiple of these properties in a single step.” The results of this research lead to another basic question: What is the role of disorganization in complex photonic structures? Further studies are now examining this issue with the perspective that the next generation of solar cells might benefit from their results.

By Douglas G. Sutherland and David W. Price

Author’s Note: The Process Watch series explores key concepts about process control—defect inspection and metrology—for the semiconductor industry. Following the previous installments, which examined the 10 fundamental truths of process control, this new series of articles highlights additional trends in process control, including successful implementation strategies and the benefits for IC manufacturing.

In the early stages of development, having more process control can help reduce both the number and duration of cycles-of-learning (the iterations required to solve a particular problem). In high volume manufacturing a well-thought-out process control strategy can increase baseline yield and, at the same time, limit yield loss due to excursions. At all stages, an effective process control strategy is required to ensure that the fab is operating at its lowest possible cost. In addition to minimizing production costs, adding process control steps can, counterintuitively, also minimize cycle time.

Figure 1 shows a conceptual plot of how cycle time would vary as a function of the number of process control steps. On the left hand side of the chart where there are no metrology and inspection (M&I) steps in place, the cycle time is effectively infinite. If a lot reaches the end of the line and has zero yield there is no way to isolate the problem. Theoretically one could isolate the problem by trial and error, but with only 100 process steps and only two parameters each, there would be 2100 (1.3 x 1030) possible combinations. Even testing one parameter per second, it would take much longer than the age of the universe to exhaust all possible combinations of the parameter space.

Figure 1. Cycle Time (CT) versus the number of process control (metrology and inspection) steps. In zone 1, the fab is information starved and unable to find yield excursions and isolate the underlying problems. In zone 3, the fab is getting more information than it can use. In zone 2, the fab has achieved balance – with a number of process control steps that minimizes the cycle time.

Figure 1. Cycle Time (CT) versus the number of process control (metrology and inspection) steps. In zone 1, the fab is information starved and unable to find yield excursions and isolate the underlying problems. In zone 3, the fab is getting more information than it can use. In zone 2, the fab has achieved balance – with a number of process control steps that minimizes the cycle time.

As process control steps are added the cycle time comes down from an effectively infinite value to some manageable number. At some point the cycle time will reach a minimum value. Beyond this point, adding in further process control steps will actually cause the cycle time to increase linearly with the number of added steps. The optimal amount of process control will always be a trade-off between minimizing cycle time, minimizing excursion cost, and maximizing baseline yield. The latter two usually have a much greater financial impact.

Adding process control steps can reduce a fab’s cycle time, but how does that work? A full treatment of cycle time (Queuing Theory) is far beyond the scope of this article, however at a high level, it can be broken down into a few manageable components. The total cycle time (CT) is the sum of the queue time (the time a lot spends waiting for a process tool to become available) and the processing time itself. Since the processing time is fixed, the only way to reduce CT is to concentrate on the queue time (Q). From Queueing Theory it can be shown that Q can be expressed by the product of three separate functions4,

Q = f(u) f(a) f(v)                                                                                           eqn 1

where f(u), f(a) and f(v) are, respectively, functions of utilization, availability and variability. The first two functions will always be finite, therefore it becomes clear that Q = 0 only when f(v) = 0. Put another way, reducing variability in the fab reduces the queue time, and if we remove all variability from the system the queue time will drop identically to zero and the CT will be equal to just the processing time.

Figure 2 shows a plot of CT as a function of utilization for three different levels of variability: zero, medium and high. The Y-axis measures cycle time in units of total processing time called the X-factor. When the variability is zero all the lots move through the fab in lock-step; there is no increase in CT with increasing utilization and all tools could be run, theoretically, at 100 percent utilization. In this case the queue time is zero and the CT is equal to the total processing time for all the steps (CT=1). As soon as some variability is introduced, the CT starts to increase exponentially with utilization and the more variability there is, the more dramatic the increase becomes.

Figure 2. Cycle time versus Utilization for three different levels of variability: High, Medium and Zero.

Figure 2. Cycle time versus Utilization for three different levels of variability: High, Medium and Zero.

Variability in the fab comes from many sources: in the lot arrival rate, in the frequency of maintenance requirements, and in the time required for that maintenance to be performed are just a few of the sources. An excursion—a lot that is out of control—affects all of the above.

Having more process control points will not immediately change the number of excursions in a fab but it will immediately improve the efficiency with which the fab reacts to them.

In fact, over time, having more process control points can also reduce the number of excursions because it increases a fab’s rate of learning.

Consider a lot that has been flagged for having a defect count that was beyond the control limit for process step N. If, as shown in figure 3a, there was another inspection point between process steps N and N-1, then the problem can be immediately isolated. Only the tool at step N (the process tool the offending lot went through) needs to be put down and only the lots that went through that tool since the last good inspection need to be put on hold for disposition.

By contrast, consider what would happen in figure 3b where the last inspection point was five steps ago at process step N-5. Practices differ from fab to fab, however in the worst case scenario, all ten tools that the lot went through would be put down and all lots that went through any of those tools would have to be put on hold. Instead of a minor disruption involving a single process tool and a few lots, entire modules and dozens of lots can be directly affected. Indirectly, it affects the entire fab.

Figure 3. (a) One process step between inspection points. (b) Five process steps between inspection points.

Figure 3. (a) One process step between inspection points. (b) Five process steps between inspection points.

Figure 3 shows that implementing fewer inspection steps has a threefold impact on cycle time:

  1. More process tools are involved and must be taken offline
  2. Each process tool is down for a much longer period of time because it takes longer to isolate the problem
  3. More wafers are in the impacted section of the production line. These wafers must be dispositioned

The variability introduced by these three impacts will also propagate through the fab; they constrict the flow of work in progress (WIP) through the fab, creating a WIP bubble that affects the lot arrival rate (increased variability) at every station downstream. All of these factors contribute to fab-wide variability and because of the re-entrant nature of the process flow, they add to the cycle time of every single lot in the fab.

When an excursion occurs, the resulting disruption impacts the cycle time of every lot in the fab and it quickly becomes a vicious cycle. The more excursions that happen during a given lot’s cycle time, the longer that cycle time will be. And the longer the cycle time is, the more likely it is that that lot will be in the fab when the next excursion occurs.

Adding inspection steps will add a small, known amount of cycle time to those lots that get inspected, but due to sampling (not every lot gets inspected) it will have a much smaller impact on the average. When an excursion does occur, comparatively few process tools will have to be put down and the module owner will be able to isolate the problem much sooner. The total disruption to the fab (the variability) will be reduced and the cycle time of all lots will be improved.

This counter-intuitive concept has been borne out by several fabs that have both added inspection steps and reduced cycle time simultaneously. Adding process control steps contributes to fab efficiency on several levels: accelerating R&D and ramp phases, increasing baseline yield, limiting the duration of excursions, and reducing cycle time. In short, a better-controlled process is a more efficient process.

The next article in this series will discuss the impact of process control to cycle time on so-called “hot lots” typically run during early ramp.

References:

  • “Process Watch: Fab Managers Don’t Like Surprises,” Solid State Technology, December 2014.
  • “Process Watch: Time is The Enemy of Profitability,” Solid State Technology, May 2015.
  • “Economic Impact of Measurement in the Semiconductor Industry,” Planning Report 07-2, National Institute of Standards and Technology, U.S. Department of Commerce, December 2007.
  • Hopp, W. J., and Spearman, M. L. Factory Physics (2nd). (New York: Irwin, McGraw-Hill, 2001), 325.

About the Authors:

Dr. David W. Price is a Senior Director at KLA-Tencor Corp. Dr. Douglas Sutherland is a Principal Scientist at KLA-Tencor Corp. Over the last 10 years, Dr. Price and Dr. Sutherland have worked directly with more than 50 semiconductor IC manufacturers to help them optimize their overall inspection strategy to achieve the lowest total cost. This series of articles attempts to summarize some of the universal lessons they have observed through these engagements.

According to the latest market research report by Technavio, the global semiconductor capital equipment market is expected to reach $47.34 billion mark by 2020.

In this report, Technavio covers the present scenario and growth prospects of the global semiconductor capital equipment market education market for 2016-2020. To calculate the market size, the report considers the revenue generated from each equipment of the semiconductor production process.

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“Technavio researchers expect the semiconductor market to grow at a CAGR of 6.42% during the forecast period. The increase in sales of microelectronics and consumer electronic devices is anticipated to support the growth of the semiconductor market,” added Asif.