Category Archives: Device Architecture

By Emir Demircan

SEMI today confirmed its support for a Joint-Industry Cooperation on an RoHS Review aimed at urging the European Commission to, at a minimum, consider dedicating more resources to a targeted outreach programme with third countries. The Joint-Statement is as follows:

Since its inception in 2002, the RoHS Directive has become a global reference point for regulation of hazardous substances in electrical and electronic equipment (EEE). This has been effective and given the EU a competitive advantage. The worldwide impact of RoHS is significant and the undersigned associations consider that this should be considered in the roadmap for reviewing the Directive.

RoHS-type laws have been introduced or are currently being introduced in more than 40 jurisdictions outside the European Economic Area (EEA). These include China, India, the Eurasian Customs Union and the Gulf States. Sometimes RoHS is copied exactly. However, often it is not. For example, countries might introduce a completely different approach on the scope, exemptions and declaration of conformity. Each time a new “RoHS” law is proposed, industry has to establish a bi-lateral dialogue with the relevant local public authorities improving the knowledge and understanding of regulatory stakeholders based on experience with the framework legislation in the EEA. Industry continues to spend a lot of time and money to ensure alignment with EU RoHS as far as possible. This is crucial for the global and complex EEE supply chains.

The European Commission’s DG TRADE “Market Access” services have been helpful with draft laws that have been notified to the WTO and have raised concerns with the Technical Barriers to Trade (TBT) Committee as well as bi-laterally with the countries in question. A recent example was the draft legislation in the United Arab Emirates.

Each time the EU updates the legislation, for example, withdrawing, renewing or granting an exemption, adding a substance, this will have a domino effect on the rest of the world.

To this end, we urge the Commission to, at a minimum, consider dedicating more resources to a targeted outreach programme with third countries. The EU recently adopted a Regulation on responsible minerals supply chains and DG TRADE subsequently launched such outreach with the United States, China, India, United Arab Emirates, Colombia, Mexico, South Africa, Malaysia, Thailand and Canada.

We, the undersigned associations, endorse the Commission’s roadmap for the evaluation and the aim to review and improve the effectiveness, efficiency, relevance of the RoHS Directive, as well as coherence with other EU laws and policies. However, we feel this important global dimension is absent and should be incorporated into the Review.

The Joint-Statement with the full list of participating associations can be accessed here.

SEMI encourages its members to communicate the Joint-Statement at regional and national levels. For more information, contact Emir Demircan, senior manager Advocacy and Public Policy, SEMI Europe, at [email protected].

Total wafer shipments in 2018 year are expected to eclipse the all-time market high set in 2017 and continue to reach record levels through 2021, according to SEMI’s recent semiconductor industry annual silicon shipment forecast. The forecast of demand for silicon units for the period 2018 through 2021 shows polished and epitaxial silicon shipments totaling 12,445 million square inches in 2018; 13,090 million square inches in 2019; 13,440 million square inches in 2020, and 13,778 million square inches in 2021 (see table below).

“As new greenfield fab projects continue to emerge for memory and foundry, silicon shipments are expected to remain strong for 2019 and through 2021,” said Clark Tseng, director of Industry Research & Statistics at SEMI. “Silicon demand will continue to grow as semiconductor content increases in mobile, high-performance computing, automotive, and Internet of Things applications.”

2018 Silicon* Shipment Forecast (MSI = Millions of Square Inches)
Actual
Forecast
2016
2017
2018
2019
2020
2021
MSI
10,577
11,617
12,445
13,090
13,440
13,778
Annual Growth
3.0%
9.8%
7.1%
5.2%
2.7%
2.5%

*Total Electronic Grade Silicon Slices – Excludes Non-Polished Wafers

*Shipments are for semiconductor applications only and do not include solar applications

Source: SEMI (www.semi.org), October 2018

Silicon wafers are the fundamental building material for semiconductors, which in turn, are vital components of virtually all electronics goods, including computers, telecommunications products, and consumer electronics. The highly engineered thin round disks are produced in various diameters (from one inch to 12 inches) and serve as the substrate material on which most semiconductor devices or chips are fabricated.

All data cited in this release is inclusive of polished silicon wafers, including virgin test wafers and epitaxial silicon wafers shipped by the wafer manufacturers to the end-users. Data do not include non-polished or reclaimed wafers.

MagnaChip Semiconductor Corporation (“MagnaChip”) (NYSE: MX), a designer and manufacturer of analog and mixed-signal semiconductor platform solutions, today announced the introduction of a new High-Voltage Super Junction MOSFET with a 900V breakdown voltage and low total gate charge (Qg) (“”90R1K4P”). The device with two package types, I-PAK and D-PAK, will sample to customers in November 2018 and will be manufactured in high volume in early first quarter of next year.

90R1K4P features the maximum peak voltage of 950V and a breakdown voltage as high as 900V, which enables enhanced system stability and reliability. It is well-suited for high-voltage applications such as:

  • an auxiliary power supply for industrial smart metering, which uses a three-phase input power to alternate current electric power generation, transmission, and distribution.
  • the lighting of flyback topology in both AC/DCand DC/DC high-speed switching converters.
  • a power supply for lighting equipment due to its characteristics of high stability that help prevent an unstable system condition that could lead to outages.

90R1K4P increases its switching speed due to its low total gate charge (Qg), which reduces heat generation in the system, keeps power loss down and improves energy efficiency. It also enables smaller form factors than the High-Voltage Planar MOSFET, since the die size of 90R1K4P is more than 50% smaller under the same condition of conduction loss.

To enable the use of 90R1K4P product in small form factors, MagnaChip will house the device in a small I-PAK package type under the code MMIS90R1K4P. As a result of the die size reduction and choice of packaging, this new MOSFET has the potential to be adopted in a wide range of applications.

Moreover, to ensure 90R1K4P product can be adopted for applications where space is at a premium, the company also can mount the Super Junction MOSFET into the slim SMD (Surface-Mount Devices) package type, D-PAK. It will be available under the code MMD90R1K4P.

“MagnaChip’s High-Voltage Super Junction MOSFET with a high breakdown voltage and a low total gate charge (Qg) will provide customers with high system reliability and energy efficiency,” said YJ Kim, CEO of MagnaChip. “We will continue to develop products based on the newly launched High-Voltage Super Junction MOSFET and extend our product portfolio with a diverse line of Super Junction MOSFETs with improved performance.”

Data provided by the Semiconductor Industry Association (SIA) indicates that worldwide sales of semiconductors reached USD 40.16 Billion for the month of August 2018, representing an increase of 14.9% when compared to the August 2017 total of USD 34.96 Billion. Global sales in August 2018were 1.7% higher than the July 2018 total of USD 39.49 Billion. The semiconductor industry is one of the fastest growing industries of the technology sector. According to Stratistics MRC, many semiconductor companies are beginning to embrace IoT to drive new revenue and growth models. Squire Mining Ltd. (OTC: SQRMF), Taiwan Semiconductor Manufacturing Company Limited (NYSE: TSM), Applied Materials, Inc. (NASDAQ: AMAT), Qorvo, Inc. (NASDAQ: QRVO), Entegris, Inc. (NASDAQ: ENTG)

According to a recent report by Accenture, the semiconductor industry is the most bullish sector when it comes to the integration of blockchain within their industry and the impact of artificial intelligence. “Throughout the industry’s complex supply chain, blockchain simplifies business operations leveraging semiconductor chips and related technologies,” said Syed Alam, a Managing Director in Accenture Strategy who leads Accenture’s Semiconductor practice. “This faster traceability will improve companies’ business operations and accelerate delivery of their products to market – while enabling them to do so at lower costs. Semiconductor companies can also use blockchain to create, scale and manage technology-based collaborations and redefine future business transactions.”

Squire Mining Ltd. (OTCQB: SQRMF) is also listed on the Canadian Securities Exchange under the ticker (CSE: SQR). Just earlier today, the company announced breaking news that, “Ennoconn Corporation (“Ennoconn”) as our hardware manufacturer for next generation mining systems to mine Bitcoin Cash, Bitcoin and other associated cryptocurrencies. Ennoconn is a leading industrial motherboard designer and total hardware system solution provider headquartered in Taipei, Taiwan and listed on the Taiwan stock exchange (TPE:6414). In 2007, Foxconn Technology Group, the largest “Electronic Manufacturing Service” company in the world, became the majority shareholder of Ennoconn, forming a strong strategic alliance in embedded system and electronic manufacturing.

On August 21, 2018, Squire announced that AraSystems Technology Corp. (“AraSystems”), a subsidiary of Squire, had entered into a provisional non-binding agreement with a major global technology assembly company. This company, now revealed to be Ennoconn, will assist in the design and assembly of our next generation mining rig at such time as a working prototype of our debut ASIC chip is completed.

On October 3, 2018 Squire announced the successful completion and testing of its FPGA working prototype microchip, with early results of the terahash-to-energy consumption ratio, indicating that the final ASIC chip and mining system has the potential to reduce operational costs by up to 40% for enterprise mining facilities.

● This cost reduction was estimated by one leading enterprise mining group to be worth up to $60M per year in savings to their operations alone.

● The final ASIC chip and mining system together are expected to provide up to a four times improvement in the performance of mining the blockchain, a process that enables miners to be paid, thereby increasing the return on investment, and profit, for miners. Such calculations are based on comparisons with the majority of current generation mining machines operating inside enterprise facilities around the world.

Following this success, the Company has signed a binding Memorandum of Understanding with Ennoconn and funded work to commence Phase 1 design and development of AraSystem’s next generation mining system in collaboration with its partners in Taipei, Taiwan and in Seoul, South Korea. Definitive documentation will be entered into following delivery of final specifications and data sheets to Ennoconn later this month.

Squire’s engineers are currently working with Ennoconn to design and develop AraSystem’s mining rig which will house the debut ASIC chip currently under development by the Company’s subsidiary AraCore Technology Corp (“AraCore”), in conjunction with GaonChips and Samsung Electronics (see news releases dated September 25 and October 3, 2018). In turn, Ennoconn will be responsible for mass assembly of the mining rig once all design, development and testing work has been completed.

A prototype of the mining rig along with full specifications of the AraCore ASIC chip are expected to be presented at the CoinGeek Conference in London on November 28 – 30, 2018, with presales expected to commence on or around that date. Significant interest has already been expressed by several of the industry’s largest enterprise mining companies, which currently host hundreds of thousands of mining machines in their facilities across the world.”

‘We are very pleased to be partnering with the skilled engineers at Ennoconn, one of the world’s leading electronic manufacturing companies,’ stated Simon Moore, Executive Chairman and CEO of Squire. ‘As we launch our next generation mining rig with a suite of proprietary innovations, it’s imperative that our manufacturing partners have the talent, experience and capacity to not only deliver unique hardware, but also deliver best in class quality. We believe Ennoconn will help ensure the production of an exceptional mining rig for the marketplace,’ he said. Further, Mr. Moore noted, ‘based on initial interest from the sector, the potential for significant sales and the subsequent revenue for Squire is on track in the coming year which would make Squire and its partners a noteworthy industry provider of crypto mining hardware and next generation innovation on a global scale.’

Taiwan Semiconductor Manufacturing Company Limited (NYSE: TSM) is the world’s largest dedicated semiconductor foundry, providing the industry’s leading process technology and the foundry segment’s largest portfolio of process-proven libraries, IPs, design tools and reference flows. TSMC recently announced the initial availability of its Open Innovation Platform® Virtual Design Environment (OIP VDE), which enables semiconductor customers to securely design in the cloud, leveraging TSMC OIP design infrastructures within the flexibility of cloud infrastructures. OIP VDE is the result of TSMC collaboration with TSMC OIP design ecosystem partners and leading cloud providers to deliver a complete systems-on-chip (SoCs) design environment in the cloud. TSMC OIP VDE’s first implementations of digital RTL-to-GDSII and custom schematic capture-to-GDSII flows are via partnerships with TSMC’s inaugural Cloud Alliance partners, Amazon Web Services (AWS), Cadence, Microsoft Azure, and Synopsys. In TSMC’s enablement of OIP VDE, both digital and custom design flows have been validated in the cloud, along with OIP design collateral-including process technology files, PDKs, foundation IP, and reference flows. To ensure low barriers to entry and high technical support levels, Cadence and Synopsys act as the focal point helping customers to set up VDE and providing first line support.

Applied Materials, Inc. (NASDAQ: AMAT) is a developer of materials engineering solutions used to produce virtually every new chip and advanced display in the world. Applied Materials recently celebrated the 20th anniversary and 5,000th shipment of the Producer® platform, a manufacturing system that helps make virtually every chip in the world. The Producer platform was launched in July of 1998 to help enable chips to run faster by changing their wiring from aluminum to copper, which is a better conductor. The transition was needed by the industry to drive the performance and power improvements associated with Moore’s Law, but it also required many additional steps that could have made the progress unaffordable. To help, Applied Materials designed every element of the Producer platform to give customers the highest performance at the lowest possible operating cost. “With the landmark Producer platform, Applied achieved something that had never been done before on this scale: create a highly flexible architecture that can support multiple technology generations and still remain incredibly productive,” said G. Dan Hutcheson, Chief Executive Officer of VLSIresearch. “Today, the Producer platform continues to allow chipmakers to imagine and build chips in entirely new ways. Congratulations to Applied Materials on this impressive milestone for one of the most important process systems in the semiconductor industry.”

Qorvo, Inc. (NASDAQ: QRVO) recently introduced a new System in Package (SiP) that enables dynamic, simultaneous support for Zigbee® 3.0, Green Power, Thread and Bluetooth Low Energy (BLE). This new SiP integrates Qorvo power amplifier technology providing 20 dBm output, which is especially important for U.S. smart home applications. The Qorvo QPG6095M is a fully integrated SiP for ultra-low power wireless communications. It is BLE 5.0 and Zigbee 3.0 platform and product certified, and offers Green Power energy efficiency. This SiP also extends range and battery life and enables robust interference mitigation. The QPG6095M delivers optimized connectivity throughout the home, eliminating the need for complex mesh architectures and unnecessary battery consumption in intermediate devices. The QPG6095M blends Qorvo’s power amplifier (PA) technology with a multi-standard, multi-protocol chip. Its level of integration and performance benefit product designers by lowering development costs and speeding time to market. Cees Links, General Manager of Qorvo’s Wireless Connectivity business unit, said, “This new SiP is another example of Qorvo’s commitment to combining and leveraging RF technologies to improve the consumer’s connected experience. Developers can now deliver BLE, Zigbee and Thread simultaneously with more range and reliability, and reduce concerns about future compatibility.”

Entegris, Inc. (NASDAQ: ENTG) is a developer and provider of specialty chemicals and advanced materials solutions for the microelectronics industry and other high-tech industries. Entegris, Inc. recently released the next generation EUV 1010 Reticle Pod for high-volume IC manufacturing using extreme ultraviolet (EUV) lithography. Developed in close collaboration with ASML, one of the world’s largest manufacturers of chip-making equipment, Entegris’s EUV 1010 is the first to be qualified by ASML for use in the NXE:3400B and beyond. As the semiconductor industry begins ramping EUV lithography for the high-volume manufacturing (HVM) of advanced technology nodes, keeping EUV reticles defect-free is more demanding than ever. Entegris’s EUV 1010 Reticle Pod is now fully qualified by ASML for their latest generation scanner having demonstrated outstanding protection of the EUV reticles, including against the most critical particle challenges. As a result, Entegris’s EUV 1010 enables customers to safely transition to smaller and smaller line widths, as needed for the most advanced lithography processes.

GLOBALFOUNDRIES today announced the addition of nine new partners to its growing RFwave Partner Program, including Akronic, Ask Radio, Catena, University of Waterloo Centre for Intelligent Antenna and Radio Systems (CIARS), Giga Solution, Helic, Incize, Mentor Graphics and Xpeedic Technology. These new partners will provide unique mmWave test and characterization capabilities along with design services, IP and EDA solutions that will enable GF clients to rapidly implement RF designs in applications spanning Internet-of-Things (IoT), mobile, RF connectivity, and networking markets.

The RFwave Partner Program builds upon GF’s industry-leading radio frequency (RF) solutions, such as FD-SOI, RF CMOS (bulk and advanced CMOS nodes), RF SOI and silicon germanium (SiGe) technologies. The program provides a low-risk, cost-effective path for designers seeking to build highly optimized RF solutions for a range of wireless applications such as IoT across various wireless connectivity and cellular standards, standalone or transceiver integrated 5G front end modules, mmWave backhaul, automotive radar, small cell and fixed wireless and satellite broadband.

“As the RFwave program continues to expand, partners play a critical role in helping to serve our growing number of clients and extend the reach of our RF ecosystem by providing innovative RF-tailored solutions and services,” said Mark Ireland, vice president of ecosystem partnerships at GF. “These new partners will help drive deeper engagement and enhance technology collaboration, including tighter interlock around quality, qualification and development methodology, enabling us to deliver advanced highly integrated RF solutions.”

GF is focused on building strong ecosystem partnerships with industry leaders. With the RFwave program, GF’s partners and clients can now benefit from a greater availability of resources to deliver innovative, highly optimized RF solutions. The new partners join current RFwave Program members including asicNorth, Cadence, CoreHW, CWS, Keysight Technologies, Spectral Design, and WEASIC.

According to Allied Market Research, the global compound semiconductor market was valued at USD 66,623 million in 2016 and is expected to reach USD 142,586 million in 2023 while growing at a CAGR of 11.3% from 2017 to 2023. The report indicates that a compound semiconductor is composed of two or more elements. Numerous compound semiconductors can be obtained by changing the combination of elements. Some of the factors affecting the market include the increasing demand for optoelectronic devices, as well as the attraction of compound semiconductor’s significant features, such as less power consumption, low price, and reduced heat dissipation. Rise in usage of optical devices, photovoltaic cells, and modules & wireless communication products is expected to provide an attractive opportunity for the compound semiconductor market. Squire Mining Ltd. (OTC: SQRMF), Nvidia Corporation (NASDAQ: NVDA), Advanced Micro Devices, Inc. (NASDAQ: AMD), KLA-Tencor Corporation (NASDAQ: KLAC), Maxim Integrated Products, Inc. (NASDAQ: MXIM)

As semiconductor technology begins to advance, new segments are swiftly being integrated into the market, such as Machine Learning. AI has observed significant growth in recent years. Initially, AI was considered a topic for academicians, though in recent years with development of various technologies, AI has turned into reality and is influencing many lives and businesses. According to MarketsandMarkets the global artificial intelligence chipset market is expected to be worth USD 16.06 Billion by 2022 and grow at a CAGR of 62.9% between 2016 and 2022.

Squire Mining Ltd. (OTCQB: SQRMF) is also listed on the Canadian Securities Exchange under the ticker (CSE: SQR). Earlier last week, the Company announced breaking news that, “to report on its prototype ASIC chip testing event held in Seoul, South Korea. With executives and board members from Squire, Future Farm, CoinGeek, Gaonchips and Samsung Electronics in attendance, Peter Kim, President of Squire’s subsidiary AraCore Technology Corp. (“Aracore”), and his team of front-end microchip engineers and programmers, unveiled and tested a working prototype mining system comprised of a newly engineered FPGA (field programmable gate array) ASIC microchip that will be converted into AraCore’s first ASIC chip utilizing 10 nanometer technology for mining Bitcoin Cash, Bitcoin and other associated cryptocurrencies. The test results confirm Aracore’s original design specifications indicating that the ASIC chip, once mass manufactured by Samsung Electronics, will be capable of delivering a projected hash rate of 18 to 22 terahash per second (TH/s) with an energy consumption of between 700 and 800 watts.

Taras Kulyk, Chief Executive Officer of CoinGeek Mining and Hardware, said “The CoinGeek team is very pleased with the progress of our strategic partners; Squire Mining and Aracore. With this next generation technology, CoinGeek will continue to pull the blockchain industry out of the proverbial basement and into the boardroom.”

Stefan Matthews, Chairman of nChain, one of the industry leaders in blockchain research and development, and a director of Squire Mining added, “The early results indicate that this ASIC microchip has the potential to be the next generation leader in providing hash power for enterprise mining of Bitcoin Cash and other associated crypto currencies. It has also demonstrated the potential to rapidly process consensus protocols across the blockchain faster whilst utilizing less energy than anything currently in this sector.”

Hash rate speed and microchip efficiency are the two most important measuring criteria in the crypto-mining industry to enable end-users to maximize profitability and ROI in their day to day mining operations.

Simon Moore, Executive Chairman and CEO of Squire Mining, stated, “Aracore’s time and investment to date have been validated by the impressive results of this new microchip. Once completed, we believe the speed and efficiency of our ASIC microchip combined with our respective mining systems powered by this Samsung manufactured microchip together have the potential to substantially increase the profitability of enterprise mining facilities around the globe. We look forward to releasing our mining system to the market in the first half of next year through our exclusive distribution partners CoinGeek, and competing for a significant piece of this multi-billion-dollar enterprise mining market.”

About AraCore Technology Corp. – Aracore is a joint venture company established by Squire and Peter Kim to design and develop next generation ASIC chips for mining Bitcoin Cash, Bitcoin and other associated cryptocurrencies. Squire owns a 75% interest in Aracore and Peter Kim owns the remaining 25% interest.

About Squire Mining Ltd. – Squire is a Canadian based company engaged, through its subsidiaries, in the business of developing data mining infrastructure and system technology to support global blockchain applications in the mining space including applicable specific integrated circuit (ASIC) chips and next generation mining rigs to mine Bitcoin Cash, Bitcoin and other associated cryptocurrencies.”

Nvidia Corporation (NASDAQ: NVDA), in 1999, sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Nvidia recently announced that it invited the world’s top automotive safety and reliability company, TÜV SÜD, to perform a safety concept assessment of its new NVIDIA Xavier system-on-chip (SoC). The 150-year-old German firm’s 24,000 employees assess compliance to national and international standards for safety, durability and quality in cars, as well as for factories, buildings, bridges and other infrastructure. As the world’s first autonomous driving processor, Xavier is the most complex SoC ever created. Its 9 billion transistors enable Xavier to process vast amounts of data. Its GMSL (gigabit multimedia serial link) high-speed IO connects Xavier to the largest array of lidar, radar and camera sensors of any chip ever built. “NVIDIA Xavier is one of the most complex processors we have evaluated,” said Axel Köhnen, Xavier lead assessor at TÜV SÜD RAIL. “Our in-depth technical assessment confirms the Xavier SoC architecture is suitable for use in autonomous driving applications and highlights NVIDIA’s commitment to enable safe autonomous driving.”

Advanced Micro Devices, Inc. (NASDAQ: AMD), for more than 45 years, has driven innovation in high-performance computing, graphics and visualization technologies ― the building blocks for gaming, immersive platforms and the datacenter. AMD recently announced the availability of world’s most powerful desktop processor, the 2nd Gen AMD Ryzen Threadripper 2990WX processor with 32 cores and 64 threads. Designed to power the ultimate computing experiences, 2nd Gen AMD Ryzen Threadripper processors are built using 12nm “Zen+” x86 processor architecture and offer the most threads on any desktop processor with the flagship model delivering up to 53% greater performance than the competition’s flagship model. Second Gen AMD Ryzen Threadripper processors support the most I/O2, and are compatible with existing AMD X399 chipset motherboards via a simple BIOS update, offering builders a broad choice for designing the ultimate high-end desktop or workstation PC. “We created Ryzen Threadripper processors because we saw an opportunity to deliver unheard-of levels of multithreaded computing for the demanding needs of creators, gamers, and PC enthusiasts in the HEDT market,” said Jim Anderson, Senior Vice President and General Manager, Computing and Graphics Business Group, AMD. “With the 2nd Gen processor family we took that challenge to a whole new level – delivering the biggest, most powerful desktop processor the world has ever seen.”

KLA-Tencor Corporation (NASDAQ: KLAC), a provider of process control and yield management solutions, partners with customers around the world to develop sinspection and metrology technologies. Recently, KLA-Tencor Corporation announced two new defect inspection products designed to address a wide variety of integrated circuit (IC) packaging challenges. The Kronos™ 1080 system offers production-worthy, high sensitivity wafer inspection for advanced packaging, providing key information for process control and material disposition. The ICOS™ F160 system examines packages after wafers have been diced, delivering fast, accurate die sort based on detection of key defect types-including sidewall cracks, a new defect type affecting the yield of high-end packages. The two new inspection systems join KLA-Tencor’s portfolio of defect inspection, metrology and data analysis systems that help accelerate packaging yield and increase die sort accuracy. “As chip scaling has slowed, advances in chip packaging technology have become instrumental in driving device performance,” said Oreste Donzella, Senior Vice President and Chief Marketing Officer at KLA-Tencor. “Packaged chips need to achieve simultaneous targets for device performance, power consumption, form factor and cost for a variety of device applications. As a result, packaging design has become more diverse and complex, featuring a range of 2D and 3D structures that are more densely packed and shrinking in size with every generation. At the same time, the value of the packaged chip has grown substantially, along with electronics manufacturers’ expectations for quality and reliability.”

Maxim Integrated Products, Inc. (NASDAQ: MXIM) develops innovative analog and mixed-signal products and technologies to make systems smaller and smarter, with enhanced security and increased energy efficiency. Maxim Integrated recently announced that automotive infotainment designers can now upgrade to bigger, higher resolution displays with greater ease, reduced cost and smaller solution size with the MAX20069 from Maxim Integrated Products, Inc. The MAX20069 provides the industry’s first solution integrating four I2C-controlled, 150mA LED backlight drivers and a four-output thin-film-transistor liquid-crystal display (TFT-LCD) bias in a single chip. The IC can reduce design footprint up to one-third compared to the closest competitor’s parts. “Automotive manufacturers are using more screens, larger panels and brighter displays across several vehicle lines to support a safer and more engaging experience on the road,” said Szukang Hsien, Executive Business Manager, Automotive Business Unit, Maxim Integrated. “Maxim’s integrated LED backlight driver and TFT-LCD bias solution supports newer panel types to help automotive manufacturers adopt lower cost yet higher resolution panels with smaller solution size and a high level of integration.”

Toshiba Memory Corporation (TMC) today announced the appointment of Stacy J. Smith as Executive Chairman, effective on October 1, 2018.

Smith brings a long and proven track record of executive leadership to TMC. He has extensive international experience, having both lived and led organizations in the Asia-Pacific, Latin America, Europe, the Middle East and Africa. He will work closely with CEO Yasuo Naruke to provide overall leadership to the business.

Smith previously spent three decades at Intel leading organizations across multiple disciplines. In his role as President, Manufacturing, Operations and Sales, from 2016 to 2018, he led 40,000 employees involved in worldwide manufacturing, technology development, supply chain, pricing and sales. He also served as Intel’s Chief Financial Officer for almost a decade and in this role also had responsibility for corporate strategy, M&A, and Intel Capital. Prior to that he served as Intel’s Chief Information Officer and Vice President for Sales for Europe, the Middle East and Africa.

Smith also brings strong board leadership experience. He currently serves as board chairman at Autodesk and as a director for Metromile. He served previously as a director for Virgin America and for GEVO. He also serves on the Board of Trustees for The Nature Conservancy of California and on the University of Texas McCombs School of Business Advisory Board. Smith attended The University of Texas at Austin, where he received his MBA in 1988 and his BBA in 1985.

“We are thrilled that Stacy is joining Toshiba Memory Corporation in this crucial leadership role at an important time in the company’s history,” said Yasuo Naruke, President and CEO of TMC. “With Stacy’s wealth of international leadership experience and knowledge of the semiconductor space, there is no doubt he is the perfect person to help lead our company in the next phase of growth as an independent company.”

“I am excited to take on this important challenge, and honored to join the TMC team,” said Smith. “Toshiba invented flash memory, and with TMC now operating as an independent company with increased capacity to invest in developing and growing semiconductor technology, the company has a strong growth trajectory ahead of it.”

Smith’s hiring follows the acquisition this year of TMC by an industry consortium led by Bain Capital Private Equity. Bain Capital Private Equity has a long history of successful investments in Japan including Skylark, Jupiter Shop Channel, BellSystem24, Domino’s Pizza Japan, Ooedo Onsen, and Asatsu-DK. The firm’s deep market knowledge, extensive local networks and expertise in driving operational improvement strategies have made Bain Capital a valued partner for Japanese companies.

“Stacy is the right leader to help TMC, already a technology leader in the flash memory industry, achieve its potential as an independent company,” said David Gross-Loh, a director of TMC and a managing director and co-head of Asia for Bain Capital Private Equity. “We are very pleased to welcome Stacy to TMC and look forward to working closely with him and the expanded management team.”

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it has received four TSMC Partner of the Year awards at this year’s TSMC Open Innovation Platform® (OIP) Ecosystem Forum. Cadence was presented with awards for the joint development of the 5nm design infrastructure, the cloud-based TSMC OIP Virtual Design Environment (VDE), the Wafer-on-Wafer (WoW) design solution, and its Tensilica® DSP IP.

These awards were given to Cadence based on the following work that has been delivered:

  • 5nm design infrastructure: Cadence participated in an early, in-depth collaboration with TSMC on the design infrastructure development of this latest advanced-node technology for next-generation system-on-chip (SoC) designs.
  • Cloud-based TSMC OIP VDE: Cadence was one of the first TSMC OIP Cloud Alliance partners and has collaborated with TSMC and mutual customers on successful tapeouts.
  • WoW design solution: Cadence collaborated with TSMC on the development of a design solution and delivered a reference flow that includes implementation, electrical analysis and physical verification
  • DSP IP: Cadence collaborated with TSMC on the delivery of Cadence® Tensilica DSP IP, the most widely-used DSP IP in the TSMC portfolio, which mutual customers use to complete successful projects.

“Through our ongoing collaboration with TSMC, we’ve jointly worked to stay in front of industry trends so that we can enable our mutual customers to consistently deliver successful designs through use of the latest technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager of the Digital & Signoff Group at Cadence. “These awards from TSMC exemplify our ability to drive the industry forward with our innovations with 5nm, cloud, WoW, and DSP IP.”

“Our ongoing, in-depth collaboration with Cadence provides our customers with confidence that they can use the latest technologies and tools to deliver new innovations in competitive market windows,” said Suk Lee, senior director of the Design Infrastructure Marketing Division at TSMC. “We look forward to continuing to partner together on creative new solutions that our mutual customers can use to establish leadership in their respective markets.”

Semiconductors play increasingly important control roles in automotive, industrial and safety critical applications. Quality and reliability are therefore of vital importance and so Presto Engineering has completed certification to the ISO 9001:2015 quality standard at its facility in Caen, France, which is Europe’s largest independent semiconductor test facility.

“We have an extensive and comprehensive range of semiconductor test equipment,” said Dr Alban Colder, Presto’s Site Director at Caen. “This includes testing at every stage from wafer, through die, to final packed device. As part of the ISO 9001: 2015 quality standard, we have a comprehensive range of equipment for non-destructive analysis such as X-Ray to check packaging and bondings, and ultrasound to see inside a device to check for delamination, voids and cracked silicon. There is also equipment to check for failure localization by photoemission or thermal laser stimulation, and deep physical analysis, i.e. strip a device down layer by layer to see exactly where it is failing and why. Other advanced equipment such as an atomic force microscope or a scanning electron microscope are used to reveal the precise details of the structure of a chip down to a few nanometers.”

The key part of a quality system in semiconductors industry, is traceability. Detailed record keeping traces every wafer, every operation, every die and every test. Thus, in the event that there is a faulty chip in the field, it can be traced back to try and determine the cause and to see if any other chips have been affected that might necessitate a recall. In the case of an automotive recall, this could be very expensive so it is vital to be able to narrow the problem down to only the affected chips.

Martin Kingdon, Presto’s VP of Sales, added, “We have assembled a suite of state-of-the-art equipment as part of our commitment of quality and this new standard. We provide customers with a comprehensive service once they provide us with a design that covers every stage of the chip manufacturing and testing process right through to final product. As part of our quality assurance to customers, we rigorously test at every stage. Such a comprehensive test and failure analysis capability all together under one roof is very rare; usually it requires a number of different test houses which means that issues could be missed. Having all the skills and equipment together in one place means that we can keep searching until we find the cause of a problem so that it can be resolved and quality maintained.”

Mentor, a Siemens business, today announced it has qualified complete solutions from its Calibre® nmPlatform™, Analog FastSPICE™ (AFS)™ Platform, Eldo® Platform and Nitro-SoC place and route system for GLOBALFOUNDRIES’ 22FDX Fully-Depleted Silicon-On-Insulator (FD-SOI) integrated circuit (IC) manufacturing processes. GF and Mentor have mutually developed an advanced, first-of-its-kind automated fill flow that ensures analog devices are able to leverage the full performance of these new processes in emerging markets such as ADAS/autonomous driving, IoT, 5G communications, cloud computing and artificial intelligence.

“Mentor is pleased to be taking another step in our longstanding relationship with GF to deliver to our mutual customers solutions that help develop industry innovations,” said Ravi Subramanian, vice president and general manager, IC Verification Solutions, Mentor, a Siemens business. “The combined expertise of GF and Mentor gives designers the ability to develop innovative ICs for a broad number of applications.”

“Mentor has an extremely long history of partnership with GF, as Calibre’s first customer ever,” said Richard Trihy, senior director, Design Enablement at GF. “That partnership continues today with not only additional design kit certifications, but flows that help accelerate design fill efforts at a time when market windows are increasingly shorter.”

Mentor Calibre nmPlatform for GF’s 22FDX

Mentor has made enhancements across its Calibre nmPlatform for GF’s 22FDX process. One of the most significant of these is an industry-first, automated fill flow targeting both analog and radio frequency (RF) IP blocks and full chips. The new fill flow automates a task that previously required fabless design teams to manually develop custom scripts to perform fill effectively. The new flow combines Calibre PERC™, Calibre Pattern Matching and Calibre YieldEnhancer tool capabilities to create both net-aware and orientation-aware filling that results in consistent analog and RF performance independent of where the blocks are placed in the chip.

In addition, Mentor enhanced the Calibre nmDRC™ and Calibre nmLVS™ tools for GF’s 22FDX process. Mentor worked with GF to ensure appropriate coverage, and the two companies are collaborating to continuously optimize the Calibre design kits for runtime performance. At the same time, GF and Mentor worked together to make advanced process requirements transparent to mutual customers within the Calibre design rule checking (DRC) and multi-patterning software.

The Calibre xACTTM parasitic extraction tool is available for GF’s 22FDX process, allowing customers to efficiently balance the needs of high accuracy of critical structures along with high performance required for full chip signoff.

The Calibre PERC reliability platform is a verification solution for both IP and full-chip reliability analysis. Point-to-point and ESD current density reliability checks are critical for today’s complex, dense chip designs, but completing these checks on very large 22FDX designs requires scalability. GF and Mentor collaborated to enable a Calibre PERC solution leveraging a new multi-CPU run capability that allows mutual customers to more quickly find and resolve ESD reliability concerns in their designs.

The Calibre YieldEnhancer tool is certified for GF’s 22FDX processes. Mentor and GF are also jointly delivering enhanced use models that optimize fill runtimes, minimize shape removal caused by an engineering change order (ECO), and ensure consistency across all layers, intellectual property (IP) blocks and full-chip system-on-chips (SoCs) using fill-as-you-go methodologies.

Mentor AFS Platform and Eldo Platform for GF’s 22FDX

Mentor’s AFS Platform and Eldo Platform are supported in the GF 22FDX process. Mutual customers benefit from the AFS Platform (delivering fast, SPICE-accurate verification for the largest nanometer-scale circuits), and Eldo Platform (circuit verification for analog-centric circuits) to verify their chips designed for GF technologies.

Mentor Nitro SoC for GF 22FDX

Mentor’s Nitro SoC place and route system is certified for GF’s 22FDX process. In addition to support for 22FDX process rules, Mentor enhanced the Nitro SoC core engines to meet the new architecture requirements and design rules for this process. This enables Mentor to deliver an optimized digital implementation flow for the 22FDX node.