Category Archives: Device Architecture

Molex Electronic Technologies, LLC, a global manufacturer of electronic solutions, announced today that the company has agreed to acquire the Connected Vehicle Solutions (“CVS”) division of Laird Limited, owned by funds managed by Advent International.

Laird CVS specializes in the design, development and delivery of vehicle antenna systems, smart device integration and vehicle connectivity devices.

These solutions will enhance Molex’s capabilities and support the development of agile connected vehicle technology ecosystems featuring the innovative 10Gbps Ethernet backbone for automotive OEMs building next-generation, intelligent vehicles.

“There is tremendous demand for seamless end-to-end network integration across hardware, software and services in the automotive industry,” said Tim Ruff, senior vice president, Molex Business Development. “Laird CVS expands our geographic reach and strengthens our ability to support automotive OEMs seeking to introduce future-ready vehicles with critical functionality while still containing costs. It aligns with our strategy to provide groundbreaking solutions for a growth market.”

Laird’s world-class expertise and custom-engineered solutions enable customers to transform vehicle connectivity across the globe, making the company a trusted partner to the world’s leading automotive OEMs.

“Our team is excited about the opportunities this transaction creates to combine our technology expertise and experience with that of Molex to help automotive OEMs anticipate and meet the complex challenges of keeping vehicles connected on the move, especially as we continue to move closer to a future where autonomous vehicles are commonplace,” said Steven Brown, president, Laird Connected Vehicle Solutions.

Jones Day acted as Molex’s legal advisor and Evercore served as financial advisor. For Advent, Weil Gotschal acted as legal advisor and Goldman Sachs and Citibank as financial advisors. Financial terms of the transaction were not disclosed. The transaction is subject to customary regulatory clearances.

Imagination Technologies and GLOBALFOUNDRIES (GF) announced today at its annual GTC 2018 conference, a joint collaboration to provide ultra-low-power baseband and radio frequency (RF) solutions for Bluetooth Low Energy® (BLE) and IEEE 802.15.4 technology, using Imagination’s Ensigma connectivity IP on GF’s 22nm FD-SOI (22FDX®) platform. In addition, Imagination has joined GF’s FDXcelerator™ Partner Program.

The combination of 22FDX technology and Imagination’s Ensigma IP provides a power and cost efficient solution that customers can easily integrate into their System on Chip (SoC) designs. The collaboration will enable mutual customers to create innovative and differentiated connected devices for the Internet of Things (IoT) using Imagination’s silicon-proven, ultra-low power Ensigma connectivity engines in GF’s ultra-efficient 22FDX process.

David McBrien, executive vice president of sales and marketing, Imagination, says: “By working with partners such as GF, we continuously enhance our IP for the latest processes. 22FDX is an appealing option for customers designing cost-sensitive devices. The collaboration has made our Ensigma connectivity IP even more power and area efficient. The availability of silicon-proven baseband and RF enables customers to rapidly introduce single-chip wireless devices requiring only a single external antenna.”

“Imagination’s IP and BLE solutions complement GF’s 22FDX FD-SOI capabilities, enabling clients to leverage low-power, low-cost designs for IoT and connected applications,” said Mark Ireland, vice president of ecosystem partnerships at GF. “We are pleased to welcome Imagination as a partner in our FDXcelerator program to further broaden IP and design service choices and flexibility that will best match client requirements.”

Ensigma IP for 22FDX provides a complete IP solution comprising analogue RF/AFE as a hard macro complete with a fully synthesizable baseband IP for applications such as wearable computing, health care, and home control. The solution for ultra-low power Bluetooth Low Energy and IEEE 802.15.4 is currently in development with lead customers, with silicon available in early Q4 2018.

As a part of GF’s FDXcelerator Program, Imagination will join the rapidly-growing number of industry leaders committed to provide a broad set of resources, including EDA tools, IP, silicon platforms, reference designs, design services and packaging and test solutions specific to 22FDX technology. The program’s open framework enables members to minimize development time and cost while simultaneously leveraging the inherent power and performance advantages of FDX technology.

Nanostructures can increase the sensitivity of optical sensors enormously – provided that the geometry meets certain conditions and matches the wavelength of the incident light. This is because the electromagnetic field of light can be greatly amplified or reduced by the local nanostructure. The HZB Young Investigator Group “Nano-SIPPE” headed by Prof. Christiane Becker is working to develop these kinds of nanostructures. Computer simulations are an important tool for this. Dr. Carlo Barth from the Nano-SIPPE team has now identified the most important patterns of field distribution in a nanostructure using machine learning, and has thereby explained the experimental findings very well for the first time.

The computer simulation shows how the electromagnetic field is distributed in the silicon layer with hole pattern after excitation with a laser. Here, stripes with local field maxima are formed, so that quantum dots shine particularly strongly. Credit: Carlo Barth/HZB

Quantum dots on nanostructures

The photonic nanostructures examined in this paper consist of a silicon layer with a regular hole pattern coated with what are referred to as quantum dots made of lead sulphide. Excited with a laser, the quantum dots close to local field amplifications emit much more light than on an unordered surface. This makes it possible to empirically demonstrate how the laser light interacts with the nanostructure.

Ten different patterns discovered by machine learning

In order to systematically record what happens when individual parameters of the nanostructure change, Barth calculates the three-dimensional electric field distribution for each parameter set using software developed at the Zuse Institute Berlin. Barth then had these enormous amounts of data analyzed by other computer programs based on machine learning. “The computer has searched through the approximately 45,000 data records and grouped them into about ten different patterns”, he explains. Finally, Barth and Becker succeeded in identifying three basic patterns among them in which the fields are amplified in various specific areas of the nanoholes.

Outlook: Detection of single molecules, e.g. cancer markers

This allows photonic crystal membranes based on excitation amplification to be optimised for virtually any application. This is because some biomolecules accumulate preferentially along the hole edges, for example, while others prefer the plateaus between the holes, depending on the application. With the correct geometry and the right excitation by light, the maximum electric field amplification can be generated exactly at the attachment sites of the desired molecules. This would increase the sensitivity of optical sensors for cancer markers to the level of individual molecules, for example.

STATS ChipPAC Pte. Ltd. (“STATS ChipPAC” or the “Company”), a provider of advanced semiconductor packaging and test services, announced Friday that the Board of Directors of its holding company, Jiangsu Changjiang Electronics Technology Co., Ltd (‘JCET’) has appointed Dr. Lee Choon Heung as Chief Executive Officer (‘CEO’) for JCET Group, as well as Chief Executive Officer and Chairman for STATS ChipPAC.

Dr. Lee brings to JCET a wealth of expertise and veteran leadership with 20 years of extensive semiconductor packaging and test experience. Dr. Lee served in several senior management positions at Amkor Technology Inc. including head of their R&D centre, head of global procurement, group vice president, senior vice president and Chief Technology Officer. Dr. Lee, holds a Ph.D. in Theoretical Solid State Physics from Case Western Reserve University, currently holds 59 industry patents, and has published 19 academic papers around the world.

“We are excited about the opportunity to bring on board an industry leader of the calibre of Dr. Lee Choon Heung as our new JCET Group CEO,” stated JCET Chairman, Mr. Wang Xinchao. “We are confident in his ability to lead JCET as we continue our growth in both technology and scale moving forward,” continued Mr. Wang. Mr. Wang will continue in his role as Chairman of JCET Group.

The JCET Board of Directors and the management team also expressed their utmost gratitude and appreciation to Dr. Han Byung Joon and Mr. Lai Chih-Ming for their outstanding leadership and valuable contributions during their tenure at STATS ChipPAC. Dr. Han is resigning as chairman of the board of STATS ChipPAC. Mr. Lai will now serve in a new role as executive vice president of JCET Group.

Alpha and Omega Semiconductor Limited (AOS) (Nasdaq: AOSL), a designer, developer and global supplier of a broad range of power semiconductors and power ICs, today introduced the TO-Leadless (TOLL) package in combination with 40V Shield-Gate Technology (SGT) to provide the highest current capability in its voltage class. The TOLL package has the highest current capacity because of AOS’ innovative technology which utilizes a clip to achieve the 400A DC at 25°C capability. The TOLL packaging technology offers very low package resistance and inductance due to the clip technology in comparison to other TO-Leadless packages using standard wire-bonding technology which enables improved EMI performance.

The AOTL66401 (40V) has a 30% smaller footprint compared to a TO-263 (D2PAK) package, including having higher current carry capability that enables the designer to reduce the number of devices in parallel. This new device offers a higher power density in comparison to existing solutions, and is ideally suited for industrial BLDC motor applications and battery management to reduce the number of MOSFETs. The AOTL66401 has a 0.7mOhm max rating at 10Vgs with a maximum drain current of 400A at 25°C and 350A at 100°C case temperature. The pulsed current is rated at 1600A, which is limited by the maximum junction temperature of 175°C.

“With the significant performance improvement, the TOLL with clip technology is a robust package which enables low package parasitics reducing EMI. The AOTL66401 simplifies new designs with the higher current density to enable savings in overall system cost due to a reduced number of devices in parallel. AOS’ TOLL package is best suited for high power applications,” said Peter H. Wilson.

IC Insights’ September Update to The McClean Report shows that as a result of a 51% forecasted increase in the China pure-play foundry market this year (Figure 1), China’s total share of the 2018 pure-play foundry market is expected to jump by five percentage points to 19%, exceeding the share held by the rest of the Asia-Pacific region. Overall, China is forecast to be responsible for 90% of the $4.2 billion increase in the total pure-play foundry market in 2018.

Figure 1

With the recent rise of the fabless IC companies in China, the demand for foundry services has also risen in that country.  In total, pure-play foundry sales in China jumped by 26% last year to $7.5 billion, almost triple the 9% increase for the total pure-play foundry market.  Moreover, in 2018, pure-play foundry sales to China are forecast to surge by an amazing 51%, more than 6x the 8% increase expected for the total pure-play foundry market this year.

Although all of the major pure-play foundries are expected to register double-digit sales increases to China this year, the biggest increase by far is forecast to come from pure-play foundry giant TSMC.  Following a 44% jump in 2017, TSMC’s sales into China are forecast to surge by another 79% in 2018 to $6.7 billion. As a result, China is expected to be responsible for essentially all of TSMC’s sales increase this year with China’s share of the company’s sales more than doubling from 9% in 2016 to 19% in 2018.

As shown in Figure 2, much of TSMC’s sales surge into China has come over the past year, with 2Q18 sales into the country being almost double what they were in 3Q17.  A great deal of the company’s recent sales surge into China has been driven by increased demand for custom devices going into the cryptocurrency market.  It turns out that many of the large cryptocurrency fabless design firms are based in China and most of them have been turning to TSMC to produce their advanced chips for these applications.  It should be noted that TSMC includes its cryptocurrency business as part of its High-Performance Computing segment.

Figure 2

While TSMC has enjoyed a great ramp up in sales for its cryptocurrency business over the past year, the company has indicated that a slowdown is expected for this business in the second half of this year.  It appears that the demand for cryptocurrency devices is highly dependent upon the price for the various cryptocurrencies (the most popular of which is Bitcoin).  As a result, the recent plunge in the price for Bitcoins (going from over $15K per Bitcoin in January of this year to less than $7K in September), and other cryptocurrencies as well, is lowering the demand for these ICs.  Moreover, since TSMC realized from the beginning that the cryptocurrency market was going to be volatile, the company did not adjust its capacity plans based on the recent strong cryptocurrency demand and does not incorporate cryptocurrency business assumptions into its forecasts for future long-term growth.

WIN Semiconductors Corp. (TPEx:3105), the world’’s largest pure-play compound semiconductor foundry, is driving the development and deployment of 5G user equipment and network infrastructure in the sub-6GHz and mmWave frequency bands. Front-end semiconductor technology has a significant influence on battery life and total power consumption of mobile devices and active antenna arrays employed in mmWave network infrastructure. GaAs is the technology of choice for front-ends used in LTE mobile devices and satisfies stringent linearity and efficiency requirements providing high quality of service while maximizing battery life. 5G user equipment and MIMO access points will impose more difficult linearity/power consumption specifications than LTE, and WIN’s portfolio of high performance GaAs technologies is well positioned to meet these new requirements and provide best value front-end solutions.

The fundamental performance advantages of GaAs make it the dominant semiconductor technology for cellular and Wi-Fi RF front-ends used in mobile devices. The technical and manufacturing demands of these large and highly competitive markets have driven significant advances in GaAs technology, and now offers best-in-class front-end performance in all 5G bands and multifunction integration necessary for complex mmWave active antenna systems. WIN’s advanced GaAs platforms integrate best-in-class transmit and receive amplifier technologies with high performance switch, logic and ESD protection functions to realize compact high performance, single chip, front-ends for mobile devices and MIMO access points operating in the sub-6GHz and mmWave 5G bands.

WIN Semiconductors’ innovative GaAs technologies, such as PIH1-10, can now monolithically integrate a high efficiency Tx power amplifier (PA), ultra-low Fmin Rx low-noise amplifier (LNA) and low loss PIN switch in a single chip mmWave front-end. In addition, this highly integrated GaAs technology provides optional linear Schottky diodes for power detectors and mixers, low capacitance PIN diodes for ESD protection and optimized E/D transistors for logic interfaces. This suite of capabilities comes in a humidity-rugged back-end, available with a copper redistribution layer and copper pillar bumps to reduce die size and allow flip chip assembly, enabling GaAs front-ends to fit within 28 and 39 GHz antenna lattice spacing.

By Jay Chittooran

Last week, more than a dozen senior semiconductor executives traveled to Washington, DC for the first-ever Fall Washington Forum. The SEMI Washington Forum, a venue for SEMI members to educate lawmakers about the industry, focused on action against China, both in the form of tariffs and export controls.

Our industry is global, and companies rely heavily on trade. In 2017, more than 90 percent of equipment made in the United States was exported. Because of this dynamic, the United States holds a nearly $9 billion trade surplus in this industry. SEMI is supportive of trade policies that open foreign markets.

In the meetings, the executives expressed deep concern that the tariffs would inflict deep damage to the U.S. economy, including to SEMI members. Estimates suggest that the Sec. 301 tariffs (and the Chinese retaliatory tariffs) will cost semiconductor companies more than $700 million annually, dramatically increasing the cost of doing business. These tariffs also threaten U.S. technological leadership. The United States has led innovation for decades. However, by pursuing policies that limit market access opportunities, company-led R&D and innovation will slow, which, in turn, will curb further export potential.

SEMI companies also stressed that because of the blunt application of these tariffs, this action will actually hurt U.S. companies as much as it hurts their Chinese competitors. Indeed, about 40 percent of imports in our sector from China are from U.S. or other non-Chinese companies. Further, the semiconductor industry relies on a vast network of supply chains, which have been built and qualified over the course of years. A fundamental revamp of supply chains is simply not feasible. This would be expensive, time-consuming, and resource-intensive.

With a growing number of policy issues that are central to and could have significant impact for semiconductor companies, SEMI hosted its first ever Fall Washington Forum for members of its North American Advisory Board (NAAB). SEMI also invited several other industry executives. In total, 14 senior industry executives, including representatives from equipment manufacturers, component suppliers, and materials providers, attended the Fall Forum.

During the two days of meetings, SEMI met with several senior Administration officials to better the policies being enacted and considered as well as encourage all parties to not impose barriers to commerce, which would severely impact the semiconductor industry. SEMI also met with Members of Congress and their staffs on this issue.

All told, attendees at the Fall Forum had more than 15 meetings with policymakers, reflecting the great impact of public policy on SEMI members companies. At a time when the stakes for the industry could not be higher, direct engagement with lawmakers is critical. The Washington Forum offers an incredible opportunity for members to better understand the impact of key public policy issues and gain firsthand experience in influencing policy and helping lawmakers better understand the industry.

If you are interested in learning more about the SEMI Washington Forum or SEMI’s public policy program, please contact Jay Chittooran by email at [email protected].

GLOBALFOUNDRIES announced this week at its annual Global Technology Conference (GTC), that the company’s mobile-optimized 8SW 300mm RF SOI technology platform has been qualified and is in production. Several clients are currently engaged for this RF SOI process, tailored to accommodate aggressive LTE and Sub-6 GHz standards for front-end module (FEM) applications, including 5G IoT, mobile device and wireless communications.

Leveraging the 300mm RF SOI process, 8SW delivers significant performance, integration and area advantages with up to 70 percent power reduction and 20 percent smaller overall die size compared to the previous generation. The technology enables superior LNAs (low-noise amplifiers) switches and tuners by supplying higher voltage handling and a best-in-class on-resistance (Ron) and off-capacitance (Coff) for reduced insertion loss with high isolation. The optimized RF FEM platform helps designers develop solutions that enable extremely fast downloads, higher quality connections and reliable data connectivity for today’s 4G/LTE Advanced operating frequencies and future sub-6GHz 5G mobile and wireless communication applications.

“GF has now delivered more than 40 billion RF SOI chips for the world’s smart devices, and this latest generation of RF SOI technology is another proof point that we’re poised to meet accelerating global demand for solutions that deliver seamless, reliable data connectivity everywhere,” said Christine Dunbar, vice president of RF business unit at GF. “The mobile market continues to favor RF SOI, and GF’s industry leading, 8SW process in 300 mm manufacturing is specifically designed to help our clients take advantage of more frequency bands that will deliver ultra-reliable communications across high-band LTE and future 5G applications.”

“We are proud to support GF’s new advanced and differentiated 8SW technology on 300mm RF SOI substrates and to continue our long-term strategic engineering and manufacturing collaboration enabling next-generation connectivity solutions,” said Dr. Bernard Aspar, EVP, Soitec. “We are ready to deliver the 300mm RF SOI substrates in high volumes to meet GF clients’ growing market demands.”

“SEH congratulates GF on their 8SW platform. SEH believes 300 mm RF SOI products are an important technology, whose time has come,” Nobuhiko Noto, General Manager of SOI Division at SEH. “SEH has been a long time partner on RF technology and looks forward to supporting GF for their future generations of RF technologies as well. We will continue to be a supplier to the 300 mm RF SOI market as it grows.”

GF’s manufacturing legacy and deep technical expertise in RF SOI process has resulted in more than 40 billion RF SOI chips shipped for next-generation RF-enabled devices.

8SW is manufactured on GF’s 300mm production line at Fab 10 in East Fishkill, N.Y., enabling clients to take advantage of advanced tooling and processes for faster time-to-market with industry-leading RF SOI. Qualified process design kits are available now.

Mark Lipacis, Managing Director of Jefferies Group LLC and a leading analyst in identifying semiconductor industry trends and opportunities, will present a featured keynote during the GSA Silicon Summit – East, being held Tuesday, October 9 in Saratoga Springs, NY.

The inaugural conference is presented by the Saratoga County Prosperity Partnership (Saratoga Partnership), Saratoga County, NY’s economic development agency; the Global Semiconductor Alliance (GSA), a leading voice for the worldwide semiconductor industry; and the Center for Economic Growth (CEG), a regional economic and business development organization.

A top executive with the world’s only independent full-service global investment banking firm, Lipacis will discuss “The 4th Tectonic Shift in Computing – The Next Growth Opportunity for Semis.” Highlighting the technical innovations that translate to tectonic shifts in computing, his remarks will focus on the current evolution to a parallel processing/Internet of Things (IoT) model, driven by improvements in parallel processing and Artificial Intelligence (AI) technologies.

“Mark Lipacis is a thought leader with a deep market research expertise in edge computing and IoT. We look forward to Mark’s closing keynote and the important insights that he will share on the 4th tectonic shift in computing and the new opportunities it brings for the semiconductor industry and end markets,” said Dr. Shrikant Lohokare, Executive Director and Senior Vice President, GSA. “As rapid innovation continues to disrupt computing, and the impact of the semiconductor industry ripples through the world of business, his outlook will be of particular significance in addressing challenges and harnessing opportunities.”

“With the presence of GLOBALFOUNDRIES marking Saratoga County as a global leader in advanced semiconductor manufacturing, Silicon Summit – East is the ideal venue for Mark Lipacis to present a worldview of the latest industry evolution in computing,” said Marty Vanags, President of the Saratoga County Prosperity Partnership. “We are eager to hear his vision for the future, and in the process, to connect companies throughout the supply chain with opportunites to locate and grow high-tech business in Saratoga County.”

Lipacis has 18 years of experience in equity research, having joined Jefferies Group LLC in 2011 from Morgan Stanley, where he spent four years as a senior semiconductor analyst, and most recently as a managing director. In 2010, he was a runner-up in the institutional investor analyst survey, ranked number three in the Greenwich Associates poll, and ranked highly in previous Wall Street Journal and Starmine Polls – including being recognized as the number one semiconductor stock picker by Starmine in 2009. Previously, he was a first vice president and senior semiconductor analyst at Prudential, and prior to that a director and lead communicatons semiconductor analyst at Merrill Lynch.

Scheduled to deliver the opening keynote is Dr. Gary Patton, Chief Technology Officer and Senior Vice President of Worldwide Research and Development at GLOBALFOUNDRIES. A well-recognized industry leader in semiconductor technology R&D with over 30 years of semiconductor experience, Patton is responsible for GLOBALFOUNDRIES’ semiconductor technology R&D roadmap, operations and execution. His address will discuss “Market Drivers for Moore and Beyond Moore Semiconductor Technologies.”

The Networking Break Sponsor for GSA Silicon Summit – East is Micron. Gold Sponsors are Analog Devices, BBL and National Grid. Complete information about the event, including the program and sponsorship opportunities, can be found at https://www.gsaglobal.org/2018sse/.

GSA Silicon Summit – East was created through a strategic alliance established last year by the Saratoga Partnership and GSA. The event, with a theme of “Harnessing Emerging Semiconductor Market Opportunities,”  is designed to promote partnerships and drive efficiencies that advance semiconductor technology and business, while also informing the regional ecosystem on growth opportunities.