Category Archives: Device Architecture

Oxygen vs. nanochip


September 25, 2018

For the first time ever, an international team of scientists from NUST MISIS, the Hungarian Academy of Sciences, the University of Namur (Belgium), and Korea Research Institute for Standards & Science has managed to trace in details the structural changes of two-dimensional molybdenum disulfide under long-term environmental impact. The new data narrows the scope of its potential application in microelectronics and at the same time opens up new prospects for the use of two-dimensional materials as catalysts. The research results have been published in the international scientific journal Nature Chemistry.

Pavel Sorokin, head of the research team and leading researcher at the NUST MISIS Laboratory of Inorganic Nanomaterials. Credit: Sergey Gnuskov/NUST MISIS

Molybdenum disulfide (MoS2) is considered a promising basis for a variety of ultra-small electronic devices such as high-frequency detectors, rectifiers, and transistors, so research teams around the world are actively studying its two-dimensional format, nanofilm. However, the new research conducted by NUST MISIS scientists has demonstrated that when this two-dimensional material is significantly oxidized in air, it turns into another connection.

Any electronic device using MoS2, without proper protection would simply stop working relatively quickly. To potentially use MoS2 in microelectronics, the devices would have to be encapsulated.

«For the first time ever, we have managed to experimentally prove that a single-layer molybdenum disulfide strongly degrades under environmental conditions, oxidizing and turning into a solid solution MoS2-xOx,. The functions of a two-dimensional semiconductor without defects and losses can be implemented with molybdenum diselenides, another material with a similar structure», said Pavel Sorokin, head of the research team and leading researcher at the NUST MISIS Laboratory of Inorganic Nanomaterials.

In the experiments, two-dimensional layers of molybdenum disulfide obtained as a result of the stratification of molybdenum disulfide crystals by ultrasound, were maintained in environmental conditions at normal room temperature and lighting for long periods (more than a year and a half), during which scientists observed the changes in the structure of its surface.

«Thanks to the use of tunneling microscopy, we were able to track the structural changes of crystals of two-dimensional sulfur disulfide at the atomic level during long-term exposure to environmental conditions. We have discovered that the material previously considered stable is actually subject to spontaneous oxidation, but at the same time, the original crystal structure of MoS2 monolayers retains formations of MoS2-xOx solid solutions. Our simulations have allowed us to propose a mechanism of forming such solid solutions, and the results of the theoretical calculations are in complete agreement with our experimental measurements» – said Zakhar Popov, one of the co-authors of the study and a senior researcher at the NUST MISIS Laboratory of Inorganic Nanomaterials.

«The study’s second key discovery is the new material that the monolayer of the molybdenum disulfide turns into is a two-dimensional crystal of a solid solution MoS2-xOx, which is an effective catalyst for electromechanical processes», concluded Sorokin.

The Semiconductor Industry Association (SIA), in collaboration with the Semiconductor Research Corporation (SRC), today announced the winners of its 2018 University Research Awards: Dr. Judy Hoyt, professor of electrical engineering and computer science at the Massachusetts Institute of Technology (MIT), and Dr. Naresh Shanbhag, professor of electrical and computer engineering at the University of Illinois at Urbana-Champaign. Professors Hoyt and Shanbhag will receive the awards in conjunction with the SIA Annual Award Dinner on Nov. 29, 2018 in San Jose, Calif.

“Research is the lifeblood of innovation, spurring new technologies that drive growth in the semiconductor industry and throughout the U.S. economy,” said John Neuffer, president and CEO of SIA, which represents U.S. leadership in semiconductor manufacturing, design, and research. “Throughout their distinguished careers, Professors Hoyt and Shanbhag have advanced groundbreaking scientific research, driven breakthroughs in semiconductor technology, and helped strengthen America’s global technological leadership. We are pleased to recognize Dr. Hoyt and Dr. Shanbhag for their tremendous accomplishments.”

Neuffer also highlighted the importance of government investments in semiconductor research funded through agencies such as the National Science Foundation, the National Institute of Standards and Technology, the U.S. Department of Energy, and the Defense Department’s Defense Advanced Research Projects Agency. He expressed SIA’s readiness to work with the Trump administration and Congress to prioritize these investments in scientific research.

“The University Research Award was established to recognize lifetime achievements in semiconductor research by university faculty,” said Ken Hansen, president & CEO of SRC. “Drs. Shanbhag and Hoyt have repeatedly advanced the state-of-the-art semiconductor design and technology in their respective fields. These esteemed professors’ influence on their students has produced new leaders and contributors in the semiconductor industry. The research output from universities tackling industry relevant challenges plays an integral role in next-generation innovations. It is with great appreciation and admiration that the entire SRC team congratulates Dr. Shanbhag and Dr. Hoyt.”

Dr. Hoyt will receive the honor for excellence in semiconductor technology research. She is being recognized for her contributions in pioneering development of strained Si MOSFET devices. Dr. Hoyt’s work helped to break the 10nm barrier and is broadly adopted by companies such as Intel, TSMC, IBM, and others. From 1988-1999, Dr. Hoyt was a senior research scientist in electrical engineering at Stanford University. In January 2000, she joined the faculty at MIT in the Department of Electrical Engineering and Computer Science. She currently serves as associate director within the Microsystems Technology Laboratories (MTL). Dr. Hoyt received a Ph.D. in Applied Physics from Stanford University.

Dr. Shanbhag will receive the award for excellence in semiconductor design research. Specifically, he is being honored for pioneering an Information-Theoretic approach for computing by fusing Claude Shannon’s theory for communications with Turing machines. After designing DSL chip-sets at AT&T Bell Laboratories (1993-1995), he joined the faculty at the University of Illinois at Urbana-Champaign in the Department of Electrical and Computer Engineering where he now holds the Jack S. Kilby Professorship. He co-founded Intersymbol Communications, Inc., and served as CTO (2000-2007), bringing electronic dispersion compensation chip-sets for OC-192 ultra long-haul fiber optic links. In January 2013, Dr. Shanbhag became the founding director of the Systems On Nanoscale Information fabriCs (SONIC) Center, a five-year, multi-university center funded by DARPA and SRC. Dr. Shanbhag received a Ph.D. from the University of Minnesota in Electrical Engineering.

MagnaChip Semiconductor Corporation (“MagnaChip”) (NYSE: MX), a designer and manufacturer of analog and mixed-signal semiconductor products, announced today that it will hold a Foundry Technology Symposium at the Shangri-La in Shenzhen, China, on November 27, 2018. After holding a successful Foundry Technology symposium in Shenzhen, China in 2015, this second technology symposium in Shenzhen is part of MagnaChip’s global foundry targeted geographic strategy to increase MagnaChip’s brand awareness in China.

Major topics to be discussed are MagnaChip’s current Foundry service offerings and future business roadmap, specialty technology processes, target applications and end-markets. This symposium is being conducted as a direct response to the increased interest and demand from current fabless customers in China for advanced analog and mixed-signal specialized foundry technologies.

During the symposium in Shenzhen, MagnaChip will highlight its technology portfolio along with discussions focused on mixed-signal, low-power technologies in the Internet of Things (IoT) sector, Bipolar-CMOS-DMOS (BCD) for high-performance analog and power management applications, Ultra-High Voltage (UHV) and Non-Volatile Memory (NVM). In addition, MagnaChip will present technologies used in applications including smartphones, tablet PCs, automotive, LED lighting, consumer wearables and IoT.

“We hope that this Foundry Technology Symposium in Shenzhen will better position us to understand our customers’ needs in China,” said YJ Kim, Chief Executive Officer of MagnaChip. “With our technology symposiums held in United States, Taiwan and now in Shenzhen, China, we strongly believe that we will be able to better serve our global customers with our long history of providing successful foundry services and with our deep technological expertise.”

A multitude of fabless companies, IDMs (Integrated Device Manufacturers) and other semiconductor companies are expected to attend MagnaChip’s Shenzhen technology symposium.

To sign up for the event, and to receive more detailed information regarding the symposium, please visit www.magnachip.com or ifoundry.magnachip.com.

The RISC-V Foundation, a nonprofit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), today announced the keynotes for the first annual RISC-V Summit at the Santa Clara Convention Center in Santa Clara, Calif. from Dec. 3-6, 2018.

The Summit, in partnership with Informa’s Knowledge & Networking Division, KNect365, will gather the RISC-V community for a multi-track conference featuring tutorials, exhibitions and networking receptions. Leading technology companies and research institutions will share notable product updates, projects and implementations that accelerate the RISC-V ecosystem and reveal the future path for RISC-V. The initial keynotes for the Summit will be conducted by Antmicro, Facebook, Microchip, NXP, SiFive and Western Digital.

  • Michael Gielda, Vice President Business Development of Antmicro: “Accelerating Innovation: Why Google’s TPU Was Just the Start”
  • Robert Shearer, Director of Silicon Architecture and Modeling of Facebook: “The 100X Problem – How to Redefine Silicon for Augmented Reality”
  • Patrick Johnson, Vice President, Mixed Signal and FPGA Business Units of Microchip: “Enabling the Freedom to Innovate”
  • Rob Oshana, Vice President, Software Engineering of NXP: “Deepening the RISC-V Ecosystem to Drive Industry-Wide Adoption”
  • Yunsup Lee, Chief Technology Officer of SiFive: “Opportunities and Challenges of Building Silicon in the Cloud”
  • Martin Fink, Executive Vice President and Chief Technology Officer of Western Digital: “Unleashing Innovation from Core to Edge”

“This year has been a hallmark one for the RISC-V Foundation,” said Rick O’Connor, executive director of the RISC-V Foundation. “The RISC-V ecosystem is continuing to grow at a rapid pace, surpassing 150 member companies from 25 countries across the world. We’re excited to bring the RISC-V community together at the inaugural RISC-V Summit and end the year continuing the momentum from all the RISC-V milestones that have been achieved thus far.”

“This year has been a hallmark one for the RISC-V Foundation,” said Rick O’Connor, executive director of the RISC-V Foundation. “The RISC-V ecosystem is continuing to grow at a rapid pace, surpassing 150 member companies from 25 countries across the world. We’re excited to bring the RISC-V community together at the inaugural RISC-V Summit and end the year continuing the momentum from all the RISC-V milestones that have been achieved thus far.”

Micron Technology, Inc. (Nasdaq: MU) announced today that the company has appointed Mike Bokan as senior vice president of Worldwide Sales, effective Oct. 1, 2018. Bokan succeeds Steve Thorsen, who is retiring from Micron after 30 years with the company but will remain as an adviser through early November 2018 to ensure a smooth transition. Bokan is being promoted to senior vice president and will report directly to Micron President and CEO Sanjay Mehrotra.

“On behalf of the company, I want to thank Steve for his dedication to Micron’s success over the last three decades,” Mehrotra said. “He has been instrumental to the company’s tremendous growth over the years. During his tenure as head of Worldwide Sales, the company has enjoyed record sales, culminating in fiscal year 2018 revenue of over $30 billion. We wish Steve the very best in this next chapter of his life.”

“I am proud of my long career at Micron and have enjoyed building strong relationships with our customers around the world,” Thorsen said. “Mike and I have worked closely for many years, and I am confident he will be highly successful in taking on the leadership of the Worldwide Sales organization.”

Bokan is currently corporate vice president of Worldwide Sales at Micron. He joined the company in 1996 and held various sales management positions before moving to Micron’s Crucial division, where he eventually became general manager. In 2003, Bokan took on the role of director of Sales for Micron Technology. In 2007 he was promoted to senior director of Sales before becoming vice president of Worldwide OEM Sales in 2008 and corporate vice president of Worldwide Sales in 2018.

“Mike has been a great part of our sales leadership team,” Mehrotra said. “He has developed deep and trusted relationships with our OEM and hyperscale customers, as well as with our distribution partners. This is a natural next step for him, and we look forward to his leadership in driving our sales organization.”

“I am honored to follow in Steve’s footsteps and continue to broaden our market reach as memory and storage become increasingly critical to our customers,” Bokan said. “Micron is very well-positioned to take advantage of the growing demand for our products and solutions. I look forward to helping lead the company to the next level.”

Bokan earned a bachelor’s degree in business administration from Colorado State University.

By Christian G. Dieseldorff and Eugenia Liu

SEMI FabView update for calendar year Q3 2018

Global fab construction investment shows continuing strength, with 19 new fab projects expected to begin construction in 2019 and 2020, based on the latest data published in SEMI’s World Fab Forecast.

Fab investment is just one indicator of how growing demand in areas such as high-performance computing, data storage, artificial intelligence (AI), cloud computing, and automotive are driving the fourth consecutive year of spending growth in the semiconductor industry. Below are a few highlights* from September’s SEMI FabView:

Memory: Not fading

  • Micron plans to invest $3 billion by 2030 in Manassas, Virginia – These investments, driven by strong demand for automotive applications, are contemplated in Micron’s long-term model. The production ramp is anticipated to be in the first half of 2020.
  • SK Hynix to build new DRAM fab in Icheon (Gyeonggi Province), Korea – The construction, to be completed by the end of 2020, will adopt 1znm node (probably EUV). Total investment is estimated to exceed $13 billion.
  • Nanya Technology doubles 2018 capex plan – The increase is for additional DRAM capacity and more 20nm DRAM conversion (from 30nm).

200mm and below: Not leading edge, but continues to draw investment

  • Vanguard changes fab investment strategy – Vanguard will focus on 200 mm and has scrapped its plan for 300mm expansion.
  • Murata to invest into 150mm expansion – Murata announced a 5 billion Yen investment (US$44.6 million) in a new fab extension in Vantaa, Finland.

Investment, M&A in Analog, Logic, Power and Opto Segments

  • Texas Instruments is looking to invest $3.2 billion in new fab construction in 2019 – Texas Instruments is eyeing Richardson, Texas and also considering sites outside Texas.
  • Bosch 300mm fab in Dresden, Germany – Bosch held a groundbreaking ceremony on April 24. Equipment installation is expected in 2H19.
  • Microchip completes acquisition of Microsemi – Microchip closed its $8.45 billion acquisition of Microsemi on May 29. Microsemi has five fabs in the U.S. with a wide range of semiconductor products and system solutions.

New fabs in China keep on coming

  • Shanghai Jita Semiconductor/Huada Semiconductor – Shanghai Jita Semiconductor, a subsidiary of Huada Semiconductor and China Electronics Corporation (CEC), announced plans earlier this month to build both 200 mm and 300 mm semiconductor fabs for analog and power semiconductors in Shanghai. The combined fab investment will total $5.18 billion.
  • Hamamatsu Photonics building 200 mm fab – Hamamatsu announced that it is building a new facility Investment of 2.8 billion Yen (US$25 million) to boost opto semiconductor capacity. Production is anticipated to start in late 2019.

*Actual FabView updates provide more detail

SEMI FabView, a mobile-friendly, interactive version of SEMI’s popular World Fab Forecast, delivers on-demand fab information such as fab spending and capacity for over 1,200 facilities, including over 60 planned facilities worldwide, across a wide range of product segments including Power, GPU, Memory, Foundry, MEMS and Sensors fabs. Fab data include region, start of construction, operation, construction and equipment spending, capacity, wafer sizes, product types and geometries. SEMI FabView subscribers receive forecast model updates through SEMI’s World Fab Database.  Click here for a trial if you want to experience SEMI FabView first hand.

Christian G. Dieseldorff is senior principal analyst and Eugenia Liu is senior product marketing manager, Industry Research and Statistics, SEMI, Milpitas, California. 

Originally published on the SEMI blog.

Toshiba Memory Corporation and Western Digital Corporation (NASDAQ:WDC) yesterday celebrated the opening of a new semiconductor fabrication facility, Fab 6, and the Memory R&D Center, at Yokkaichi operations in Mie Prefecture, Japan.

Fab 6 and Memory R&D Center, Yokkaichi Operations (Photo: Business Wire)

Toshiba Memory started construction of Fab 6, a dedicated 3D flash memory fabrication facility, in February 2017. Toshiba Memory and Western Digital have installed cutting-edge manufacturing equipment for key production processes including deposition and etching. Mass production of 96-layer 3D flash memory utilizing the new fab began earlier this month.

Demand for 3D flash memory is growing for enterprise servers, data centers and smartphones, and is expected to continue to expand in the years ahead. Further investments to expand its production will be made in line with market trends.

The Memory R&D Center, located adjacent to Fab 6, began operations in March of this year, and will explore and promote advances in the development of 3D flash memory.

Toshiba Memory and Western Digital will continue to cultivate and extend their leadership in the memory business by actively developing initiatives aimed at strengthening competitiveness, advancing joint development of 3D flash memory, and making capital investments according to market trends.

Dr. Yasuo Naruke, President and CEO of Toshiba Memory said, “We are excited about opportunities to expand the market for our latest generation of 3D flash memory. Fab 6 and Memory R&D Center enable us to maintain our position as a leading player in the 3D flash memory market. We are confident that our joint venture with Western Digital will allow us to continue producing leading edge memories at Yokkaichi.”

“We are pleased to be opening Fab 6 and the Memory R&D Center with our valued partner Toshiba Memory. For nearly two decades, the successful collaboration between our companies has fostered growth and innovation of NAND flash technology,” said Steve Milligan, Chief Executive Officer, Western Digital. “We are ramping production of 96-layer 3D NAND to address the full range of end market opportunities from consumer and mobile applications to cloud data centers. Fab 6 is a cutting-edge facility that will enable us to further our technology and cost leadership position in the industry.”

NXP Semiconductors N.V. (NASDAQ: NXPI) today announced that on September 19, 2018 (the “Closing Date”) its subsidiaries NXP B.V and NXP Funding LLC (the “Borrowers”), the lenders party thereto and Barclays Bank Plc, as administrative agent, entered into a US$1,000,000,000 senior unsecured bridge term credit facility agreement (the “Bridge Term Credit Agreement”).  On the Closing Date, an aggregate principal amount of US$1,000,000,000 of term loans (the “Term Loans”) were borrowed under the Bridge Term Credit Agreement.  The Term Loans mature 364 days following the Closing Date and bear interest, at the option of the Borrowers, at either (a) a LIBOR rate plus an applicable margin of 1.5 percent or (b) a base rate plus an applicable margin of 0.5 percent.

The proceeds of the Loans hereunder shall be used for general corporate purposes of the Borrower as well as to finance parts of the announced equity buy-back program.

All present and future obligations of the Borrowers arising under and pursuant to the terms of the Bridge Term Credit Agreement are guaranteed pursuant to a guaranty agreement dated as of the Closing Date (the “Guaranty Agreement”) and made by NXP Semiconductors Netherlands B.V., Freescale Semiconductor Holdings V, Inc., and NXP USA, Inc., in favor of Barclays Bank Plc, as administrative agent.

By Anand Chamarthy

Materials innovation has always been vital to the semiconductor industry. In the past, it was high-κ gate dielectrics. Today, Cobalt is seen as a replacement for Tungsten in middle-of-line (MOL) contacts.

What materials innovation will the future bring?

A likely answer is Graphene, the wonder material discovered in 2004.

Graphene is one atomic layer of carbon, the thinnest and strongest material that has ever existed. It is 200 times stronger than steel and the lightest material known to man (1 square meter weighing around 0.77 mg). It is an excellent electrical and thermal conductor at room temperature with an electron mobility of ~ 200,000

cm2.V-1.s-1. At one atomic layer, graphene is flexible and transparent. Other notable properties of Graphene are its uniform absorption of light across the visible and near infrared spectrum and its applicability towards spintronics-based devices.

Graphene and Moore’s Law

Moore’s Law scaling can be broken down into 4 key areas:

  • Lithography
  • FET
  • Advanced Packaging (2.5D and 3D IC)
  • Interconnect Material

Solutions for upcoming nodes are starting to emerge in the first two areas (EUV and Nanowire- or Nanosheet-based FET respectively). Graphene play an important role in the latter two areas. For advanced packaging, Graphene can be used as a heat spreader (to lower overall thermal resistance), or as an EM shield (to lower crosstalk) as part of a 3D IC package.

Active Graphene device layers can potentially be stacked on top of each other using a low-temperature transfer process (< 400°C) to allow for a dense heterogeneous “memory near compute” configuration. This is an area DARPA is actively researching as part of its new $1.5 billion Electronics Resurgence Initiative.

Regarding interconnects, Copper interconnects are running out of steam and becoming a major IC bottleneck (projected 40% total delay for 7 nm node). Graphene’s high electron mobility and thermal conductivity make it an attractive interconnect material for MOL and back-end-of-line (BEOL), especially at line widths < 30 nm.

Graphene Device Applications

Graphene-based semiconductor applications are already starting to hit the market. A fully integrated optical transceiver (with a Graphene modulator and photodetector) operating at 25 Gb/s/channel was on display at the recent Mobile World Congress in Barcelona. San Diego-based Nanomedical Diagnostics is selling a medical device that uses a Graphene biosensor. Europe-based Emberion is building Graphene optoelectronic sensors that might find a home in LIDAR applications, where there is currently a focus on improving sensing in low-light conditions.

What will the overall Graphene roadmap in the semiconductor industry look like? The history of ion implantation serves as a good example of how a fundamental scientific discovery moves from the lab to the foundry floor.

The dominant view in the semiconductor industry at the time was that ion implantation would not work in practice (vs. thermal diffusion) and that, if it did, it would only marginally improve the manufacturing yields of existing products. There was nothing obvious about the transfer of ion bombardment techniques from nuclear physics research to semiconductor production.

Varian (led by British physicist Peter Rose) built a new, advanced ion implant tool that Mostek (DRAM manufacturer based in Texas) was able to use to create MOS ICs with clear competitive advantages. The successful collaboration between Varian and Mostek was the turning point in the development of ion implantation as a major semiconductor manufacturing process. Over the next few years, semiconductor firms used ion implantation in a growing number of process steps and, by the late 1970s, it became one of the main processes used in semiconductor manufacturing.

Likewise, the Graphene world needs to work closely with the semiconductor industry to develop the tools and techniques required to solve fundamental issues around Graphene growth (good uniformity over large area, low defect density) and Graphene transfer (high throughput, CMOS compatible). It is only then will we fully realize a future that includes 2D materials.

The first step in this process is cross-industry education and initiating the dialogue between semiconductor industry and graphene companies. The National Graphene Association will be hosting the largest gathering of graphene companies and commercial stakeholders at the Global Graphene Expo & Conference, October 15-17, 2018, in Austin, Texas.

Learn more about graphene at the upcoming Global Graphene Expo & Conference with dedicated panels of experts and investors, and roundtable discussions on how Graphene will impact the semiconductor industry. The event promo code is SEMINGA.

About the Author

Anand Chamarthy is the CEO and Co-Founder of Lab 91, an Austin-based startup that is working towards Graphene/CMOS integration at the foundry level. Anand can be reached at [email protected].

About the National Graphene Association

The National Graphene Association is the main organization and body in the U.S. promoting and advocating for commercialization of graphene and addressing critical issues such as standards and policy development.

Originally published on the SEMI blog.

In its Mid-Year Update to the 2018 McClean Report, IC Insights updated its forecast of sales growth for each of the 33 major IC product categories defined by WSTS (Figure 1).  IC Insights now projects that seven product categories will exceed the 16% growth rate expected from the total IC market this year. For the second consecutive year, the DRAM market is forecast to top all IC product segments with 39% growth. Overall, 13 product categories are forecast to experience double-digit growth and 28 total IC product categories are expected to post positive growth this year, down slightly from 29 segments in 2017.

Rising average selling prices for DRAM continued to boost the DRAM market through the first half of the year and into August.  However, IC Insights believes the DRAM ASP (and subsequent market growth) is at or near its peak, as a big rise in DRAM capital expenditures for planned capacity upgrades and expansions is likely put the brakes on steep market growth beginning in 2019.

In second place with 29% growth is the Automotive—Special-Purpose Logic market, which is being lifted by the growing number of onboard electronic systems now found on new cars. Backup cameras, blind-spot (lane-departure) detectors, and other “intelligent” systems are mandated or are being added across all new vehicles—entry level to luxury—and are expected to contribute to the semiconductor content per new car growing to more than $540 per vehicle in 2018.

Wireless Comm—Application-Specific Analog is forecast to grow 23% in 2018, as the world becomes increasingly dependent on the Internet and demand for wireless connectivity continues to rise. Similarly, demand for medical/health electronics systems connectivity using the Internet will help the market for Industrial/Other Application-Specific Analog outpace total IC market growth in 2018.

Among the seven categories showing better than total IC market growth this year, three are forecast to be among the largest of all IC product categories in terms of dollar volume. DRAM (#1 with $101.6 billion in sales), NAND Flash (#2 with $62.6 billion), Computer and Peripherals—Special Purpose Logic (#4 with $27.6 billion) prove that big markets can still achieve exceptional percentage growth.

Figure 1