Category Archives: Device Architecture

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $117.9 billion during the second quarter of 2018, an increase of 6.0 percent over the previous quarter and 20.5 percent more than the second quarter of 2017. Global sales for the month of June 2018 reached $39.3 billion, an uptick of 1.5 percent over last month’s total of $38.7 billion, and a surge of 20.5 percent compared to the June 2017 total of $32.6 billion. Cumulatively, year-to-date sales during the first half of 2018 were 20.4 percent higher than they were at the same point in 2017. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Halfway through 2018, the global semiconductor industry continues to post impressive sales totals, notching its highest-ever quarterly sales in Q2 and record monthly sales in June,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Global sales have increased year-to-year by more than 20 percent for 15 consecutive months, and sales of every major product category increased year-to-year in June. Sales into the Americas market continue to be strong, with year-to-date totals more than 30 percent higher than at the same point last year.”

Regionally, sales increased compared to June 2017 in China (30.7 percent), the Americas (26.7 percent), Europe (15.9 percent), Japan (14.0 percent), and Asia Pacific/All Other (8.6 percent). Sales also were up compared to last month in China (3.2 percent), Japan (1.3 percent), the Americas (1.2 percent), and Asia Pacific/All Other (0.5 percent), but down slightly in Europe (-0.8 percent).

For comprehensive monthly semiconductor sales data and detailed WSTS Forecasts, consider purchasing the WSTS Subscription Package. For detailed data on the global and U.S. semiconductor industry and market, consider purchasing the 2018 SIA Databook.

United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (“UMC”), a global semiconductor foundry, and Avalanche Technology, Inc., the next generation STT-MRAM (Spin Transfer Torque Magnetic RAM) leader, today announced that they have entered a partnership for joint development and production of MRAM to replace embedded flash. UMC will also make this technology available to other companies through licensing with Avalanche Technology Inc.

Under the terms of the agreement, UMC will provide embedded non-volatile MRAM blocks based on UMC’s 28nm CMOS manufacturing process. This will enable customers to integrate low latency, very high performance and low power embedded MRAM memory blocks into MCUs and SoCs, targeting the Internet of Things, wearable, consumer, industrial and automotive electronics markets.

The two companies are also considering to expand the cooperation beyond 28nm, as Avalanche Technology’s CMOS compatibility and scalability to advanced process nodes enables integration of unified memory (non-volatile as well as SRAM) blocks into next generation highly integrated MCUs and SoCs. This allows system designers to maintain the same architecture and software ecosystem without a redesign.

“We’re excited to team with a world leader in semiconductor manufacturing such as UMC to bring this outstanding technology to market,” said Petro Estakhri, CEO and co-founder of Avalanche Technology.

“UMC is continuously introducing enhanced process offerings to bring added competitive benefits to our customers,” said G C Hung, vice president of Advanced Technology Development at UMC. “With embedded NVM becoming more prevalent in today’s IC designs, we have developed a strong portfolio of robust eNVM process solutions for high growth sectors such as emerging consumer and automotive applications. We are happy to cooperate with Avalanche Technology for 28nm MRAM, and we look forward to ramping this process to production for UMC customers.”

Samsung Electronics Co., Ltd. today announced that it has begun mass producing the industry’s first 4-bit (QLC, quad-level cell) 4-terabyte (TB) SATA solid-state drive (SSD) for consumers.

Based on 1-terabit (Tb)* V-NAND with outstanding performance equivalent to the company’s 3-bit design, Samsung’s QLC SSD is expected to bring a new level of efficiency to consumer SSDs.

“Samsung’s new 4-bit SATA SSD will herald a massive move to terabyte-SSDs for consumers,” said Jaesoo Han, executive vice president of memory sales & marketing at Samsung Electronics. “As we expand our lineup across consumer segments and to the enterprise, 4-bit terabyte-SSD products will rapidly spread throughout the entire market.”

With its new 1Tb 4-bit V-NAND chip, Samsung will be able to efficiently produce a 128GB memory card for smartphones that will lead the charge toward higher capacities for high-performance memory storage.

Typically, as data stored within a memory cell increases from three bits to four, the chip capacity per unit area would rise and the electrical charge (used to determine information from a sensor) would decrease by as much as 50 percent, making it considerably more difficult to maintain a device’s desired performance and speed.

However, Samsung’s 4-bit 4TB QLC SATA SSD maintains its performance levels at the same level as a 3-bit SSD, by using a 3-bit SSD controller and TurboWrite technology, while increasing drive capacity through the use of 32 chips, all based on 64-layer fourth-generation 1Tb V-NAND.

The 4-bit QLC SSD enables a sequential read speed of 540 MB/s and a sequential write speed of 520 MB/s, and comes with a three-year warranty.

Samsung plans to introduce several 4-bit consumer SSDs later this year with 1TB, 2TB, and 4TB capacities in the widely used 2.5-inch form factor.

Since introducing the 32-gigabyte (GB) 1-bit SSD in 2006, which ushered in the PC SSD era, to today’s 4TB 4-bit SSD, Samsung continues to drive new thresholds for each multi-bit generation.**

In addition, the company expects to provide M.2 NVMe SSDs for the enterprise this year and begin mass production of 4-bit fifth-generation V-NAND. This will considerably expand its SSD lineup to meet the growing demand for faster, more reliable performance across a wide span of applications, such as next generation data centers, enterprise servers, and enterprise storage.

* 1Tb (128GB) x 32 = 4TB (4,096GB)

** Samsung’s mass production history of SSDs in bits per cell

Year Bit Nodes Chip Capacity Drive Capacity
2006 1-bit SLC (single-level cell) 70nm-class 4Gb 32GB
2010 2-bit MLC (multi-level cell) 30nm-class 32Gb 512GB
2012 3-bit TLC (triple-level cell) 20nm-class 64Gb

500GB
2018 4-bit QLC (quad-level cell) 4th-gen V-NAND 1Tb 4 TB

A UCF physicist has discovered a new material that has the potential to become a building block in the new era of quantum materials, those that are composed of microscopically condensed matter and expected to change our development of technology.

Researchers are entering the Quantum Age, and instead of using silicon to advance technology they are finding new quantum materials, conductors that have the ability to use and store energy at the subatomic level.

Assistant Professor Madhab Neupane has spent his career learning about the quantum realm and looking for these new materials, which are expected to become the foundation of the technology to develop quantum computers and long-lasting memory devices. These new devices will increase computing power for big data and greatly reduce the amount of energy required to power electronics.

Madhab Neupane and his research team with the in-house ARPES system. From left to right: Gyanendra Dhakal (Graduate student), Klauss Dimitri (Undergraduate student), Md Mofazzel Hosen (Graduate student), Madhab Neupane, Christopher Sims (Graduate student), Firoza Kabir (Graduate student) Credit: University of Central Florida

Big companies recognize the potential and they are investing in research. Microsoft has invested in its Station Q, a lab dedicated solely to studying the field of topological quantum computing. Google has teamed up with NASA on a Quantum AI Lab that studies how quantum computing and artificial intelligence can mesh. Once the quantum phenomena are well understood and can be engineered, the new technologies are expected to change the world, much like electronics did at the end of the 20th century.

Neupane’s discovery, published today in Nature Communications is a big step in making that reality happen.

“Our discovery takes us one step closer to the application of quantum materials and helps us gain a deeper understanding of the interactions between various quantum phases,” Neupane said.

The material Neupane and his team discovered, Hf2Te2P – chemically composed of hafnium, tellurium and phosphorus — is the first material that has multiple quantum properties, meaning there is more than one electron pattern that develops within the electronic structure, giving it a range of quantum properties.

Neupane’s research group is using its specialized equipment for advanced-spectroscopic characterization of quantum materials to develop their work further.

“With the discovery of such an incredible material, we are at the brink of having a deeper understanding of the interplay of topological phases and developing the foundation for a new model from which all technology will be based off, essentially the silicon of a new era,” Neupane said.

By Iris Tsou

The march to greater precision, efficiency and safety – the lifeblood of high-technology manufacturing facilities – has taken on a new urgency as emerging applications such artificial intelligence (AI), the Internet of Things (IoT) and Industry 4.0 give new meaning to smart factories. Facing fiercer competition and ever more sophisticated fabrication processes, semiconductor fabs are under intense pressure to keep pace with new technologies as they work to upgrade. Nowhere are the stakes higher than in Taiwan, where high-tech manufacturing contributes mightily to the region’s GDP growth.

To help Taiwan fabs confront the challenges and opportunities of designing smarter factories, SEMI and its High-Tech Facility Committee hosted the High-Tech Facility Workshop in June. SEMICON Taiwan 2018 High-Tech Facility Pavilion exhibitors gathered to explore how they can build smarter factories by deploying smart surveillance and disaster prevention technologies along with smart communications systems that better use manufacturing data to drive new safety and product quality efficiencies.

During the workshop, SEMI High-Tech Facility Committee representatives shared strides it has made upgrading overseas facilities and developing standards to help establish smart factories in Taiwan.

SEMICON Taiwan – 5-7 September at Taipei’s Nangang Exhibition Center – is also an important event for advancing smart manufacturing in Taiwan. Nearly 30 leading global manufacturers will exhibit at the SEMICON Taiwan High-Tech Facility Pavilion. The venue covers operational aspects of semiconductor manufacturing vital to becoming smarter including energy savings, nano-contamination control, facility information modeling, precision instrumentation and control, fire protection, mechatronics, and automation control. The pavilion will also feature a series of theme events offering a comprehensive overview of topics including the latest practices for integrating smart facility capabilities from the perspective of an advanced fab designer.

At the TechXPOT stage, High-Tech Facility Pavilion exhibitors will also demonstrate the latest technology breakthroughs and cutting-edge smart factor solutions.

The September 6th High-Tech Facility International Forum at SEMICON Taiwan will again gather factory experts and thought leaders from industry and academia to examine “Effective Ways to Make a Facility Smart.“ Experts from industry heavyweights in the fields of wafer foundry, LCD, memory and semiconductor packaging including TSMC, UMC, Innolux, ASE, Micron Taiwan, Winbond and VIS will offer insights into key areas of high-tech facilities including facility electricity, machinery, water management, vaporization and automation systems. On the same day as the forum, the High-Tech Facility Get-Together and High-Tech Facility VIP Dinner will bring together industry elites, academic professionals, and government officials to explore partnership opportunities.

SEMI Taiwan and the High-Tech Facility Committee share HTF market trends information, technology updates and standards with SEMI members and exhibitors.

Founded in 2013, the High-Tech Facility Committee now has 85 corporate members. Dedicated to accelerating industry collaboration through the integration of Taiwan industrial, government and academic resources, the committee each year holds several group meetings focusing on topics including energy savings, earthquake and fire protection, nano-contamination control, and precision instrumentation and control to advance critical technologies and facilitate standardization. The committee also aims to help the industry become more competitive faster by promoting technology standards that boost productivity and reduce production costs.

Please visit www.semi.org and www.semicontaiwan.org for more information about SEMI’s high-tech facility initiatives.

Iris Tsou is a marketing specialist at SEMI Taiwan. 

Originally published on the SEMI blog.

By Ajit Manocha

At a Glance

“Software is eating the world … and AI is eating software.” Amir Husain, author of The Sentient Machine, at SEMICON West 2018

We’re living in a digital world where semiconductors have been taken for granted. But, Artificial Intelligence (AI) is changing everything – and bringing semiconductors back into the deserved spotlight. AI’s potential market of hundreds of zettabytes and trillions of dollars relies on new semiconductor architectures and compute platforms. Making these AI semiconductor engines will require a wildly innovative range of new materials, equipment, and design methodologies.

Moore’s Law carried us the past 50-plus years and as we’re now stepping into the dawn of AI’s potential, we can see that the coming Cognitive Era will drive its own exponential growth curve. This is great for the world – virtually every industry will be transformed, and people’s lives will get better – and it’s fantastic for our industry. This truly is the very best time to be working in our industry. I’m excited to be at SEMI in this inflection period and at the center of the collaborative platforms that bring the electronics manufacturing supply chain together to Connect, Collaborate, and Innovate to realize the new Cognitive Era. I invite you to partner with SEMI in building the foundation for the Cognitive Era to increase the growth and prosperity of our industry.

The World Wakes Up

Our lives have become digital. An Amazon Echo wakes us up and answers questions about the weather and traffic. Google Maps tells us the best way to get to a meeting. Yelp finds the best nearby restaurant. A Tweet now even informs us of the latest change in government policy. It’s a digital world that we live in – and the world already takes it for granted.

We in the industry know that the digital world only works because of the semiconductors we make and because of our integrated electronics manufacturing supply chain. We make the materials and equipment that, in turn, make the chips that become the beating hearts of the digital economy.

But, semiconductors have been largely invisible – hidden away under and inside a smart speaker, locked deep within a phone, buried in data centers and out of view. Meanwhile, the internet companies like Google, Amazon, Alibaba, Tencent, and Facebook stole the meaning of “Tech” and were given most of the credit for our digital world.

But, finally, things are changing – it’s all coming back to semiconductors!

AI Changing Everything

Over $400B in semiconductors were sold in 2017 – those unseen chips like hearts beating away in Apple computers, in mobile phones for online shopping and social media, and in televisions showing Netflix. Now internet companies Alphabet, Alibaba, Amazon, Facebook, Microsoft and others are rushing to develop their own chips. Silicon is back in the Silicon Valley! Hardware is, once again, the place to be. Why? We are now entering the epoch of Artificial Intelligence (AI) – and semiconductors, and new compute architectures, are the key to AI. At this moment, hardware, not software, is the AI enabler to make leaps in performance and to usher in new architectures to become brain-like with neural networks.

Beyond major AI chip investments like Google’s (Alphabet) $300M+ program to develop its Tensor Processing Unit (TPU) chip, there’s been a surge in new chip startups and VC funding. Last year, VCs (with corporate investors) invested more than $1.5B in new AI chip startups – doubling the rate from the prior year.

After years of consolidation, there is, as some have described, a “Cambrian Explosion” of semiconductor startups with names like Cerebras, Graphcore, Wave Computing, Horizon Robotics, Cambricon Technologies, and DeePhi from the US, Europe, and China. Cambricon (China) has already become the first AI chip “Unicorn” (startup valued $1B+) with a valuation of more than $2.5B after their recent Round B financing. It’s a new silicon world and a new race, as Cade Metz (The New York Times, 1/14/2018) said, “… everyone is starting from the same place: the beginning of a new market.”

Winning at AI is very big business. John Kelly, SVP Cognitive Solutions and Research at IBM, in his SEMICON West keynote earlier this month, said, we’re in the era of Artificial Intelligence with more than a $2T opportunity for AI decision making support on top of the $1.5T IT business in 2025. McKinsey estimates deep learning could account for between $3.5T and $5.8T in annual value.

As John Kelly presented, AI will transform entire industries – not just our personal devices and lives. The $2T AI decision making support opportunity in 2025 is projected to transform the major economy industries as follows:

Moore’s Law describes the exponential increase in the number of transistors per area that has driven growth, and has been the engine for digital innovation, through first the computer era and then the mobility era and now into the dawn of the data era. While the Dennard scaling approach to Moore’s Law may be slowing, the data-centric era continues to drive demand and the industry continues to find new ways to pack more transistors into less volume. Chip sales are forecast to pass $0.5T in 2019 and I predict they will surpass $1T before 2030.

It turns out the Smart is not enough – we must reach “Beyond Smart.”

Beyond Smart – The Cognitive Era

As we move further into the data-centric age, we see it is more than Big Data and AI, it is, instead, the dawn of a wholly new cognitive era. SEMICON West’s 2018 theme was “Beyond Smart” because we are standing at the inflection from sensors triggering actions (smart) to systems that learn and make decisions (cognitive). Devices are moving “beyond smart” to being “cognitive or aware.” Gary Dickerson (CEO of Applied Materials) at SEMICON West said, “… we are in the beginning of the first inning of a major inflection.”

Even in the early dawn of the cognitive era, the volume of data is simply astonishing. In the last 24 months, we create more than 90% of all historic digital data. By 2025 we expect AI to generate 160 zettabytes – with 80% of that unstructured data. Moore’s Law is an exponential, but as John Kelly points out, AI’s deep learning is driving its own exponential with performance/watt increasing 2.5X each year.

AI was the focus of SEMICON West’s Day 1 keynotes – and a common theme through much of the events programming. There was a common language in the keynotes by John Kelly, Gary Dickerson, and William Dally (Chief Scientist and SVP of Research NVIDIA), and others. We heard how AI is based on data, algorithms, and compute. I was inspired by these talks and for the potential for AI and the cognitive era.

Looking ahead, I believe data + algorithms + compute + machine learning = knowledge and cognition. My vision is that this AI knowledge and cognition will be the catalyst to create new modes of systems transformations that will usher in the next Industrial Revolution. As the 4th Industrial Revolution becomes a reality, I look forward to working with others in SEMI Think Tanks to imagine the 5th Industrial Revolution – and its opportunities for our industry. I believe that it will make our lives better, healthier, more prosperous, and more fulfilled.

A sentiment shared by many speakers at SEMICON West was – this is the most exciting time to be in the semiconductor manufacturing industry. Many wished they were just now starting in the industry as this is the most interesting inflection and transformation ever. There is a flood of new architectures, new materials, new equipment, new processes – and a new system-based design approach to enable the Cognitive Era. We, in hardware manufacturing, are in the driver’s seat for this incredible ride.

SEMI is working to help its members speed their time to better business results – and to take full advantage of the Cognitive Era and AI opportunity. At SEMICON West 2018, SEMI provided a broad and deep slate of program education and spotlighted AI expertise across the electronics manufacturing supply. In case you missed it, SEMI also provided

  • Seven keynotes and dozens of expert panelists
  • Semiconductor venture funding program – problems and solutions for the ecosystem
  • SEMI Smart Workforce Pavilion with over 600 students registered to learn about the industry
  • Smart Pavilions including Smart Manufacturing and Smart Automotive

SEMI highlighted the five key vertical application platforms where our industry needs to collaborate across the full supply chain and streamline the supply chain for efficiency. The five are: IoT, Smart Transportation, Smart Manufacturing, Smart MedTech, and Smart Data. These verticals drive huge business potential and are just one of the reasons that SEMICON West has become the gathering place of the extended electronics manufacturing supply chain.

With SEMI, together we can realize the potential of the coming Cognitive Era. SEMI members can advance the industry with SEMI collective action in Workforce Development, Advocacy (public policy and regulatory), Standards to synchronize the industry, and in the many SEMI technology communities and special interest groups – to increase the global industry’s rate of growth and overall level of prosperity. For more information, please visit www.semi.org; to become a member, please visit http://www.semi.org/en/become-member-join-semi.

Ajit Manocha is President and CEO of SEMI

Originally published on the SEMI blog.

Leti, a research institute at CEA Tech, and CMP, a service organization that provides prototyping and low-volume production of ICs and MEMS, today announced the integrated-circuit industry’s first multi-project-wafer (MPW) process for fabricating emerging non-volatile memory OxRAM devices on a 200mm foundry base-wafer platform.

Available on Leti’s 200mm CMOS line, the MPW service provides a comprehensive, very low-cost way to explore techniques designed to achieve miniaturized, high-density components. Including Leti’s Memory Advanced Demonstrator (MAD) future mask set with disruptive OxRAM (oxide-based resistive RAM) technology, Leti’s integrated silicon memory platform is developed for backend memories and non-volatility associated with embedded designs. The new technology platform will be based on HfO2/Ti (titanium-doped hafnium oxide) active layers.

Emerging OxRAM non-volatile memory is one of the promising technologies to be implemented for classical embedded memory applications on advanced nodes like micro-controllers or secure products, as well as for AI accelerators and neuromorphic computing.

Leti’s MAD platform is dedicated to advanced non-volatile memories, bringing both versatility and robustness for material and interface assessment, and allowing in-depth exploration of memory performance from technology and design perspectives.

The full platform’s highlights:

  • 200mm STMicroelectronics HCMOS9A base wafers in 130nm node
  • All routing is made on ST base wafers from M1 to M4 (included)
  • Leti’s OxRAM memory module is fabricated on top
  • One level of interconnect (i.e. M5) plus pads are fabricated in Leti’s cleanroom.

“Leti has developed during the past 20 years deep expertise in non-volatile memory (NVM) devices covering flash evolutive solutions and disruptive technologies,” said Etienne Nowak, head of the Leti’s Advanced Memory Lab. “This MPW capability, combined with our Memory Advanced Demonstrator platform, is based on a broad tool box that enables customized research with our partners, and provides a benchmark between different NVM solutions.”

The MPW service with integrated silicon OxRAM addresses all the key steps of advanced memory development. These include material engineering and analysis, developing critical memory modules, evaluation of memory cells coupled with electrical tests, modeling and innovative design techniques to comply with circuit design opportunities and constraints. This technology offer comes with a design kit, including layout, verification and simulation capabilities. Libraries are provided with a comprehensive list of active and passive electro-optical components. The design kit environment is compatible with all offers through CMP.

Providing access to a non-volatile memory process from Leti is a major achievement in development work at CMP. Since 2003, the organization has participated in national and European projects for developing access to NVM technologies (Mag-SPICE, Calomag, Cilomag, Spin, and Dipmem). With this new offer in place, the CMP users’ community can have the benefits and advantages of using this process through this close collaboration between CMP and Leti.

“CMP has a long experience providing smaller organizations with access to advanced manufacturing technologies, and there is very strong interest in the CMP community in designing and prototyping ICs using this process,” said Jean-Christophe Crébier, director of CMP. “It is an opportunity for many universities, start-ups and SMEs in France, Europe,North America and Asia to take advantage of this new technology and MPW service.”

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced Dr. John L. Hennessy, chairman of Alphabet Inc., former president of Stanford University, and pioneer in electrical engineering, has been named the 2018 recipient of SIA’s highest honor, the Robert N. Noyce Award. SIA presents the Noyce Award annually in recognition of a leader who has made outstanding contributions to the semiconductor industry in technology or public policy. Hennessy will accept the award at the SIA Annual Award Dinner on Thursday, Nov. 29, 2018 in San Jose.

“Throughout his outstanding and influential career spanning more than four decades, John Hennessy has helped move the semiconductor industry forward, leading efforts to advance semiconductor technology and train future generations of electrical engineers,” said John Neuffer, president and CEO, Semiconductor Industry Association. “John literally wrote the book on computer architecture design and has spearheaded semiconductor research that has helped make our industry what it is today. On behalf of the SIA board of directors, it is an honor to announce John’s selection as the 2018 Robert N. Noyce Award recipient in recognition of his exceptional accomplishments.”

Hennessy joined Stanford University’s faculty in 1977 as an assistant professor of electrical engineering and rose through the academic ranks to become Stanford’s 10th president, serving in that role from 2000 until his retirement in 2016. In February 2018, Dr. Hennessy was appointed chairman of Alphabet Inc., parent company of Google.

In 1981, Hennessy drew together researchers to focus on a computer architecture known as RISC (Reduced Instruction Set Computer), a technology that has revolutionized the computer industry by increasing performance while reducing costs. Dr. Hennessy helped transfer this technology to industry. In 1984, he cofounded MIPS Computer Systems, which designed microprocessors. In more recent years, his research focused on the architecture of high-performance computers.

Hennessy has lectured and published widely and is the co-author of two internationally used

undergraduate and graduate textbooks on computer architecture design. He earned his bachelor’s degree in electrical engineering from Villanova University and his master’s and doctoral degrees in computer science from the State University of New York at Stony Brook.

“It is a true privilege to be selected for this award, joining a distinguished list of pioneers and icons who have previously received it,” said Hennessy. “Throughout my career, I have been fortunate to work with countless outstanding colleagues, mentors, and friends who have been instrumental in my work every step of the way. It is with them in mind that I gratefully accept this award, and I look forward to continuing to work alongside them to advance the forward march of innovation.”

The Noyce Award is named in honor of semiconductor industry pioneer Robert N. Noyce, co-founder of Fairchild Semiconductor and Intel.

Toshiba Memory Corporation today announced that it consummated the merger with K. K. Pangea which is its parent company on August 1, 2018. The company name after the merger is Toshiba Memory Corporation. Today the company also introduces the executive officer system to improve the efficiency of business execution and strengthen the corporate governance. The outline of Toshiba Memory and the list of its directors, executive officers and statutory auditors as of August 1, 2018 are as follows.

1. Outline of Toshiba Memory Corporation
Name Toshiba Memory Corporation
Address 1-1 Shibaura 1-chome, Minato-ku, Tokyo

Name and Title of
Representative

 Naruke Yasuo

Representative Director, President and Chief Executive Officer
Capital

473,400,025,000 yen

Major Shareholders and
Shareholding Ratios

 BCPE Pangea Cayman, L.P. 49.9%

Toshiba Corporation 40.2%

Hoya Corporation 9.9%

*Based on ownership of voting rights
2. List of directors, executive officers and statutory auditors as of August 1, 2018
– Director
Representative Director Yasuo Naruke
Director Yuji Sugimoto
Director David Gross-Loh
Director Masashi Suekane
Director Hiroshi Suzuki
– Executive Officer
President and Chief Executive Officer Yasuo Naruke

Executive Vice President and Executive Officer (Chief
Operating Officer and Vice President of Memory Division)

 Tomoharu Watanabe

Executive Vice President and Executive Officer (Chief
Technology Officer)

 Nobuo Hayasaka
Managing Executive Officer (Chief Financial Officer ) Hideki Hanazawa

Managing Executive Officer (Chief Production Officer and
General Manager, Yokkaichi Operations)

 Tomoharu Matsushita
Managing Executive Officer (Chief Marketing Officer) Naohisa Sano
Managing Executive Officer (Vice President of SSD Division) Masashi Yokotsuka
Executive Officer (Chief Strategy Officer) Shinichi Hashimoto
Executive Officer (Chief Information and Security Officer) Akio Oka
Executive Officer (General Manager, Legal Affairs Division) Takahiro Asakura

Executive Officer (General Manager, Human Resources and
Administration Division)

 Kyota Okishiro
– Statutory Auditor
Statutory Auditor Yurio Ogawa
Statutory Auditor Shunsuke Nakahama
Statutory Auditor Isao Morita

Toshiba Memory Corporation is dedicated to the development, production and sales of flash memory and SSDs. In April 2017, Toshiba Memory was spun off from Toshiba Corporation, the company that invented NAND flash memory in 1987. Toshiba Memory pioneer cutting-edge memory solutions and services that enrich people’s lives and expand society’s horizons.

MIT researchers have designed an optical filter on a chip that can process optical signals from across an extremely wide spectrum of light at once, something never before available to integrated optics systems that process data using light. The technology may offer greater precision and flexibility for designing optical communication and sensor systems, studying photons and other particles through ultrafast techniques, and in other applications.

Optical filters are used to separate one light source into two separate outputs: one reflects unwanted wavelengths — or colors — and the other transmits desired wavelengths. Instruments that require infrared radiation, for instance, will use optical filters to remove any visible light and get cleaner infrared signals.

Existing optical filters, however, have tradeoffs and disadvantages. Discrete (off-chip) “broadband” filters, called dichroic filters, process wide portions of the light spectrum but are large, can be expensive, and require many layers of optical coatings that reflect certain wavelengths. Integrated filters can be produced in large quantities inexpensively, but they typically cover a very narrow band of the spectrum, so many must be combined to efficiently and selectively filter larger portions of the spectrum.

Researchers from MIT’s Research Laboratory of Electronics have designed the first on-chip filter that, essentially, matches the broadband coverage and precision performance of the bulky filters but can be manufactured using traditional silicon-chip fabrication methods.

“This new filter takes an extremely broad range of wavelengths within its bandwidth as input and efficiently separates it into two output signals, regardless of exactly how wide or at what wavelength the input is. That capability didn’t exist before in integrated optics,” says Emir Salih Magden, a former PhD student in MIT’s Department of Electrical Engineering and Computer Science (EECS) and first author on a paper describing the filters published today in Nature Communications.

Paper co-authors along with Magden, who is now an assistant professor of electrical engineering at Koç University in Turkey, are: Nanxi Li, a Harvard University graduate student; and, from MIT, graduate student Manan Raval; former graduate student Christopher V. Poulton; former postdoc Alfonso Ruocco; postdoc associate Neetesh Singh; former research scientist Diedrik Vermeulen; Erich Ippen, the Elihu Thomson Professor in EECS and the Department of Physics; Leslie Kolodziejski, a professor in EECS; and Michael Watts, an associate professor in EECS.

Dictating the flow of light

The MIT researchers designed a novel chip architecture that mimics dichroic filters in many ways. They created two sections of precisely sized and aligned (down to the nanometer) silicon waveguides that coax different wavelengths into different outputs.

Waveguides have rectangular cross-sections typically made of a “core” of high-index material — meaning light travels slowly through it — surrounded by a lower-index material. When light encounters the higher- and lower-index materials, it tends to bounce toward the higher-index material. Thus, in the waveguide light becomes trapped in, and travels along, the core.

The MIT researchers use waveguides to precisely guide the light input to the corresponding signal outputs. One section of the researchers’ filter contains an array of three waveguides, while the other section contains one waveguide that’s slightly wider than any of the three individual ones.

In a device using the same material for all waveguides, light tends to travel along the widest waveguide. By tweaking the widths in the array of three waveguides and gaps between them, the researchers make them appear as a single wider waveguide, but only to light with longer wavelengths. Wavelengths are measured in nanometers, and adjusting these waveguide metrics creates a “cutoff,” meaning the precise nanometer of wavelength above which light will “see” the array of three waveguides as a single one.

In the paper, for instance, the researchers created a single waveguide measuring 318 nanometers, and three separate waveguides measuring 250 nanometers each with gaps of 100 nanometers in between. This corresponded to a cutoff of around 1,540 nanometers, which is in the infrared region. When a light beam entered the filter, wavelengths measuring less than 1,540 nanometers could detect one wide waveguide on one side and three narrower waveguides on the other. Those wavelengths move along the wider waveguide. Wavelengths longer than 1,540 nanometers, however, can’t detect spaces between three separate waveguides. Instead, they detect a massive waveguide wider than the single waveguide, so move toward the three waveguides.

“That these long wavelengths are unable to distinguish these gaps, and see them as a single waveguide, is half of the puzzle. The other half is designing efficient transitions for routing light through these waveguides toward the outputs,” Magden says.

The design also allows for a very sharp roll-off, measured by how precisely a filter splits an input near the cutoff. If the roll-off is gradual, some desired transmission signal goes into the undesired output. Sharper roll-off produces a cleaner signal filtered with minimal loss. In measurements, the researchers found their filters offer about 10 to 70 times sharper roll-offs than other broadband filters.

As a final component, the researchers provided guidelines for exact widths and gaps of the waveguides needed to achieve different cutoffs for different wavelengths. In that way, the filters are highly customizable to work at any wavelength range. “Once you choose what materials to use, you can determine the necessary waveguide dimensions and design a similar filter for your own platform,” Magden says.

Sharper tools

Many of these broadband filters can be implemented within one system to flexibly process signals from across the entire optical spectrum, including splitting and combing signals from multiple inputs into multiple outputs.

This could pave the way for sharper “optical combs,” a relatively new invention consisting of uniformly spaced femtosecond (one quadrillionth of a second) pulses of light from across the visible light spectrum — with some spanning ultraviolet and infrared zones — resulting in thousands of individual lines of radio-frequency signals that resemble “teeth” of a comb. Broadband optical filters are critical in combining different parts of the comb, which reduces unwanted signal noise and produces very fine comb teeth at exact wavelengths.

Because the speed of light is known and constant, the teeth of the comb can be used like a ruler to measure light emitted or reflected by objects for various purposes. A promising new application for the combs is powering “optical clocks” for GPS satellites that could potentially pinpoint a cellphone user’s location down to the centimeter or even help better detect gravitational waves. GPS works by tracking the time it takes a signal to travel from a satellite to the user’s phone. Other applications include high-precision spectroscopy, enabled by stable optical combs combining different portions of the optical spectrum into one beam, to study the optical signatures of atoms, ions, and other particles.

In these applications and others, it’s helpful to have filters that cover broad, and vastly different, portions of the optical spectrum on one device.

“Once we have really precise clocks with sharp optical and radio-frequency signals, you can get more accurate positioning and navigation, better receptor quality, and, with spectroscopy, get access to phenomena you couldn’t measure before,” Magden says.