Category Archives: Device Architecture

By Jamie Girard, Sr. Director, Public Policy, SEMI

Just as the annual Cherry Blossom festival wraps up, international trade has flowered as a top concern for SEMI members, requiring immediate action as 20 SEMI member executives carried the torch for the industry in recent meetings with lawmakers at the annual SEMI Washington Forum. The business leaders quickly zeroed in on the proposed Sec. 301 tariffs of 25 percent on China imports to the U.S. and their potential to drive sharp increases in the cost of doing business.

In the meetings at the two-day event in Washington, D.C., the executives expressed deep concern that the tariffs, aimed at protecting the interests of U.S. companies, would instead harm the intended beneficiaries including SEMI members around the globe. The executives also focused on the proposed 232 tariffs on steel and aluminum that would compound the damage to their businesses, spiking costs of materials that lie at the heart of their manufacturing operations.

Also crucial to their business interests, the SEMI members educated lawmakers on the talent shortage and the intense competition to fill open positions across the supply chain. With fully 77 percent of industry executives seeing talent shortfalls as a pressing business issue, the business leaders pushed for legislation that would bring more domestic talent into the STEM education pipeline – such as S. 1518, The CHANCE in Tech Act to support more apprenticeships in technology, and H.R. 4023, the Developing Tomorrow’s Engineering and Technical Workforce Act to get more students involved in engineering. The group also encouraged support of the “Immigration Innovation” or “I-Squared” bill to strengthen and expand the H1-B visa program and STEM Greencards.

The SEMI Washington Forum, a venue for SEMI members to educate lawmakers about the industry, also addressed concerns over restrictions on foreign investment in the U.S. Passage of S. 2098, the Foreign Investment Risk Review Modernization Act (FIRRMA), would usher in new operating efficiencies for the Committee for Foreign Investment in the United States (CFIUS) by adding much-needed resources to the overburdened body. However, the bill would also subject many ordinary business transactions to a lengthy and costly national security review that would hamper the ability of many companies to do business in the global marketplace.

All told, attendees at the forum held more than 30 meetings with lawmakers, reflecting the great impact of public policy on SEMI members companies. In a time when the stakes for the industry have risen to new levels, direct engagement with lawmakers in the nation’s capital by SEMI and its members is critical. The SEMI Washington Forum is a terrific way for members to more clearly understand the impact of key pieces of legislation and gain firsthand experience in influencing policy and helping lawmakers better understand the industry. If you are interested in learning more about the SEMI Washington Forum or SEMI’s public policy program, please contact Jamie Girard by email at [email protected].

Cyient Limited (“Cyient”), a global provider of engineering, manufacturing, geospatial, networks, and operations management services, today announced that its step down subsidiary Cyient Europe Ltd. has acquired AnSem N.V., a fabless, custom analog and mixed-signal application-specific integrated circuits (ASICs) design company. AnSem specializes in advanced analog, radio frequency, and mixed-signal integrated circuit design and provides custom ASICs for clients around the world across key industries, including automotive, medical, industrial, smart home, and smart grid, with long-life applications of five to ten years.

Incorporated in 1998 as a spin-off of the university of Leuven and with the support of imec – the research and innovation hub in nanoelectronics and digital technologies, AnSem has a strong team of technical and domain experts and has established itself as a well-known name in the field of analog and mixed-signal ASICs. Headquartered in Leuven, Belgium, AnSem has been certified as an ISO 9001:2015 company with a strong focus on solving complex challenges. Through its proven history of 100% first-time-functional designs, AnSem not only provides significant cost savings, but also time-to-market benefits, making this Cyient’s center of excellence. AnSem has revenue of ~$10 Million and 20%+ operating margin.

“AnSem’s leading-edge, custom mixed-signal analog integrated circuit (IC) capability allows Cyient to offer turnkey ICs, starting from concept circuit to final production. Through this acquisition, Cyient can help its clients develop smart analog sensors to capture data, while leveraging our IoT and analytics solutions to provide actionable insights,” said Suman Narayan, Senior Vice President for Semiconductor, IoT, and Analytics at Cyient.

“We are excited to become a part of the Cyient family and expand our capabilities to a larger customer base,” said AnSem’s CEO and Co-founder, Stefan Gogaert. “Over the years, AnSem has built an impeccable record of custom analog ASIC solutions delivery, a long-term customer base, and an unparalleled capability to develop, validate, and verify complex solutions. Thanks to this acquisition, our ability to deliver the volume of ASICs that our customers need to stay ahead of the competition will become even stronger. It also will enable us to be in the leading position that we were already aiming for.”

“Innovation is an integral part of imec‘s culture, and throughout the years, we have continuously supported regional start-up activities related to microelectronics and nanoelectronics. AnSem is one of the success stories that has grown to become a profitable company in analog, RF and mixed-signal design with an international customer base,” said Ludo Deferm, Executive Vice President at imec and member of the Board of Directors of AnSem. “We are delighted with the acquisition of AnSem by Cyient. This is a confirmation of AnSem’s business value and the strength of the eco-system around imec. We are hopeful that this acquisition is the beginning of a close collaboration between Cyient and imec, as well as with other Flemish companies.”

Cyient expects this transaction to be EPS accretive.

Synopsys, Inc. (Nasdaq: SNPS) today announced certification of the Synopsys Design Platform with TSMC’s latest Design Rule Manual (DRM) for advanced 7-nanometer (nm) FinFET Plus process technology. With several test chips taped out and production designs currently under development by multiple customers, this certification by TSMC enables a wide range of designs from high-performance computing and high-density to low-power mobile applications using the Synopsys Design Platform.

This certification is a milestone for TSMC’s extreme ultraviolet lithography (EUV) process that enables significant area savings while maintaining high performance when compared to non-EUV process nodes.

The Synopsys Design Platform, anchored by Design Compiler Graphical synthesis and IC Compiler™ II place-and-route tools, has been enhanced to take full advantage of TSMC’s 7-nm FinFET Plus for high-performance designs. Design Compiler Graphical is capable of automatically inserting via pillar structures to boost performance and prevent signal electromigration (EM) violations, and can pass the information to IC Compiler II for further optimization. It also automatically applies non-default rules (NDR) during synthesis and performs layer-aware optimization to improve design performance. These optimizations, including IC Compiler II bus routing, continue throughout the place-and-route flow to meet stringent delay-matching requirements of high-speed network.

PrimeTime® timing analysis advanced waveform propagation (AWP) and parametric on-chip variation (POCV) technologies have been optimized to address increased waveform distortion and non-Gaussian variation effects of higher performance and lower voltage operation. In addition, PrimeTime’s physically-aware signoff has been expanded to support via-pillars.

Synopsys has enhanced the Design Platform to perform physical implementation, parasitic extraction, physical verification, and timing analysis to support TSMC’s WoW technology. The physical implementation flow with IC Compiler II provides full support for wafer staking designs, from initial die floorplan preparation to placement and assignment of bumps to implementation of die routing. Verification is done by IC Validator for DRC/LVS checks, and Synopsys’ StarRC tool performs parasitic extraction.

“Ongoing collaboration with Synopsys and early customer engagements on TSMC’s 7-nanometer FinFET Plus process technology are delivering differentiated platform solutions that help our mutual customers bring innovative new products to market faster,” said Suk Lee, senior director of the Design Infrastructure Marketing Division at TSMC. “Certification of the Synopsys Design Platform enables our mutual customers’ designs in our first mass-production, EUV-enabled technology.”

“Our collaboration with TSMC on their mass-production 7-nanometer FinFET Plus process allows companies to confidently begin designing their increasingly large SoC and multi-die chips with the highly-differentiated Synopsys Design Platform,” said Michael Jackson, corporate vice president of marketing and business development for the Design Group at Synopsys. “Certification on TSMC’s 7-nanometer FinFET Plus process enables our customers to benefit from significant power, performance, and area improvements of an advanced EUV process, while accelerating time-to-market for their differentiated products.”

Spin Transfer Technologies, Inc., the developer of advanced STT-MRAM for embedded SRAM and stand-alone DRAM applications, today announced results of its unique Precessional Spin Current (PSC™) structure. The results from advanced testing of the PSC structure confirm that it will increase the spin-torque efficiency of any MRAM device by 40-70 percent — enabling dramatically higher data retention while consuming less power. This gain translates to retention times lengthening by a factor of over 10,000 (e.g., 1 hour retention becomes more than 1 year retention) while reducing write current. Improved efficiency is critical for enabling MRAM to replace SRAM and DRAM in mobile, datacenter and AI applications, as well as for improving retention and performance in high-temperature automotive applications. The company reported these results at the prestigious Intermag 2018 Conference.

Spin-torque efficiency is one of the core performance metrics of the pMTJ (perpendicular magnetic tunnel junction — the “bit” that stores the memory state in an MRAM memory) and is defined by the ratio between the thermal retention barrier, measuring how long data can be reliably stored in the memory, and the switching current necessary to change the value of the bit. In previous MRAM implementations, increasing the energy barrier to increase retention would require a proportional increase in write current — leading to higher power consumption and much faster wear-out of the pMTJ devices (lower endurance). The PSC structure is a breakthrough because it effectively decouples the static energy barrier that determines retention from the dynamic switching processes that govern the switching current. As a result, when the PSC structure is added to any pMTJ, benefits include:

  • A higher energy barrier when the pMTJ does not have current flowing through it, which is ideal for retaining data for long periods
  • An increased spin polarization when current is flowing and the device is writing a new state, which is ideal for minimizing switching current and extending the life of the device by many orders of magnitude

The PSC structure was designed from the outset to be modular and fabricated with any pMTJ — either the company’s own pMTJs, or a pMTJ from other sources. The PSC structure is fabricated during the pMTJ deposition process and adds approximately 4nm to the height of the pMTJ stack. The structure is compatible with a wide range of standard MRAM manufacturing processes, materials and tool sets — enabling any foundry to readily incorporate the PSC structure into existing pMTJ stacks without adding significant complexity or manufacturing costs.

“MRAM is attracting a lot of attention as an embedded memory for ASICs and MCUs, but issues of write current and data retention have caused concern,” said Jim Handy, general director of Objective Analysis. “Spin Transfer Technologies’ new PSC structure shows a lot of promise to solve a number of those issues and pave the path for MRAM to take a significant share of the embedded memory market.”

Spin Transfer Technologies’ testing of the PSC structure involved comparing the performance of the same pMTJ devices with and without PSC for a large number of devices within CMOS test chip arrays at various temperatures and device diameters. The tests exhibited a robust performance advantage due to the PSC structure, both during writing of the low-resistance (“0”) and the high-resistance (“1”) memory states. Some specific examples of the advantages that the data have shown are as follows:

  • Increase of the spin-torque efficiency by up to 70 percent
  • Demonstration of the efficiency gain across a range of sizes (40-60nm) and temperatures (30°C to 125°C)
  • Increase of the thermal energy barriers by 50 percent corresponding to an increase in data retention time of greater than four orders of magnitude while reducing the switching current
  • Reduction of read disturb error rate up to five orders of magnitude

These advantages have come without degradation to other performance parameters. The data for the PSC structure indicate significant potential for enabling high-speed applications as well as high-temperature automotive and other applications. Furthermore, since the data shows that the PSC structure’s efficiency gains actually increase as the pMTJ get smaller, the PSC structure opens new pathways to achieving embedded SRAMs in the latest 7nm and 5nm generations.

“There is a huge demand for a memory with the endurance of SRAM, but with higher density, lower operating power and with non-volatility. We believe the improvements the PSC structure brings to STT-MRAM technology will make it a highly attractive alternative to SRAM for these reasons,” said Mustafa Pinarbasi, CTO and SVP of Magnetics Technology at Spin Transfer Technologies. “We are excited to enable the next generation of STT-MRAM and to shake up the status quo of the memory industry through our innovation.”

Intel today announced that Jim Keller will join Intel as a senior vice president. He will lead the company’s silicon engineering, which encompasses system-on-chip (SoC) development and integration.

“Jim is one of the most respected microarchitecture design visionaries in the industry, and the latest example of top technical talent to join Intel,” said Dr. Murthy Renduchintala, Intel’s chief engineering officer and group president of the Technology, Systems Architecture & Client Group (TSCG). “We have embarked on exciting initiatives to fundamentally change the way we build the silicon as we enter the world of heterogeneous process and architectures. Jim joining us will help accelerate this transformation.”

Keller brings to Intel more than 20 years of experience in x86 and ARM-based microarchitecture design across a broad range of platforms, including PCs, servers, mobile devices and cars.

“I had a great experience working at Tesla, learned a lot, and look forward to all the great technology coming from Tesla in the future. My lifelong passion has been developing the world’s best silicon products,” Keller said. “The world will be a very different place in the next decade as a result of where computing is headed. I am excited to join the Intel team to build the future of CPUs, GPUs, accelerators and other products for the data-centric computing era.”

Keller, 59, joins Intel from Tesla, where he most recently served as vice president of Autopilot and Low Voltage Hardware. Prior to Tesla, he served as corporate vice president and chief cores architect at AMD, where he led the development of the Zen* architecture. Previously, Keller was vice president of Engineering and chief architect at P.A. Semi, which was acquired by Apple Inc. in 2008. He led Apple’s custom low-power mobile chip efforts with the original A4 processor that powered the iPhone 4*, as well as the subsequent A5 processor.

He will officially start in his new role at Intel on April 30.

Samsung Electronics Co., Ltd. today announced that it has begun mass producing 10-nanometer (nm)-class* 16-gigabit (Gb) LPDDR4X DRAM for automobiles. The latest LPDDR4X features high performance and energy efficiency while significantly raising the thermal endurance level for automotive applications that often need to operate in extreme environments. The 10nm-class DRAM will also enable the industry’s fastest automotive DRAM-based LPDDR4X interface with the highest density.

“The 16Gb LPDDR4X DRAM is our most advanced automotive solution yet, offering global automakers outstanding reliability, endurance, speed, capacity and energy efficiency,” said Sewon Chun, senior vice president of memory marketing at Samsung Electronics. “Samsung will continue to closely collaborate with manufacturers developing diverse automotive systems, in delivering premium memory solutions anywhere.”

Moving a step beyond its 20nm-class ‘Automotive Grade 2’ DRAM, which can withstand temperatures from -40°C to 105°C, Samsung’s 16Gb LPDDR4X is Automotive Grade 1-compliant, raising the high-end threshold to 125°C. By more than satisfying the rigorous on-system thermal cycling tests of global auto manufacturers, the 16Gb LPDDR4X has enhanced its reliability for a wide variety of automotive applications in many of the world’s most challenging environments.

Adding to the degree of reliability under high temperatures, production at an advanced 10nm-class node is key to enabling the 16Gb LPDDR4X to deliver its leading-edge performance and power efficiency. Even in environments with extremely high temperatures of up to 125°C, its data processing speed comes in at 4,266 megabits per second (Mbps), a 14 percent increase from the 8Gb LPDDR4 DRAM that is based on 20nm process technology, and the new memory also registers a 30 percent increase in power efficiency.

Along with a 256 gigabyte (GB) embedded Universal Flash Storage (eUFS) drive announced in February, Samsung has expanded its advanced memory solution lineup for future automotive applications with the 10nm-class 16Gb LPDDR4X DRAM, commercially available in 12Gb, 16Gb, 24Gb and 32Gb capacities. While extending its 10nm-class DRAM offerings, the company also plans on bolstering technology partnerships for automotive solutions that include vision ADAS (Advanced Driver Assistance Systems), autonomous driving, infotainment systems and gateways.

Research included in the recently released 50-page April Update to the 2018 edition of IC Insights’ McClean Report shows that in 2017, the top eight major foundry leaders (i.e., sales of ≥$1.0 billion) held 88% of the $62.3 billion worldwide foundry market (Figure 1).  The 2017 share was the same level as in 2016 and one point higher than the share the top eight foundries represented in 2015.  With the barriers to entry (e.g., fab costs, access to leading edge technology, etc.) into the foundry business being so high and rising, IC Insights expects this “major” marketshare figure to remain at or near this elevated level in the future.

TSMC, by far, was the leader with $32.2 billion in sales last year.  In fact, TSMC’s 2017 sales were over 5x that of second-ranked GlobalFoundries and more than 10x the sales of the fifth-ranked foundry SMIC.

Figure 1

Figure 1

China-based Huahong Group, which includes Huahong Grace and Shanghai Huali, displayed the highest growth rate of the major foundries last year with an 18% jump.  Overall, 2017 was a good year for many of the major foundries with four of the eight registering double-digit sales increases.

Of the eight major foundries, six of them are headquartered in the Asia-Pacific region. As shown, Samsung was the only IDM foundry in the ranking.  IBM, a former major IDM foundry, was acquired by GlobalFoundries in mid-2015 while IDM foundries Fujitsu and Intel fell short of the $1.0 billion sales threshold last year. Although growing only 4% last year, Samsung easily remained the largest IDM foundry in 2017, with over 5x the foundry sales of Fujitsu, the second-largest IDM foundry.

North America-based manufacturers of semiconductor equipment posted $2.42 billion in billings worldwide in March 2018 (three-month average basis), according to the March Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI. The billings figure is 0.4 percent higher than the final February 2018 level of $2.41 billion, and is 16.7 percent higher than the March 2017 billings level of $2.08 billion.

“March 2018 monthly billings for North American equipment manufacturers remain at robust levels,” said Ajit Manocha, president and CEO of SEMI. “We are seeing sustained strength in the global semiconductor equipment market, aligning with our expectation for a fourth consecutive year of spending growth.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg)
Year-Over-Year
October 2017
$2,019.3
23.9%
November 2017
$2,052.3
27.2%
December 2017
$2,398.4
28.3%
January 2018
$2,370.1
27.5%
February 2018 (final)
$2,417.8
22.5%
March 2018 (prelim)
$2,426.9
16.7%

Source: SEMI (www.semi.org), April 2018
SEMI publishes a monthly North American Billings report and issues the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ).

Driven by strong growth in the memory market, worldwide semiconductor revenue totaled $420.4 billion in 2017, a 21.6 percent increase from 2016 revenue of $345.9 billion, according to final results by Gartner, Inc.

“2017 saw two semiconductor industry milestones — revenue surpassed $400 billion, and Intel, the No. 1 vendor for the last 25 years, was pushed into second place by Samsung Electronics,” said George Brocklehurst, research director at Gartner. “Both milestones happened due to rapid growth in the memory market as undersupply drove pricing for DRAM and NAND flash higher.”

The memory market surged nearly $50 billion to reach $130 billion in 2017, a 61.8 percent increase from 2016. Samsung’s memory revenue alone increased nearly $20 billion in 2017, moving the company into the top spot in 2017 (see Table 1). However, Gartner predicts that the company’s lead will be short-lived and will disappear when the memory market goes into its bust cycle, most likely in late 2019.

Table 1. Top 10 Semiconductor Vendors by Revenue, Worldwide, 2017 (Millions of U.S. Dollars)

2017 Rank

2016 Rank

Vendor

2017 Revenue

2017 Market

Share (%)

2016 Revenue

2016-2017 Growth (%)

1

2

 Samsung Electronics

59,875

14.2

40,104

49.3

2

1

 Intel

58,725

14.0

54,091

8.6

3

4

 SK hynix

26,370

6.3

14,681

79.6

4

5

 Micron Technology

22,895

5.4

13,381

71.1

5

3

 Qualcomm

16,099

3.8

15,415

4.4

6

6

 Broadcom

15,405

3.7

13,223

16.4

7

7

 Texas Instruments

13,506

3.2

11,899

13.5

8

8

 Toshiba

12,408

3.0

9,918

25.1

9

17

 Western Digital

9,159

2.2

4,170

119.6

10

9

 NXP

8,750

2.1

9,314

-6.1
Others

177,201

42.2

159,655

11.0
Total Market

420,393

100.0

345,851

21.6

Source: Gartner (April 2018) 

The booming memory segment overshadowed strong growth in other categories in 2017. Nonmemory semiconductors grew $24.8 billion to reach $290 billion, representing a growth rate of 9.3 percent. Many of the broadline suppliers in the top 25 semiconductor vendors, including Texas Instruments, STMicroelectronics and Infineon, experience high growth as two key markets, industrial and automotive, continued double-digit growth, buoyed by broad-based growth across most other end markets.

The combined revenue of the top 10 semiconductor vendors increased by 30.6 percent during 2017 and accounted for 58 percent of the total market, outperforming the rest of the market, which saw a milder 11.0 percent revenue increase.

M&As are taking longer

2017 was a slower year for closing mergers and acquisitions (M&As), with roughly half the deal value and number of deals compared with 2016. However, the semiconductor industry continues to see escalating deal sizes with greater complexity, which are becoming more challenging to close. Avago set a record in its acquisition of Broadcom for $37 billion in 2016, and this record should soon be broken by Qualcomm’s acquisition of NXP Semiconductors for $44 billion.

The IoT is starting to pay vendor dividends

Growth in the Internet of Things (IoT) is having a significant impact on the semiconductor market, with application-specific standard products (ASSPs) for consumer applications up by 14.3 percent and industrial ASSPs rising by 19.1 percent in 2017. Semiconductors for wireless connectivity showed the highest growth with 19.3 percent in 2017, and topping $10 billion for the first time, despite reduced component prices and the static smartphone industry.

More detailed analysis is available to Gartner clients in the report “Market Share Analysis: Semiconductors, Worldwide, 2017.”

SPTS Technologies, an Orbotech company and a supplier of advanced wafer processing solutions for the global semiconductor and related industries, announced today that it has been awarded the coveted Queen’s Award for Enterprise in Innovation 2018. The award recognizes SPTS’s development of novel physical vapor deposition (PVD) process solutions for Fan-Out Wafer Level Packaging (FOWLP) of semiconductor devices. Some of the advanced features and functionality developed for SPTS’s 300mm Sigma®fxP PVD system was made possible with funding assistance from a Welsh Government R&D grant. In addition to assessing the degree of innovation, the judging panel also evaluated SPTS on its corporate responsibility, which included employee affairs, customer and supplier relationships, and its impact on the environment and contribution to society.

“We are extremely proud to be recognized with the Queen’s Award for Enterprise in Innovation,” stated Kevin Crofton, Corporate Executive Vice President at Orbotech and President of SPTS Technologies. “We provide advanced wafer processing equipment to the world’s leading semiconductor and microelectronics manufacturers, and an ongoing program of research and development coupled with our ability to commercialize our innovation has been key to building and sustaining a profitable business. This award belongs to our entire global organization – from those directly involved in the development of our advanced PVD solutions for the fast growing FOWLP application sector, to those who sold, manufactured, installed and supported the many 300mm Sigma systems that we’ve shipped into our customer base.”

Mr Crofton added, “The success of our wafer processing solutions for advanced packaging is a testament to the quality and competitiveness of UK developed technologies and products in the global markets. We are also very pleased to share credit for this award with the Welsh Government who demonstrated their commitment with the R&D grant that helped fund this and other advanced packaging development programs here at SPTS.”

Economy Secretary, Ken Skates said: “Huge congratulations to SPTS on winning another Queens Award for Enterprise and Innovation. SPTS is a prominent global business in South East Wales and an increasingly successful exporter, and this prestigious award is a well-deserved recognition of the company’s hard work and innovation.”

“The Welsh Government is proud to work with dynamic and forward thinking companies such as SPTS and we are pleased to have supported the company’s project to design and develop advanced packaging processes for semiconductors. There is no doubt that companies like SPTS are increasingly vital to our economy which is why my Economic Action Plan, which was published in December, seeks to support businesses to innovate, introduce new products and services and rise to the challenges of the future.”

The Queen’s Awards for Enterprise are the UK’s most prestigious business awards, given only to companies or individuals who are outstanding in their field. Previously known as the Queen’s Awards to Industry, the Queen’s Awards for Enterprise were introduced in 1966 to acknowledge businesses with outstanding performance in three categories – International Trade, Innovation and Sustainable Development.  The awards are open to any company operating in the UK and are announced annually on 21 April, The Queen’s birthday.