Category Archives: Device Architecture

Silvaco today announced that it has acquired NanGate, a developer of Electronic Design Automation (EDA) software, that offers tools and services for creation, optimization, characterization and validation of physical library IP.

NanGate’s Library Creation Platform has been deployed by a large number of semiconductor companies creating standard cell libraries used in hundreds of SoC designs and have shipped in billions of units. NanGate’s technology is available and proven in a broad range of standard logic CMOS processes from 250nm down to 14nm nodes, available from multiple foundries. The acquisition extends Silvaco’s tools portfolio, complements Silvaco’s IC design flow and strengthens the methodology to achieve high performance, high yield standard cell libraries that meet today’s high-sigma requirements.

“We are happy for the NanGate team with their ability to deliver excellent solutions for library creation to top-tier Semiconductor companies,” said Dave Dutton, CEO of Silvaco. “Together with our leadership in variation aware design methodology with VarMan, SmartSpice, and our complete custom design flow including extraction, we are now able to deliver a complete solution for high performance standard cell libraries creation.”

“The synergy between Silvaco’s growth strategy and NanGates technology plus the combination of our talented teams will accelerate the delivery of tools and methodologies for a highly productive standard cell library and characterization flow,” said Ole Christian Andersen, President and CEO of NanGate. “We are excited to join Silvaco to further our original vision.”

Silvaco’s aggressive growth plan is designed to grow revenue by adding strategic technologies to offer the best solutions to our customers. This acquisition was led by Ron Sorisho and is the sixth acquisition for Silvaco’s business development team.

Each year, Solid State Technology turns to industry leaders to hear viewpoints on the technological and economic outlook for the upcoming year. Read through these expert opinions on what to expect in 2018.

Enabling the AI Era with Materials Engineering

Screen Shot 2018-03-05 at 12.24.49 PMPrabu Raja, Senior Vice President, Semiconductor Products Group, Applied Materials

A broad set of emerging market trends such as IoT, Big Data, Industry 4.0, VR/AR/MR, and autonomous vehicles is accelerating the transformative era of Artificial Intelligence (AI). AI, when employed in the cloud and in the edge, will usher in the age of “Smart Everything” from automobiles, to planes, factories, buildings, and our homes, bringing fundamental changes to the way we live

Semiconductors and semiconductor processing technol- ogies will play a key enabling role in the AI revolution. The increasing need for greater computing perfor- mance to handle Deep Learning/Machine Learning workloads requires new processor architectures beyond traditional CPUs, such as GPUs, FPGAs and TPUs, along with new packaging solutions that employ high-density DRAM for higher memory bandwidth and reduced latency. Edge AI computing will require processors that balance the performance and power equation given their dependency on battery life. The exploding demand for data storage is driving adoption of 3D NAND SSDs in cloud servers with the roadmap for continued storage density increase every year.

In 2018, we will see the volume ramp of 10nm/7nm devices in Logic/Foundry to address the higher performance needs. Interconnect and patterning areas present a myriad of challenges best addressed by new materials and materials engineering technologies. In Inter- connect, cobalt is being used as a copper replacement metal in the lower level wiring layers to address the ever growing resistance problem. The introduction of Cobalt constitutes the biggest material change in the back-end-of-line in the past 15 years. In addition to its role as the conductor metal, cobalt serves two other critical functions – as a metal capping film for electro- migration control and as a seed layer for enhancing gapfill inside the narrow vias and trenches.

In patterning, spacer-based double patterning and quad patterning approaches are enabling the continued shrink of device features. These schemes require advanced precision deposition and etch technologies for reduced variability and greater pattern fidelity. Besides conventional Etch, new selective materials removal technologies are being increasingly adopted for their unique capabilities to deliver damage- and residue-free extreme selective processing. New e-beam inspection and metrology capabilities are also needed to analyze the fine pitch patterned structures. Looking ahead to the 5nm and 3nm nodes, placement or layer-to-layer vertical alignment of features will become a major industry challenge that can be primarily solved through materials engineering and self-aligned structures. EUV lithography is on the horizon for industry adoption in 2019 and beyond, and we expect 20 percent of layers to make the migration to EUV while the remaining 80 percent will use spacer multi- patterning approaches. EUV patterning also requires new materials in hardmasks/underlayer films and new etch solutions for line-edge-roughness problems.

Packaging is a key enabler for AI performance and is poised for strong growth in the coming years. Stacking DRAM chips together in a 3D TSV scheme helps bring High Bandwidth Memory (HBM) to market; these chips are further packaged with the GPU in a 2.5D interposer design to bring compute and memory together for a big increase in performance.

In 2018, we expect DRAM chipmakers to continue their device scaling to the 1Xnm node for volume production. We also see adoption of higher perfor- mance logic technologies on the horizon for the periphery transistors to enable advanced perfor- mance at lower power.

3D NAND manufacturers continue to pursue multiple approaches for vertical scaling, including more pairs, multi-tiers or new schemes such as CMOS under array for increased storage density. The industry migration from 64 pairs to 96 pairs is expected in 2018. Etch (high aspect ratio), dielectric films (for gate stacks and hardmasks) along with integrated etch and CVD solutions (for high aspect ratio processing) will be critical enabling technologies.

In summary, we see incredible inflections in new processor architectures, next-generation devices, and packaging schemes to enable the AI era. New materials and materials engineering solutions are at the very heart of it and will play a critical role across all device segments.

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BY AJIT MANOCHA, President and CEO of SEMI

2017 was a terrific year for SEMI members. Chip revenues closed at nearly $440B, an impressive 22 percent year- over-year growth. The equipment industry surpassed revenue levels last reached in the year 2000. Semicon- ductor equipment posted sales of nearly $56B and semiconductor materials $48B in 2017. For semiconductor equipment, this was a giant 36 percent year-over-year growth. Samsung, alone, invested $26B in semiconductor CapEx in 2017 – an incredible single year spend in an incredible year.

MEMS and Sensors gained new growth in telecom and medical markets, adding to existing demand from automotive, industrial and consumer segments. MEMS is forecast to be a $19B industry in 2018. Flexible hybrid electronics (FHE) is also experiencing significant product design and functionality growth with increasing gains in widespread adoption.

No longer isa single monolithic demand driver propelling the electronics manufacturing supply chain. The rapidly expanding digital economy continues to foster innovation with new demand from the IoT, virtual and augmented reality (VR/AR), automobile infotainment and driver assistance, artificial intelligence (AI) and Big Data, among others. With the explosion in data usage, memory demand is nearly insatiable, holding memory device ASPs high and prompting continued heavy investment in new capacity.

2018 is forecast to be another terrific year. IC revenues are expected to increase another 8 percent and semiconductor equipment will grow 11 percent. With diverse digital economy demand continuing, additional manufacturing capacity is being added in China as fab projects come on line to develop and increase the indigenous semiconductor supply chain.

So, why worry?

The cracks starting to show are in the areas of talent, data management, and Environment, Health, and Safety (EH&S).

Can the industry sustain this growth? The electronics manufacturing supply chain has demonstrated it can generally scale and expedite production to meet the massive new investment projects. The cracks starting to show are in the areas of talent, data management, and Environment, Health, and Safety (EH&S).

Talent has become a pinch point. In Silicon Valley alone, SEMI member companies have thousands of open positions. Globally, there are more than 10,000 open jobs. Attracting new candidates and developing a global workforce are critical to sustaining the pace of innovation and growth.
Data management and effective data sharing are keys to solving problems faster and making practical novel but immature processes at the leading edge. It is ironic that other industries are ahead of semiconductor manufac- turing in harnessing manufacturing data and leveraging AI across their supply chains. Without collaborative Smart Data approaches, there is jeopardy of decreasing the cadence of Moore’s Law below the 10 nm node.

EH&S is critical for an industry that now uses the majority of the elements of the periodic table to make chips – at rates of more than 50,000 wafer starts per month (wspm) for a single fab. The industry came together strongly in the 1990s to develop SEMI Safety Standards and compliance methodologies. Since then, the number of EH&S profes- sionals engaged in our industry has declined while the number of new materials has exploded, new processing techniques have been developed, and manufacturing is expanding across China in areas with no prior semicon- ductor manufacturing experience.

HTU has been a very effective program with over 218 sessions run to date, over 7,000 students engaged, and over 70 percent of respondents pursuing careers in the STEM field.

To ensure we don’t slow growth, the industry will need to work together in 2018 in these three key areas:

Talent development needs to rapidly accelerate by expanding currently working programs and adding additional means to fill the talent funnel. The SEMI Foundation’s High Tech University (HTU) works globally with member companies to increase the number of high school students selecting Science, Technology, Engineering, and Math (STEM) fields – and provides orientation to the semiconductor manufacturing industry. HTU has been a very effective program with over 218 sessions run to date, over 7,000 students engaged, and over 70 percent of respondents pursuing careers in the STEM field. SEMI will increase the number of HTU sessions in 2018.

Plans have already been approved by SEMI’s Board of Directors to work together with SEMI’s membership to leverage existing, and pioneer new, workforce development programs to attract and develop qualified candidates from across the age and experience spectrum (high school through university, diversity, etc.). Additionally, an industry awareness campaign will be developed and launched to make more potential candidates attracted to our member companies as a great career choice. I’ll be providing you with updates on this initiative – and asking for your involvement
– throughout 2018.

Data management is a broad term. Big Data, machine learning, AI are terms that today mean different things to different people in our supply chain. What is clear is that to act together and take advantage of the unimaginable amounts of data being generating to produce materials and make semiconductor devices with the diverse equipment sets across our fabs, we need a common understanding of the data and potential use of the data.

In 2018, SEMI will launch a Smart Data vertical application platform to engage stakeholders along the supply chain to produce a common language, develop Standards, and align expectations for sharing data for mutual benefit. Bench- marking of other industries and pre-competitive pilot programs are being proposed to learn and, here too, we need the support and engagement of thought leaders throughout SEMI’s membership.

EH&S activity must intensify to maintain safe operations and to eliminate business interruptions from supply chain disruptions. There is potential for disruptions from material bans such as the Stockholm Convention action on PFOA and arising from the much wider range of chemicals and materials being used in advanced manufacturing. Being able to reliably identify these in time to guide and coordinate industry action will take a reinvigorated SEMI EH&S stewardship and membership engagement.

As China rapidly develops new fabs in many provinces – some with only limited prior experience and infrastructure – SEMI EH&S Standards orientation and training will accelerate the safe and sustainable operation of fabs, enabling them to keep pace with the ambitious growth trajectory our industry is delivering. In 2018, we’ll be looking for a renewed commitment to EH&S and sustainability for the budding challenges of new materials, methods, and emerging regions.

Remarkable results from a remarkable membership

Thank you all for a terrific 2017 and let’s work together on the key initiatives to ensure that our industry’s growth and prosperity will continue in 2018 and beyond.

In a quick review of 2017, I would like to thank SEMI’s members for their incredible results and new revenue records. Foundational to that, SEMI’s members have worked together with SEMI to connect, collaborate, and innovate to increase growth and prosperity for the industry. These founda- tional contributions have been in expositions, programs, Standards, market data, messaging (communications), and workforce development (with HTU).

The infographic below captures these foundational accom- plishments altogether. SEMI strives to speed the time to better business results for its members across the global electronics manufacturing supply chain. To do so, SEMI is dependent upon, and grateful for, the support and volunteer efforts of its membership. Thank you for a terrific 2017 and let’s work together on the key initiatives to ensure that our industry’s growth and prosperity will continue in 2018 and beyond.

GLOBALFOUNDRIES and eVaderis today announced that they are co-developing an ultra-low power microcontroller (MCU) reference design using GF’s embedded magnetoresistive non-volatile memory (eMRAM) technology on the 22nm FD-SOI (22FDX®) platform. By bringing together the superior reliability and versatility of GF’s 22FDX eMRAM and eVaderis’ ultra-low power IP, the companies will deliver a technology solution that supports a broad set of applications such as battery-powered IoT products, consumer and industrial microcontrollers, and automotive controllers.

eVaderis designed their MCU to leverage the efficient power management capabilities of the 22FDX platform, achieving more than 10 times the battery life and a significantly reduced die size compared to previous generation MCUs. The technology, developed through GF’s FDXcelerator Partner Program, will help designers push performance density and flexibility to new levels to achieve a more compact, cost-effective single-chip solution for power-sensitive applications.

“The innovative architecture of eVaderis’ ultra-low power MCU IP, designed around GF’s 22FDX eMRAM technology, is well suited for normally-off IoT applications,” said Jean-Pascal Bost, President and CEO of eVaderis. “Utilizing GF’s eMRAM as a working memory allows sections of the eVaderis MCU to power cycle frequently, without incurring the typical MCU performance penalty. eVaderis looks forward to making this silicon-proven IP available to our customers by the end of this year.”

“Wearable and IoT devices require long-lasting battery life, increased processing capability, and the integration of advanced sensors,” said Dave Eggleston, VP of Embedded Memory at GF. “As an FDXcelerator partner, eVaderis is developing an optimized MCU architecture in GF’s 22FDX with eMRAM that helps customers meet demanding requirements.”

The jointly developed reference design with GF’s 22FDX with eMRAM will be available in Q4 2018. Process design kits for 22FDX with eMRAM and RF solutions are available now. Customer prototyping of 22FDX eMRAM on multi-project wafers (MPWs) is underway, with risk production planned for 2018. Off-the-shelf eMRAM macros are available now, featuring easy design-in with both eFlash and SRAM interface options.

Customers that are interested in learning more about GF’s 22FDX with eMRAM solution, co-developed in partnership with Everspin Technologies, contact your sales representative or visit globalfoundries.com.

Researchers at North Carolina State University have developed a new technique that allows them to print circuits on flexible, stretchable substrates using silver nanowires. The advance makes it possible to integrate the material into a wide array of electronic devices.

Silver nanowires have drawn significant interest in recent years for use in many applications, ranging from prosthetic devices to wearable health sensors, due to their flexibility, stretchability and conductive properties. While proof-of-concept experiments have been promising, there have been significant challenges to printing highly integrated circuits using silver nanowires.

Silver nanoparticles can be used to print circuits, but the nanoparticles produce circuits that are more brittle and less conductive than silver nanowires. But conventional techniques for printing circuits don’t work well with silver nanowires; the nanowires often clog the printing nozzles.

“Our approach uses electrohydrodynamic printing, which relies on electrostatic force to eject the ink from the nozzle and draw it to the appropriate site on the substrate,” says Jingyan Dong, co-corresponding author of a paper on the work and an associate professor in NC State’s Edward P. Fitts Department of Industrial & Systems Engineering. “This approach allows us to use a very wide nozzle – which prevents clogging – while retaining very fine printing resolution.”

“And because our ‘ink’ consists of a solvent containing silver nanowires that are typically more than 20 micrometers long, the resulting circuits have the desired conductivity, flexibility and stretchability,” says Yong Zhu, a professor of mechanical engineering at NC State and co-corresponding author of the paper.

“In addition, the solvent we use is both nontoxic and water-soluble,” says Zheng Cui, a Ph.D. student at NC State and lead author of the paper. “Once the circuit is printed, the solvent can simply be washed off.”

What’s more, the size of the printing area is limited only by the size of the printer, meaning the technique could be easily scaled up.

The researchers have used the new technique to create prototypes that make use of the silver nanowire circuits, including a glove with an internal heater and a wearable electrode for use in electrocardiography. NC State has filed a provisional patent on the technique.

“Given the technique’s efficiency, direct writing capability, and scalability, we’re optimistic that this can be used to advance the development of flexible, stretchable electronics using silver nanowires – making these devices practical from a manufacturing perspective,” Zhu says.

North America-based manufacturers of semiconductor equipment posted $2.36 billion in billings worldwide in January 2018 (three-month average basis), according to the January Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.  The billings figure is 1.4 percent lower than the final December 2017 level of $2.40 billion, and is 27.2 percent higher than the January 2017 billings level of $1.86 billion.

“The strong billings levels from late 2017 have carried over into the new year,” said Ajit Manocha, president and CEO of SEMI. “We maintain a positive outlook for the 2018 market, marking three years of growth for equipment spending.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg)
Year-Over-Year
August 2017
$2,181.8
27.7%
September 2017
$2,054.8
37.6%
October 2017
$2,019.3
23.9%
November 2017
$2,052.3
27.2%
December 2017 (final)
$2,398.4
28.3%
January 2018 (prelim)
$2.364.8
27.2%

Source: SEMI (www.semi.org), February 2018
SEMI publishes a monthly North American Billings report and issues the Worldwide Semiconductor Equipment Market Statistics (WWSEMS) report in collaboration with the Semiconductor Equipment Association of Japan (SEAJ). The WWSEMS report currently reports billings by 24 equipment segments and by seven end market regions. SEMI also has a long history of tracking semiconductor industry fab investments in detail on a company-by-company and fab-by-fab basis in its World Fab Forecast and SEMI FabView databases. These powerful tools provide access to spending forecasts, capacity ramp, technology transitions, and other information for over 1,000 fabs worldwide. For an overview of available SEMI market data, please visit www.semi.org/en/MarketInfo.

Super Micro Computer, Inc. (NASDAQ: SMCI) today announced that it has expanded its Silicon Valley Headquarters to over two million square feet of facilities with the grand opening of its new Building 22.

The Corporate Headquarters includes engineering, manufacturing and customer service making Supermicro the only Tier 1 systems vendor to build its servers in Silicon Valley and worldwide.  Supermicro is ranked as the third largest server systems supplier in the world (Source: IDC).  In addition to the branded solution business used in the ranking, Supermicro also services large OEM and system integrator customers and shipped over 1.2 million units in 2017.

This latest building is the second of five facilities that the company plans to build on the 36-acre property formerly owned by the San Jose Mercury News. Additionally, the company continues to expand its other facilities worldwide.

“Having our design, engineering, manufacturing and service teams all here at our Silicon Valley campus gives Supermicro the agility to quickly respond to the newest technologies in the industry and to our customer’s needs and unique requirements, which is a major advantage that we have over the competition,” said Charles Liang, President and CEO of Supermicro.  “As our business continues to rapidly scale with over 1.2 million server and storage systems shipped globally last year, increasing our production capacity and capabilities is vital to keeping up with our rapid growth.  The opening of Building 22, along with the opening of two new facilities at our technology campus in Taiwan, provides the additional capacity and rack scale integration plug and play capabilities to ensure that we can provide the best possible service to our enterprise, datacenter, channel and cloud customers.”

“We’re thrilled to see an innovative, sustainable, and community-minded leader like Supermicro continuing to invest and grow in San Jose, and we look forward to their continued success now and for years to come!” said San Jose Mayor Sam Liccardo.

“The Corporation for Manufacturing Excellence – Manex would like to congratulate Supermicro for its continued growth through design and engineering excellence,” said Gene Russell, President and CEO of Manex.  “Its investments in workforce, physical plant and equipment are crucial to the Silicon Valley Ecosystem and to its global client base.  Manex, as a network member of the NIST Manufacturing Extension Partnership and the CMTC California network is a proud partner of Supermicro.”

Working closely with key partners like Intel, Supermicro leverages its strength in design and engineering to lead the way with first-to-market server and storage technology innovations. The company offers the industry’s broadest portfolio of advanced server and storage solutions including the popular BigTwin™ and SuperBlade® product lines and provides rack scale integration with rack plug and play capabilities.

Entering 2018 on solid ground


February 22, 2018

By Walt Custer, Custer Consulting Group

2017 finished on an upturn – both in the USA and globally.  Based on consolidated fourth-quarter actual and estimated revenues of 213 large, global electronic manufactures, sales rose in excess of 7 percent in 4Q’17 vs. 4Q’16 (Chart 1).  This was the highest global electronic equipment sales growth rate since the third quarter of 2011. Because some companies in our sample didn’t close their financial quarter until the end of January, final results will take a few more weeks – but all evidence points to a very strong fourth quarter of last year.

Custer1-Electronic-Equipment

 

Using regional (country specific) data (Chart 2), the normal, consumer electronics driven seasonal downturn began again in January.  However the recent year-over-year growth is still substantial.  On a total electronic equipment revenue basis, January 2018 was up almost 19.5 percent over January 2017.

Custer2-World-Electronic

Because this regional data in local currencies was converted to U.S. dollars at fluctuating exchange, the dollar denominated-growth was amplified by currency exchange effects.  At constant exchange the January growth was only 14 percent.   That is, when the stronger non-U.S. currencies were converted to weakening dollars, the dollar-denominated January 2018 fluctuating exchange growth was amplified by 5.5 percent.

Chart 3 shows 4Q’17/4Q’16 growth of the domestic electronic supply chain.  U.S. electronic equipment shipments were up 9.1 percent.  Only computer equipment and non-defense aircraft sales declined in the fourth quarter.  And of note, SEMI equipment shipments to North America rose almost 31 percent!

Custer3-US-Electronic-Supply

 

Chart 4 shows estimated fourth-quarter growth for the world electronic supply chain.  Only “Business & Office” equipment revenues declined in 4Q’17 vs. 4Q’16.

Custer4-Global-Electronic

Total global electronic equipment sales increased more than 7 percent in the fourth quarter and SEMI equipment revenues rose 32 percent.

2017 was a strong year and 2018 is off to a good start!  The 2017 lofty growth rates will temper, but this current expansion will likely continue.  Watch the monthly numbers!

Originally published on the SEMI blog.

The success and proliferation of integrated circuits has largely hinged on the ability of IC manufacturers to continue offering more performance and functionality for the money.  Driving down the cost of ICs (on a per-function or per-performance basis) is inescapably tied to a growing arsenal of technologies and wafer-fab manufacturing disciplines as mainstream CMOS processes reach their theoretical, practical, and economic limits. Among the many levers being pulled by IC designers and manufacturers are: feature-size reductions, introduction of new materials and transistor structures, migration to larger-diameter silicon wafers, higher throughput in fab equipment, increased factory automation, three-dimensional integration of circuitry and chips, and advanced IC packaging and holistic system-driven design approaches.

For logic-oriented processes, companies are fabricating leading-edge devices such as high-performance microprocessors, low-power application processors, and other advanced logic devices using the 14nm and 10nm generations (Figure 1).  There is more variety than ever among the processes companies offer, making it challenging to compare them in a fair and useful way.  Moreover, “plus” or derivative versions of each process generation and half steps between major nodes have become regular occurrences.

For five decades, the industry has enjoyed exponential improvements in the productivity and performance of integrated circuit technology.  While the industry has continued to surmount obstacles put in front of it, the barriers are getting bigger.  Feature size reduction, wafer diameter increases, and yield improvement all have physical or statistical limits, or more commonly…economic limits.  Therefore, IC companies continue to wring every bit of productivity out of existing processes before looking to major technological advances to solve problems.

The growing design and manufacturing challenges and costs have divided the integrated circuit world into the haves and have-nots.  In the June 1999 Update to The McClean Report, IC Insights first described its “Inverted Pyramid” theory, where it was stated that the IC industry was in the early stages of a new era characterized by dramatic restructuring and change.  It was stated that the marketshare makeup in various IC product segments was becoming “top heavy,” with the shares held by top producers leaving very little room for remaining competitors. Although the Update described the emerging inverted pyramid phenomenon from a marketshare perspective, an analogous trend can be seen regarding IC process development and fabrication capabilities. The industry has evolved to the point where only a very small group of companies can develop leading-edge process technologies and fabricate leading-edge ICs.

Figure 1

Figure 1

The ten largest semiconductor R&D spenders increased their collective expenditures to $35.9 billion in 2017, an increase of 6% compared to $34.0 billion in 2016. Intel continued to far exceed all other semiconductor companies with R&D spending that reached $13.1 billion.  In addition to representing 21.2% of its semiconductor sales last year, Intel’s R&D spending accounted for 36% of the top 10 R&D spending and about 22% of total worldwide semiconductor R&D expenditures of $58.9 billion in 2017, according to the 2018 edition of The McClean Report that was released in January 2018.  Figure 1 shows IC Insights’ ranking of the top semiconductor R&D spenders, including both semiconductor manufacturers and fabless suppliers.

Figure 1

Figure 1

Intel’s R&D expenditures increased just 3% in 2017, below its 8% average annual growth rate since 2001, according to the new report.  Still, Intel’s R&D spending exceeded the combined R&D spending of the next four companies—Qualcomm, Broadcom, Samsung, and Toshiba—listed in the ranking.

Underscoring the growing cost of developing new IC technologies, Intel’s R&D-to-sales ratio has climbed significantly over the past 20 years.  In 2017, Intel’s R&D spending as a percent of sales was 21.2%, down from an all-time high of 24.0% in 2015.  In 2010, the ratio was 16.4%, 14.5% in 2005, 16.0% in 2000, and just 9.3% in 1995.

Qualcomm—the industry’s largest fabless IC supplier—was again ranked as second-largest R&D spender, a position it first achieved in 2012.  Qualcomm’s semiconductor-related R&D spending was down 4% in 2017, after a 7% drop in 2016, and it was close to being passed up by third place Broadcom and fourth placed Samsung, whose R&D spending increased 4% and 19%, respectively.

Despite increasing its R&D expenditures by 19% in 2017, Samsung had the lowest investment-intensity level among the top-10 R&D spenders with research and development funding at 5.2% of sales last year.  Samsung’s 49% increase in semiconductor revenue in 2017 (driven by strong growth in DRAM and NAND flash memory) lowered its R&D as a percent of sales ratio from 6.5% in 2016.  Micron Technology’s revenues surged 77% in 2017, but its research and development expenditures grew 8%, resulting in an R&D/sales ratio of 7.5% compared to 12.5% in 2016.  Similarly, SK Hynix’s sales climbed 79% in 2017, while its research and development spending increased 14% in the year, which resulted in an R&D/sakes ratio of 6.5% versus 10.2% in 2016.

Fifth-ranked Toshiba and sixth-ranked Taiwan Semiconductor Manufacturing Co. (TSMC) each allocated about the same amount for R&D spending in 2017.  Toshiba’s R&D spending was down 7% while TSMC had one of the largest increases in R&D spending among the top 10 companies shown in the figure. TSMC’s R&D expenditures grew by 20% as the foundry raced rivals Samsung and GlobalFoundries in launching new process technologies, while its sales rose 9% to $32.2 billion in the year.

Rounding out the top-10 list were MediaTek, Micron, Nvidia, which moved from 11th place in 2016 to 9th position to displace NXP in the 2017 ranking, and SK Hynix.  Collectively, the top-10 R&D spenders increased their outlays by 6% in 2017, two points more than the 4% R&D increase for the entire semiconductor industry.  Combined R&D spending by the top 10 exceeded total spending by the rest of the semiconductor companies ($35.9 billion versus $23.0 billion) in 2017.

A total of 18 semiconductor suppliers allocated more than more than $1.0 billion for R&D spending 2017.  The other eight manufacturers were NXP, TI ST, AMD, Renesas, Sony, Analog Devices, and GlobalFoundries.