Category Archives: Device Architecture

Micron and Intel today announced an update to their successful NAND joint development partnership that has helped the companies develop and deliver industry-leading NAND technologies to market.

The announcement involves the companies’ mutual agreement to work independently on future generations of 3D NAND. The companies have agreed to complete development of their third generation of 3D NAND technology, which will be delivered toward the end of this year and extending into early 2019. Beyond that technology node, both companies will develop 3D NAND independently in order to better optimize the technology and products for their individual business needs.

Micron and Intel expect no change in the cadence of their respective 3D NAND technology development of future nodes. The two companies are currently ramping products based on their second generation of 3D NAND (64 layer) technology.

Both companies will also continue to jointly develop and manufacture 3D XPoint™ at the Intel-Micron Flash Technologies (IMFT) joint venture fab in Lehi, Utah, which is now entirely focused on 3D XPoint memory production.

“Micron’s partnership with Intel has been a long-standing collaboration, and we look forward to continuing to work with Intel on other projects as we each forge our own paths in future NAND development,” said Scott DeBoer, executive vice president of Technology Development, Micron. “Our roadmap for 3D NAND technology development is strong, and we intend to bring highly competitive products to market based on our industry-leading 3D NAND technology.”

“Intel and Micron have had a long-term successful partnership that has benefited both companies, and we’ve reached a point in the NAND development partnership where it is the right time for the companies to pursue the markets we’re focused on,” said Rob Crooke, senior vice president and general manager of Non-Volatile Memory Solutions Group, Intel Corporation. “Our roadmap of 3D NAND and Optane™ technology provides our customers with powerful solutions for many of today’s computing and storage needs.”

Scientists at Tokyo Institute of Technology (Tokyo Tech) and Tohoku University have developed high-quality GFO epitaxial films and systematically investigated their ferroelectric and ferromagnetic properties. They also demonstrated the room-temperature magnetocapacitance effects of these GFO thin films.

Spontaneous polarization appears to be parallel with the c-axis, while spontaneous magnetism appears to be parallel with the a-axis. Credit: None

Spontaneous polarization appears to be parallel with the c-axis, while spontaneous magnetism appears to be parallel with the a-axis. Credit: None

Multiferroic materials show magnetically driven ferroelectricity. They are attracting increasing attention because of their fascinating properties such as magnetic (electric) field-controlled ferroelectric (ferromagnetic) properties and because they can be used in novel technological applications such as fast-writing, power-saving, and nondestructive data storage. However, because multiferroicity is typically observed at low temperatures, it is highly desirable to develop multiferroic materials that can be observed at room temperature.

GaxFe2-xO3, or GFO for short, is a promising room-temperature multiferroic material because of its large magnetization. GFO thin films have already been successfully fabricated, and their polarization switching at room temperature has been demonstrated. However, their ferroelectric and ferromagnetic properties must be controlled to realize better magnetoelectric properties and applications of GFO films. In order to control these properties, it is essential to understand the relationship between the constituent composition at each cation site and the original character.

Therefore, the research team led by Mitsuru Ito at Tokyo Tech set out to systematically investigate multiferroicity as a function of the compositional ratio of Ga and Fe in GFO films. Specifically, they studied the ferroelectric properties of the GFO films using piezoresponse force microscopy, and found that GaxFe2-xO3 films with x = 1 and 0.6 show ferroelectricity at room temperature. The piezoresponse phase can be reversed by 180° when a voltage of more than 4.5 V is applied. This behavior is typical of ferroelectric materials and is a strong indicator of the presence of switchable polarization in the film at room temperature.

The scientists also confirmed room-temperature ferrimagnetism of the films through magnetic characterization. Lastly, they were able to demonstrate the room-temperature magnetocapacitance effects of the GFO films. They reported that by changing x, the coercive electric field, coercive force, and saturated magnetism values could be controlled. They also showed that the ferroelectric and magnetic ranges of GFO-type iron oxides differ from those of the well-known room-temperature multiferroic BiFeO2 and may expand the variety of room-temperature multiferroic materials.

A team of physicists, headed by the U.S. Naval Research Laboratory (NRL), have demonstrated the means to improve the optical loss characteristics and transmission efficiency of hexagonal boron nitride devices, enabling very small lasers and nanoscale optics.

Image shows directly measured polaritons propagating through a flake of Hexagonal boron nitride (hBN). This material has been identified as an ideal substrate for two-dimensional materials research while also recently being demonstrated as an exciting optical material for infrared nanophotonics. Credit: (US Naval Research Laboratory)

Image shows directly measured polaritons propagating through a flake of Hexagonal boron nitride (hBN). This material has been identified as an ideal substrate for two-dimensional materials research while also recently being demonstrated as an exciting optical material for infrared nanophotonics. Credit: (US Naval Research Laboratory)

“The applications for this research are considerably broad,” said Dr. Alexander J. Giles, research physicist, NRL Electronics Science and Technology Division. “By confining light to very small dimensions, nanophotonic devices have direct applications for use in ultra-high resolution microscopes, solar energy harvesting, optical computing and targeted medical therapies.”

Hexagonal boron nitride (hBN) forms an atomically thin lattice consisting of boron and nitrogen atoms. This material has recently been demonstrated as an exciting optical material for infrared nanophotonics and is considered an ‘ideal substrate’ for two-dimensional materials.

While previous work demonstrated that natural hBN supports deeply sub-diffractional hyperbolic phonon polaritons desired for applications, such as, sub-diffractional optical imaging (so-called ‘hyperlensing’), energy conversion, chemical sensing, and quantum nanophotonics, limited transmission efficiencies continue to persist.

“We have demonstrated that the inherent efficiency limitations of nanophotonics can be overcome through the careful engineering of isotopes in polar semiconductors and dielectric materials,” Giles said.

Naturally occurring boron is comprised of two isotopes, boron-10 and boron-11, lending a 10 percent difference in atomic masses. This difference results in substantial losses due to phonon scattering, limiting the potential applications of this material. The research team at NRL has engineered greater than 99 percent isotopically pure samples of hBN, meaning they consist almost entirely of either boron-10 or boron-11 isotopes.

This approach results in a dramatic reduction in optical losses, resulting in optical modes that travel up to three times farther and persist for up to three times longer than natural hBN. These long-lived vibrational modes not only enable immediate advances specific to hBN – near field optics and chemical sensing – but also provide a strategic approach for other materials systems to exploit and build upon.

“Controlling and manipulating light at nanoscale, sub-diffractional dimensions is notoriously difficult and inefficient,” said Giles. “Our work represents a new path forward for the next generation of materials and devices.”

Xilinx, Inc. (NASDAQ: XLNX) today announced that its board of directors has appointed Victor Peng as president and chief executive officer, effective January 29, 2018.  Peng will become the fourth CEO in Xilinx’s history and takes the helm of the global market leader of programmable semiconductor products at a time of increasing momentum and opportunity.

“Victor is unique in his ability to translate vision and strategy into world-class execution and has an incredible ability to inspire and lead transformation.  He has been the architect of Xilinx’s innovations for the past decade and will move the company forward with the speed required to capitalize on the opportunities in front of us,” said Dennis Segers, chairman of the board of Xilinx. “Victor is a proven leader with exceptional business acumen and a deep, unwavering dedication to customers. The BOD is thrilled to appoint Victor CEO as the company enters its next chapter of expanded innovation and growth.”

“I’m honored to have been chosen to lead Xilinx at such a dynamic time in our industry,” said Peng. “The world of technology is changing rapidly, and I plan to architect Xilinx to take advantage of where I see the greatest opportunities for transformational growth.  Xilinx is in a rare position of strength and is poised to capitalize on the next shift in computing.  By focusing on delivering unique value to new areas as well as our traditional markets, I plan to accelerate the company’s growth and create the next wave of shareholder value.”

Since joining the company in 2008, Peng has spearheaded industry-leading strategy and technical shifts across the company’s portfolio of products and services, resulting in three consecutive generations of core product leadership and significant technology breakthroughs in integration and programming.  Most recently, he served as Chief Operating Officer and was appointed as a member of the board of directors in October 2017.

Before joining Xilinx, Peng served as corporate vice president of the graphics products group (GPG) silicon engineering at AMD, where he also served as a key leader in AMD’s central silicon engineering team supporting graphics, console game products, CPU chipset and consumer business units. Peng earned a bachelor’s in electrical engineering from Rensselaer Polytechnic Institute, and a master’s in electrical engineering from Cornell University.

Peng, 57, succeeds Moshe Gavrielov, 63, who will step down as CEO and from the board of directors on January 28, as part of a previously announced CEO succession plan.

The latest market research report by Technavio on the global radio-frequency (RF) power semiconductor devices market predicts a CAGR of close to 12% during the period 2017-2021.

The report segments the global RF power semiconductor devices market by application (telecom segment, military segment, and industrial segment), by material (gallium nitride, gallium arsenide, and laterally diffused metal oxide semiconductor), and by geography (the Americas, EMEA, and APAC). It provides a detailed illustration of the major factors influencing the market, including drivers, opportunities, trends, and industry-specific challenges.

 

Increased proliferation of smartphones and tablets: a major market driver

Increased proliferation of smartphones and tablets is one of the major factors driving global RF power semiconductor devices market. The network traffic is growing at an exponential rate because of the increased popularity of mobile computing devices. As a result, there is the continued deployment of the next-generation wireless standards such as 4G and 5G across the globe. The integration of progressive wireless technologies such as long-term evolution (LTE) and Wi-Fi in smartphones and tablets has generated an increased need for new RF features in these devices. The proliferation of mobile computing devices such as smartphones and tablets are expected to encourage RF device manufacturers to develop high-performance RF filters that meet the requirements of smartphones and tablet OEMs.

APAC: largest RF power semiconductor devices market

The RF power semiconductor devices market in APAC will grow rapidly during the forecast period. There is a high demand for improved cellular networks from developing countries such as China, India, South Korea, Taiwan, and Malaysia. Most of these nations are almost at their saturation of 3G services and have started offering 4G as well as LTE services. The high population density of nations such as India and China, along with the economic growth has increased demand for power applications in network infrastructure to offer better services.

According to Rohan Joy Thomas, a lead analyst at Technavio for research on embedded systems, “Taiwanese manufacturers are developing RF devices for smartphones and wireless communications. Companies such as WIN Semiconductors and Visual Photonics Epitaxy are competing in the optic fiber telecommunication markets using their advanced technology to raise their product value and gross margins. WIN Semiconductors utilizes its production facilities at 90% of overall capacity. These positive developments are expected to push the overall market to gain traction in the forecast period.”

Competitive vendor landscape

Like most emerging compound semiconductor technologies, the theoretical benefits of wide bandgap (WBG) materials are well known. However, the practical realization of this technology in microelectronic devices remains at its nascent stage. The strong supply chain of RF devices can help push the use of this technology for RF infrastructure. In 2015, the RF power industry witnessed growth, driven by the large-scale adoption of LTE networks in China and increased demand for cellular infrastructure. Many device manufacturers are equipped with the requirements to make GaN commercially successful. Therefore, Technavio anticipates a speedy increase in the process and product development toward mass manufacturing.

By Junko Collins, Director of Standards, SEMI Japan

SEMI Standards are the very heartbeat of manufacturing efficiency, underpinning the state-of-the-art technologies and products showcased by over 750 exhibitors at SEMICON Japan last December. Through its Standards committees, SEMI is a key enabler of innovation, higher manufacturing efficiency and lower manufacturing costs for the global electronics industry.

At SEMICON Japan, 22 SEMI Standards meetings were held by committees including:

  • Japan Regional Standards Committee (JRSC)
  • Gases Committee
  • Facilities Committee
  • Liquid Chemical Committee
  • Physical Interface & Carriers Committee
  • Silicon Wafers Committee
  • Traceability Committee
  • Information & Control Committee
  • Environmental, Health & Safety Committee

At the SEMI Standards Friendship Party during SEMICON Japan, JRSC recognized the following nine committee members for outstanding contributions to the development of SEMI Standards.

SEMI Japan Standards Award honors enduring commitments and outstanding contributions to standards development.

  • Takayuki Nishimura, SCREEN Semiconductor Solutions Co, Ltd, for his long-term chairmanship of the Japan Information & Control Committee. He led the committee’s collaboration with other regions and spearheaded the development of the Generic Equipment Model (GEM) 300A standard for smarter semiconductor factories by the SEMI equipment suppliers special interest group (ESG).

SEMI Japan International Collaboration Award recognizes members who contributed to Japan’s collaboration with other regions.

The four Japan 3 Dimensional Structured IC (3DS-IC) Committee steering group leaders for their contribution to the integration of 3DS-IC Committee and Packaging Committee into the 3D Integration & Packaging Committee.

  • Masahiro Tsuriya, International Electronics Manufacturing Initiative
  • Eiji Yoshino, Hitachi High-Technologies Co.
  • Haruo Shimamoto, Advanced Industrial Science and Technology
  • Mamoru Takahashi, Asahi Glass Co., Ltd.

SEMI Japan Special Appreciation Award is awarded for special contributions to the SEMI Standards program.

  • Mitsune Sakamoto, Zama Consulting for his dedication to the full revision of the GEM 300 seminar text that explains the 300 mm automated communication standard.

SEMI Japan Honor Award recognizes long-term contributions to SEMI Standards.

  • Yoshitada Nogami, SK-Electronics Co., Ltd. for his contribution to the development of many flat panel display standards as a chairman of the FPD committee. He also contributed to the growth of the FPD industry through SEMI Japan Production Cost Saving activities.
  • Yoshihisa Takasaki, ASM Japan K.K., for his contribution to the Information & Control Committee. In particular, as co-leader of the GEM 300 TF he was instrumental in the development of the GEM300A standard for smarter manufacturing.
  • Toshio Murakami, Murakami Corporation, for his contribution to Metrics Committee as a chairman and for maintaining high committee productivity even in times of constrained resources.

The award ceremony was attended by international SEMI Standards members and SEMI global leadership including: Ajit Manocha, SEMI president and CEO; Michael Ciesinski, SEMI Vice President, Technology Communities; and Osamu Nakamura, president of SEMI Japan.

For more information on SEMI Standards program, visit www.semi.org/standards.

IC Insights is currently researching and writing its 21st edition of The McClean Report, which will be released later this month.  As part of the report, a listing of the 2017 top 50 fabless IC suppliers will be presented.

Figure 1 shows the top 10 ranking of fabless IC suppliers for 2017.  Two China-based fabless companies made the top 10 ranking last year—HiSilicon, which sells most of its devices as internal transfers to smartphone supplier Huawei, and Unigroup, which includes the IC sales of both Spreadtrum and RDA. Fabless company IC sales are estimated to have exceeded $100 billion in 2017, the first time this milestone has been reached.

Figure 1

Figure 1

Unlike the relatively close annual market growth relationship between fabless IC suppliers and foundries, fabless IC company sales growth versus IDM (integrated device manufacturers) IC supplier growth has typically been very different (Figure 2).  The first time IDM IC sales growth outpaced fabless IC company sales growth was in 2010 when IDM IC sales grew 35% and fabless IC company sales grew 29%.  Since very few fabless semiconductor suppliers participate in the memory market, the fabless suppliers did not receive much of a boost from the surging DRAM and NAND flash memory markets in 2010, which grew 75% and 44%, respectively.  However, the fabless IC suppliers once again began growing faster than the IDMs beginning in 2011 and this trend continued through 2014.

Figure 2

Figure 2

In 2015, for only the second time on record, IDM IC sales “growth” (-1%) outpaced fabless IC company sales “growth” (-3%).  The primary cause of the fabless companies’ 2015 sales decline was Qualcomm’s steep 17% drop in sales. Much of the sharp decline in Qualcomm’s sales that year was driven by Samsung’s increased use of its internally developed Exynos application processors in its smartphones instead of the application processors it had previously sourced from Qualcomm.  Although Qualcomm’s sales continued to decline in 2016, the fabless companies’ sales in total (5%) once again outpaced the growth from IDM’s (3%).

In 2017, the market behaved very similarly to 2010, when strong growth in the memory market propelled the IDM IC sales growth rate higher than the fabless IC supplier growth rate.  With the total memory market, a market in which the fabless IC companies have very little share, surging by 58% last year, IDM IC sales growth easily outpaced fabless company IC sales growth in 2017.

Carbon nanotubes bound for electronics need to be as clean as possible to maximize their utility in next-generation nanoscale devices, and scientists at Rice and Swansea universities have found a way to remove contaminants from the nanotubes.

Rice chemist Andrew Barron, also a professor at Swansea in the United Kingdom, and his team have figured out how to get nanotubes clean and in the process discovered why the electrical properties of nanotubes have historically been so difficult to measure.

Scientists at Rice and Swansea universities have demonstrated that heating carbon nanotubes at high temperatures eliminates contaminants that make nanotubes difficult to test for conductivity. They found when measurements are taken within 4 microns of each other, regions of depleted conductivity caused by contaminants overlap, which scrambles the results. The plot shows the deviation when probes test conductivity from minus 1 to 1 volt at distances greater or less than 4 microns. Credit: Barron Research Group/Rice University

Scientists at Rice and Swansea universities have demonstrated that heating carbon nanotubes at high temperatures eliminates contaminants that make nanotubes difficult to test for conductivity. They found when measurements are taken within 4 microns of each other, regions of depleted conductivity caused by contaminants overlap, which scrambles the results. The plot shows the deviation when probes test conductivity from minus 1 to 1 volt at distances greater or less than 4 microns. Credit: Barron Research Group/Rice University

Like any normal wire, semiconducting nanotubes are progressively more resistant to current along their length. But over the years, conductivity measurements of nanotubes have been anything but consistent. The Rice-Swansea team wanted to know why.

“We are interested in the creation of nanotube-based conductors, and while people have been able to make wires, their conduction has not met expectations,” Barron said. “We wanted to determine the basic science behind the variability observed by other researchers.”

They discovered that hard-to-remove contaminants — leftover iron catalyst, carbon and water — could easily skew the results of conductivity tests. Burning those contaminants away, Barron said, creates new possibilities for carbon nanotubes in nanoscale electronics.

The new study appears in the American Chemical Society journal Nano Letters.

The researchers first made multiwalled carbon nanotubes between 40 and 200 nanometers in diameter and up to 30 microns long. They then either heated the nanotubes in a vacuum or bombarded them with argon ions to clean their surfaces.

They tested individual nanotubes the same way one would test any electrical conductor: by touching them with two probes to see how much current passes through the material from one tip to the other. In this case, tungsten probes were attached to a scanning tunneling microscope.

In clean nanotubes, resistance got progressively stronger as the distance increased, as it should. But the results were skewed when the probes encountered surface contaminants, which increased the electric field strength at the tip. And when measurements were taken within 4 microns of each other, regions of depleted conductivity caused by contaminants overlapped, which further scrambled the results.

“We think this is why there’s such inconsistency in the literature,” Barron said. “If nanotubes are to be the next-generation lightweight conductor, then consistent results, batch-to-batch and sample-to-sample, are needed for devices such as motors and generators as well as power systems.”

Heating the nanotubes in a vacuum above 200 degrees Celsius (392 degrees Fahrenheit) reduced surface contamination, but not enough to eliminate inconsistent results, they found. Argon ion bombardment also cleaned the tubes but led to an increase in defects that degrade conductivity.

Ultimately the researchers discovered vacuum annealing nanotubes at 500 degrees Celsius (932 Fahrenheit) reduced contamination enough to measure resistance accurately.

Barron said engineers who use nanotube fibers or films in devices currently modify the material through doping or other means to get the conductive properties they require. But if the source nanotubes are sufficiently decontaminated, they should be able to get the desired conductivity by simply putting their contacts in the right spot.

“A key result of our work is that if contacts on a nanotube are less than 1 micron apart, the electronic properties of the nanotube change from conductor to semiconductor, due to the presence of overlapping depletion zones, which shrink but are still present even in clean nanotubes,” Barron said.

“This has a potential limiting factor on the size of nanotube-based electronic devices,” he said. “Carbon-nanotube devices would be limited in how small they could become, so Moore’s Law would only apply to a point.”

Through three quarters of calendar year 2017, market shares of top semiconductor equipment manufacturers indicate large gains by Tokyo Electron and Lam Research, according to the report “Global Semiconductor Equipment: Markets, Market Shares, Market Forecasts,” recently published by The Information Network, a New Tripoli-based market research company.

The chart below shows shares for the entire year of 2016 and for the first three quarters of 2017. Market shares are for equipment only, excluding service and spare parts, and have been converted for revenues of foreign companies to U.S. dollars on a quarterly exchange rate.

equipment shares

Market leader Applied Materials lost 1.3 share points, dropping from 28.2% in 2016 to 26.9% YTD (year to date). Gaining share are Tokyo Electron Ltd. (TEL), which gained 2.4 share points while rising from 17.0% in 2016 to 19.4% in 2017 YTD. Lam Research gained 1.6 share points and growing from a 19.0% share in 2016 to a 20.6% share in 2017 YTD.

On a competitive basis, Applied Materials competes against both competitors in conductor and dielectric etch equipment and in deposition equipment (atomic layer deposition [ALD] and non-tube low pressure chemical vapor deposition [LPCVD]). TEL also competes against Screen Semiconductor Solutions, which dropped 1.4 share points, in photoresist track and wet clean equipment.

According to SEMI, the industry consortium, semiconductor equipment grew 41% in 2017.

Scientists at Tokyo Institute of Technology (Tokyo Tech) and their research team involving researchers of JASRI, Osaka University, Nagoya Institute of Technology, and Nara Institute of Science and Technology have just developed a novel approach to determine and visualize the three-dimensional (3D) structure of individual dopant atoms using SPring-8. The technique will help improve the current understanding of the atomic structures of dopants in semiconductors correlated with their electrical activity and thus help support the development of new manufacturing processes for high-performance devices.

Using a combination of spectro-photoelectron holography, electrical property measurements, and first-principles dynamics simulations, the 3D atomic structures of dopant impurities in a semiconductor crystal were successfully revealed. The need for a better understanding of the atomic structures of dopants in semiconductors had been long felt, mainly because the current limitations on active dopant concentrations result from the deactivation of excess dopant atoms by the formation of various types of clusters and other defect structures.

Soft X-rays excite the core level electrons, leading to the emission of photoelectrons from various atoms, whose waves are then scattered by the surrounding atoms. The interference pattern between the scattered and direct photoelectron waves creates the photoelectron hologram, which may then be captured with an electron analyzer. Credit: Nano Letters

Soft X-rays excite the core level electrons, leading to the emission of photoelectrons from various atoms, whose waves are then scattered by the surrounding atoms. The interference pattern between the scattered and direct photoelectron waves creates the photoelectron hologram, which may then be captured with an electron analyzer. Credit: Nano Letters

The search for techniques to electrically activate the dopant impurities in semiconductors with high efficiency and/or at high concentrations have always been an essential aspect of semiconductor device technology. However, despite various successful developments, the achievable maximum concentration of active dopants remains limited. Given the impact of the dopant atomic structures in this process, these structures had been previously investigated using both theoretical and experimental approaches. However, direct observation of the 3D structures of the dopant atomic arrangements had hitherto been difficult to achieve.

In this study, Kazuo Tsutsui at Tokyo Tech and colleagues involving researchers at JASRI, Osaka University, Nagoya Institute of Technology, and Nara Institute of Science and Technology developed spectro-photoelectron holography using SPring-8, and leveraged the capabilities of photoelectron holography in determining the concentrations of dopants at different sites, based on the peak intensities of the photoelectron spectrum, and classified electrically active / inactive atomic sites. These structures directly related with the density of carriers. In this approach, soft X-ray excitation of the core level electrons leads to the emission of photoelectrons from various atoms, whose waves are then scattered by the surrounding atoms. The resulting interference pattern creates the photoelectron hologram, which may then be captured with an electron analyzer. The photoelectron spectra acquired in this manner contain information from more than one atomic site. Therefore, peak fitting is performed to obtain the photoelectron hologram of individual atomic sites. The combination of this technique with first-principles simulations allows the successful estimation of the 3D structure of the dopant atoms, and the assessment of their different chemical bonding states. The method was used to estimate the 3D structures of arsenic atoms doped onto a silicon surface. The obtained results fully demonstrated the power of the proposed method and allowed confirmation of several previous results.

This work demonstrates the potential of spectro-photoelectron holography for the analysis of impurities in semiconductors. This technique allows analyses that are difficult to perform with conventional approaches and should therefore be useful in the development of improved doping techniques and, ultimately, in supporting the manufacture of high-performance devices.