Category Archives: Device Architecture

eVaderis, a semiconductor IP start-up that provides design solutions to improve the functionality, power efficiency and performance of its customers’ semiconductor chips, has successfully demonstrated a fully functioning design platform through an ultra-low-power microcontroller (MCU) in Beyond Semiconductor‘s BA2X product line. The software, system and memory IP developed by eVaderis make Beyond Semiconductor’s new MCU ideally suited for battery-powered applications in IoT and wearable electronics.

By incorporating the latest perpendicular, spin-transfer-torque magnetoresistive random-access memory (STT-MRAM) technology from international R&D institute Imec, Beyond Semiconductor’s new MCU can achieve non-volatile operation with high-speed read/write and low voltage. In addition, the device is designed for manufacturability using GLOBALFOUNDRIES’ 40-nm low-power CMOS production process.

“The tape-out of this innovative MRAM-based, memory-centric MCU demonstrates our proficiency in disruptive, non-volatile embedded IP design and flow for low-power, digital devices,” said Virgile Javerliac, deputy CEO and head of technology and marketing at eVaderis. “We now plan to license the underlying IP to semiconductor manufacturers making sub-40-nm chips.”

“Power consumption is still the key challenge for any battery-powered device,” said Matjaz Breskvar, Beyond Semiconductor’s CEO. “We have been working with eVaderis since the company’s inception to jointly realize a vision of battery-powered, always-on devices with unprecedented energy efficiencies.”

Three megabits (3 Mb) of on-chip memory are fully distributed across the system though different instances, covering different functions such as working memory, configuration, state retention, code execution and data storage. eVaderis’ memory IP architectures are built to be compiler-friendly, helping chip makers to achieve faster time to market.

eVaderis’ innovative memory-centric architecture based on embedded MRAM technology allows a MCU to achieve power, performance and functional gains at the system and software levels. These gains include for instance energy-efficient, non-volatile checkpointing or normally-off/instant-on operation with near zero latency boot.

SEMI today announced the appointment of Masahiko (Jim) Hamajima as president of SEMI Japan. Reporting to SEMI president and CEO Ajit Manocha, Hamajima assumes profit and loss (P&L) responsibility for SEMI Japan and leadership of SEMICON Japan along with all regional programs, events, and initiatives including SEMI Standards and industry advocacy. With more than 325 members, SEMI Japan plays a critical role in SEMI’s global industry association, representing more than 2,000 companies worldwide in the electronics manufacturing supply chain.

With all-time records expected in 2017 for global semiconductor revenue at $400 billion (USD), semiconductor equipment revenue at $56 billion (USD), and semiconductor materials revenue at $48 billion (USD), Japan is an essential global player and has seen very strong recent growth.  Japan supplies nearly one-third of the world’s semiconductor equipment and more than half all wafer fab materials. As semiconductor manufacturing continues its strong global growth, SEMI Japan role in connecting SEMI member companies in Japan with opportunities to collaborate and innovate with companies worldwide will take on increasing importance in enabling members’ growth and prosperity.

“With his long leadership experience at TEL, the largest semiconductor equipment company in Japan (and in the top-five globally), Jim understands the challenges and opportunities facing Japan as the global electronics manufacturing supply chain expands and evolves,” said Ajit Manocha, president and CEO of SEMI.  “Jim’s solid track record in heading ambitious business transformations makes him the ideal choice to lead SEMI Japan in SEMI’s 2.0 initiative. Jim will drive critical initiatives such as workforce development, greater environmental health and safety (EH&S) intensity, and new vertical application collaborations – like Smart Data and Smart Transportation that sharpen the industry’s focus on Artificial Intelligence (AI) and Machine Learning.”

Hamajima brings more than 30 years’ experience in the semiconductor equipment industry in Japan and the U.S. and a comprehensive understanding of the global industry.  Starting at Tokyo Electron Ltd. (TEL) in diffusion, Hamajima later held vice president positions overseeing multiple product lines at Tokyo Electron America and later for Cleaning Systems in Japan. Hamajima’s experience includes leading complex integrations as senior vice president at Timbre Technologies and as vice president and general manager at TEL-FSI. Prior to joining SEMI, Hamajima served as vice president and general manager of Corporate Strategy at TEL. Hamajima holds a Bachelor of Science degree in Metallurgy from the Nagoya Institute of Technology.

“I would also like to thank Osamu Nakamura for his important contributions, first as a SEMI Japan Regional Advisory Board member, later as a SEMI International BOD member and most recently as president of SEMI Japan, culminating in the very successful SEMICON Japan 2017 in mid-December,” commented Manocha. “I appreciate Osamu remaining as an advisor through the next several months to ensure a smooth transition and wish him a very happy retirement.”

 

Qualcomm Incorporated (NASDAQ: QCOM) (“Qualcomm” or the “Company”) today announced that the Qualcomm Board of Directors, following the recommendation of the Board’s Governance Committee, has unanimously determined not to nominate any of the 11 candidates assembled by Broadcom Limited (NASDAQ: AVGO) and Silver Lake Partners to replace Qualcomm’s current directors at Qualcomm’s 2018 Annual Meeting of Stockholders.  Qualcomm today also filed its preliminary proxy statement with the U.S. Securities and Exchange Commission in connection with Qualcomm’s upcoming 2018 Annual Meeting.

After a thorough review of the Broadcom-Silver Lake nominees, the Governance Committee concluded that these nominees are inherently conflicted and would not bring incremental skills or expertise to the Qualcomm Board. Qualcomm’s Board is nominating its 11 incumbent directors for re-election at the 2018 Annual Meeting: Barbara T. Alexander, Jeffrey W. Henderson, Thomas W. Horton, Dr. Paul E. Jacobs, Ann M. Livermore, Harish Manwani, Mark D. McLaughlin, Steve Mollenkopf, Clark T. Randt, Jr., Dr. Francisco Ros and Anthony J. “Tony” Vinciquerra.

Qualcomm’s existing Board has a deep understanding of the global IP/licensing and semiconductor business and relevant adjacent industries, and has overseen the design and execution of Qualcomm’s strategy, including driving its leadership in mobile, IoT, automotive, edge computing and networking, as well as the coming transition to 5G. Qualcomm’s Board remains focused on driving profitable growth and maximizing value for all stockholders.

Broadcom and Silver Lake are asking Qualcomm stockholders to turn over control of their Company now to the hand-picked Broadcom-Silver Lake nominees based on a proposal that dramatically undervalues Qualcomm and is not actionable due to its significant regulatory uncertainty, which may not be resolved for 18 months, if ever, and lack of committed financing.  Broadcom has made no commitments to resolve the serious regulatory issues inherent in its proposal.

Qualcomm’s Board is committed to maintaining best-in-class corporate governance. Qualcomm directors are elected annually and 9 of the 11 directors are independent, including 4 directors added in the last 3 years.  The incumbent directors have a mix of industry perspectives, operating and financial expertise, corporate restructuring experience and IP/licensing expertise, as well as a long history of collaborative stockholder engagement, all of which collectively drive performance and stockholder value.

Detailed information about Qualcomm’s director nominees is included in the Company’s preliminary proxy statement. Also included is a “Background to the Solicitation” section, which details all interactions between Qualcomm and Broadcom relating to Broadcom’s unsolicited acquisition proposal.

United Microelectronics Corporation (NYSE:UMC;TWSE:2303) (“UMC”), a global semiconductor foundry, today announced the availability of the company’s 40nm process platform that incorporates Silicon Storage Technology’s (SST) embedded SuperFlash non-volatile memory. The newly available 40nm SST process features a >20% reduction in eFlash cell size and 20-30% macro area over UMC’s mass production 55nm SST technology. Toshiba Electronic Devices & Storage Corporation has started studying technical feasibility of UMC’s 40nm SST for their microcontroller (MCU) ICs.

“We expect that UMC’s 40nm SST will improve the performance of our MCU products,” said Toshiya Matsui, Vice President, Mixed Signal IC Division of Toshiba Electronic Devices & Storage Corporation “Working with UMC will also allow us to maintain a robust business continuity plan (BCP) through stable manufacturing supply and flexible capacity support based on our production requirements.”

More than 20 customers and products are in various stages of 55nm SST eFlash production at UMC, including those for SIM card, banking, automotive, IOT, MCU and other applications.

Wenchi Ting, Associate VP of Specialty Technology division at UMC said, “Since qualifying SST’s embedded flash technology on our popular 55nm process in 2015, we have received tremendous interest from customers looking to further utilize the low power, high reliability, superior data retention and high endurance characteristics of this process platform for their automotive, industrial, consumer and IoT applications. We are pleased to introduce this eNVM solution on our 40nm platform, and look forward to bringing the high speed and high reliability benefits of SST to Toshiba and our other foundry customers.”

UMC’s robust SST process performs according to JEDEC standards, with 100k endurance and more than 10 years of data retention at 85C and an operating-temperature range of -40C to 125C. In addition to the 40nm SST process, UMC has over 20 customers in production using the foundry’s 55nm SST for a broad range of product applications.

JEDEC Solid State Technology Association, a leader in standards development for the microelectronics industry, announces the successful launch of its newest committee: JC-70 Wide Bandgap Power Electronic Conversion Semiconductors. JC-70 held its first meeting in late October with twenty-three member companies, led by committee and subcommittee chairs from Infineon Technologies, Texas Instruments, Transphorm, and Wolfspeed, a Cree Company. Committee members include industry leaders in power GaN and SiC semiconductors as well as prospective users of WBG power semiconductors and T&M equipment manufacturers. Global multinational corporations and technology startups from the US, Europe, and Asia are working together to bring to the industry a set of standards for reliability, testing, and parametrics of WBG power semiconductors.

JC-70 has two subcommittees, which are focusing on Silicon Carbide (SiC) and Gallium Nitride (GaN) as the most mature wide bandgap (WBG) power semiconductor materials. Both SiC and GaN offer immense potential for enabling higher performance, more compact, and energy efficient power systems. Industry interest in JC-70 has been high with several new members joining the committee after the first meeting, underscoring the importance of creating universal standards to help advance the adoption of WBG power technologies.

“I am delighted by the initial response to the JC-70 committee, and look forward to welcoming additional companies to participate in developing standards for wide bandgap power technology,” said John Kelly, JEDEC President. “Broad industry participation will help ensure the resulting documents meet the needs of product designers as they create systems to enable a more energy efficient future.”

Four committee meetings are planned for 2018, including a webconference on January 25 and a meeting co-located with the APEC Conference on March 5. Interested companies worldwide are welcome to join JEDEC to participate in this important standardization effort.Contact Emily Desjardins ([email protected]) for more information or visit www.jedec.org.

Samsung Electronics Co., Ltd. announced today that it has begun mass producing the industry’s first 2nd-generation of 10-nanometer class (1y-nm), 8-gigabit (Gb) DDR4. For use in a wide range of next-generation computing systems, the new 8Gb DDR4 features the highest performance and energy efficiency for an 8Gb DRAM chip, as well as the smallest dimensions.

Samsung_1y-nm_8Gb_DDR4_Chp+Mod

“By developing innovative technologies in DRAM circuit design and process, we have broken through what has been a major barrier for DRAM scalability,” said Gyoyoung Jin, president of Memory Business at Samsung Electronics. “Through a rapid ramp-up of the 2nd-generation 10nm-class DRAM, we will expand our overall 10nm-class DRAM production more aggressively, in order to accommodate strong market demand and continue to strengthen our business competitiveness.”

Samsung’s 2nd-generation 10nm-class 8Gb DDR4 features an approximate 30 percent productivity gain over the company’s 1st-generation 10nm-class 8Gb DDR4. In addition, the new 8Gb DDR4’s performance levels and energy efficiency have been improved about 10 and 15 percent respectively, thanks to the use of an advanced, proprietary circuit design technology. The new 8Gb DDR4 can operate at 3,600 megabits per second (Mbps) per pin, compared to 3,200 Mbps of the company’s 1x-nm 8Gb DDR4.

To enable these achievements, Samsung has applied new technologies, without the use of an EUV process. The innovation here includes use of a high-sensitivity cell data sensing system and a progressive “air spacer” scheme.

In the cells of Samsung’s 2nd-generation 10nm-class DRAM, a newly devised data sensing system enables a more accurate determination of the data stored in each cell, which leads to a significant increase in the level of circuit integration and manufacturing productivity.

The new 10nm-class DRAM also makes use of a unique air spacer that has been placed around its bit lines to dramatically decrease parasitic capacitance**. Use of the air spacer enables not only a higher level of scaling, but also rapid cell operation.

With these advancements, Samsung is now accelerating its plans for much faster introductions of next-generation DRAM chips and systems, including DDR5, HBM3, LPDDR5 and GDDR6, for use in enterprise servers, mobile devices, supercomputers, HPC systems and high-speed graphics cards.

Samsung has finished validating its 2nd-generation 10nm-class DDR4 modules with CPU manufacturers, and next plans to work closely with its global IT customers in the development of more efficient next-generation computing systems.

In addition, the world’s leading DRAM producer expects to not only rapidly increase the production volume of the 2nd-generation 10nm-class DRAM lineups, but also to manufacture more of its mainstream 1st-generation 10nm-class DRAM, which together will meet the growing demands for DRAM in premium electronic systems worldwide.

Electronics manufacturing executives will sharpen their competitive edge in Dublin, Ireland, on 4-6 March at Europe’s SEMI Industry Strategy Symposium (ISS Europe). The three-day flagship business event brings together analysts, researchers, economists, technologists and industry leaders for critical insights into the forces shaping the electronics manufacturing supply chain. With Europe a key engine of global innovation and the supply chain, ISS Europe 2018 takes aim at helping European organisations find new ways to maximise competitive advantage.

“Organisations operating in Europe need to find the most effective way to innovate, manufacture and profit by leveraging their strengths in the global supply chain,” said Laith Altimime, president, SEMI Europe. “During ISS Europe 2018, hosted by SEMI Europe, top European companies, research institutes and public institutions will convene to discuss how to compete and win globally in the context of Europe’s strategic, economic and social needs.”

ISS Europe 2018 discussions will focus on successful manufacturing in Europe and mechanisms to support innovation. The speaker lineup includes:

  • David Bloss, VP, Technology Manufacturing Group, Intel
  • Holger Blume, professor, University of Hanover
  • Jean-Frederic Clerc, deputy CEO and CTO, CEA Tech
  • Kevin Cooney, senior VP and managing director, Global CIO, Xilinx EMEA
  • Jean-Christophe Eloy, CEO, Yole Développement
  • Ann-Charlotte Johannesson, CEO, CEI-Europe AB
  • Cheryl Miller, founder/executive director, Digital Leadership Institute
  • Michael Morris, director AMBER Research Centre, professor, Trinity College Dublin
  • Alain Mutricy, senior VP product management, GLOBALFOUNDRIES
  • James O’Riordan, CTO, S3 Group
  • David Sneddon, director of large customer sales for Central Europe, Google
  • Florien van der Windt, Cluster Manager Smart Mobility, Dutch Ministry of Infrastructure & Environment
  • Hanns Windele, vice president, Europe and India, Mentor Graphics, a Siemens Business

The Panel Discussion “Critical Strategies to Grow Europe in the Global Supply Chain” will highlight ISS Europe 2018 as participants take advantage of great networking opportunities such as an opening reception and a gala dinner announcing the 2017 European Award winner.

Join Europe’s strategic thinkers and business drivers at ISS Europe 2018 in Dublin, Ireland from March 4-6, 2018.

In today’s “internet of things,” devices connect primarily over short ranges at high speeds, an environment in which surface acoustic wave (SAW) devices have shown promise for years, resulting in the shrinking size of your smartphone. To obtain ever faster speeds, however, SAW devices need to operate at higher frequencies, which limits output power and can deteriorate overall performance. A new SAW device looks to provide a path forward for these devices to reach even higher frequencies.

A team of researchers in China has demonstrated a SAW device that can achieve frequencies six times higher than most current devices. With embedded interdigital transducers (IDTs) on a layer of combined aluminum nitride and diamond, the team’s device was also able to boost output significantly. Their results are published this week in Applied Physics Letters, from AIP Publishing.

“We have found the acoustic field distribution is quite different for the embedded and conventional electrode structures,” said Jinying Zhang, one of the paper’s authors. “Based on the numerical simulation analysis and experimental testing results, we found that the embedded structures bring two benefits: higher frequency and higher output power.”

Surface acoustic wave devices transmit a high-frequency signal by converting electric energy to acoustic energy. This is often done with piezoelectric materials, which are able to change shape in the presence of an electric voltage. IDT electrodes are typically placed on top of piezoelectric materials to perform this conversion.

Ramping up the operational frequency of IDTs — and the overall signal speed — has proven difficult. Most current SAW devices top out at a frequency of about 3 gigahertz, Zhang said, but in principle it is possible to make devices that are 10 times faster. Higher frequencies, however, demand more power to overcome the signal loss, and in turn, some features of the IDTs need to be increasingly small. While a 30 GHz device could transmit a signal more quickly, its operational range becomes limited.

“The major challenge is still the fabrication of the IDTs with such small feature sizes,” Zhang said. “Although we made a lot of efforts, there are still small gaps between the side walls of the electrodes and the piezoelectric materials.”

To ensure that the transducers had the proper feature size, Zhang’s team needed a material with a high acoustic velocity, such as diamond. They then coupled diamond, a material that changes its shape very little with electric voltage, with aluminum nitride, a piezoelectric material, and embedded the IDT inside their new SAW device.

The resulting device operated at a frequency of 17.7 GHz and improved power output by 10 percent compared to conventional devices using SAWs.

“The part which surprised us most is that the acoustic field distribution is quite different for the embedded and conventional electrode structures,” Zhang said. “We had no idea at all about it before.”

Zhang said she hopes this research will lead to SAW devices used in monolithic microwave integrated circuits (MMICs), low-cost, high-bandwidth integrated circuits that are seeing use in a variety of forms of high speed communications, such as cell phones.

EPC announces the EPC2049 power transistor for use in applications including point of load converters, LiDAR, envelope tracking power supplies, class-D audio, and low inductance motor drives. The EPC2049 has a voltage rating of 40 V and maximum RDS(on) of 5 mΩ with a 175 A pulsed output current.

The chip-scale packaging of The EPC2049 handles thermal conditions far better than the plastic packaged MOSFETs since the heat is dissipated directly to the environment with chip-scale devices, whereas the heat from the MOSFET die is held within a plastic package. It measures a mere 2.5 mm x 1.5 mm (3.75 mm2). Designers no longer have to choose between size and performance – they can have both!

“The EPC2049 demonstrates how EPC and gallium nitride transistor technology is increasing the performance and reducing the cost of eGaN devices. The EPC2049 is further evidence that the performance and cost gap of eGaN technology with MOSFET technology continues to widen,” said Alex Lidow, EPC’s co-founder and CEO.

Cypress Semiconductor Corp. (Nasdaq: CY) today announced the appointment of Jeannine Sargent to its board of directors. Sargent brings 30 years of experience encompassing leadership, operations, marketing and engineering roles within a diverse mix of high tech component and systems companies across multiple industries. As part of her responsibilities on Cypress’ board, she will serve on the company’s Compensation Committee.

In her most recent role as President of Innovation and New Ventures at Flex, a leading contract design, engineering and manufacturing company, Sargent led the fastest growing and highest margin design-enabled business, which was at the core of Flex’s long-term strategic growth plan. Prior to this, she served as president of Flex’s Energy business, which she helped build into a global multi-billion-dollar industry leader focusing on renewable energy, smart grid and solid-state lighting technologies, products and services. In her career, Sargent has served as CEO at both Oerlikon Solar, a thin-film silicon solar photovoltaic (PV) module manufacturer, and Voyan Technology, an embedded systems software provider to the communications and semiconductor industries. She currently serves on several investment and advisory boards and is on the board of trustees at Northeastern University.

“Jeannine Sargent is another excellent addition to Cypress’ board,” said Steve Albrecht, Cypress’ chairman. “She strengthens our team with the depth of her experience in growing innovative and profitable systems businesses at the forefront of emerging, high tech industries. I’m excited for her valuable contributions toward supporting the management team as they continue executing our strategy to become the leading embedded system solutions supplier in high-growth segments including Automotive, Industrial and applications across the IoT.”

Sargent holds a B.S. in chemical engineering from Northeastern University and certificates from the executive development programs at the MIT Sloan School of Management, Harvard University and Stanford University.