Category Archives: Device Architecture

Broadcom Limited (NASDAQ: AVGO) (“Broadcom”), a semiconductor device supplier to the wired, wireless, enterprise storage, and industrial end markets, today announced that it has completed its acquisition of Brocade Communications Systems, Inc. (NASDAQ: BRCD).

Brocade’s common stock will now cease to be traded on NASDAQ. Brocade will operate as an indirect subsidiary of Broadcom and will be led by Jack Rondoni as General Manager. Previously, Rondoni served as Senior Vice President of Storage Networking at Brocade, having joined the company in 2006. Rondoni brings over 20 years of experience in storage, networking and technology.

“We are pleased to complete this transaction, which strengthens Broadcom’s position as a leading provider of enterprise storage and networking solutions and enables us to better serve our OEM customers,” said Hock Tan, President and Chief Executive Officer of Broadcom. “Broadcom has a track record of successfully integrating and growing companies we acquire, enabling us to offer customers a leading portfolio of best-in-class franchises across a diverse set of technologies. We intend to invest in and grow the Brocade business to further enhance its capabilities in mission-critical storage networking.”

Tan continued, “We are pleased to announce Jack’s appointment as General Manager, and would like to welcome the outstanding team of employees at Brocade to the Broadcom family. Together, we will continue to exceed the expectations of our customers.”

“We are very excited to join the Broadcom team and provide compelling benefits for customers and new opportunities for Brocade’s employees,” said Jack Rondoni, General Manager, Brocade business unit. “Broadcom provides us with the scale, resources and complementary capabilities to accelerate growth, execute on our strategic initiatives and extend our market leadership in storage area networking. We share a common culture of innovation and execution, and we look forward to the exciting new growth opportunities we will have as part of the Broadcom team.”

Crosstalk and noise can become a major source of reliability problems of CNT based VLSI interconnects in the near future. Downscaling of component size in integrated circuits (ICs) to nanometer scale coupled with high density integration makes it challenging for researchers to maintain signal integrity in ICs. There are high chances of occurrence of crosstalk between adjacent wires. This crosstalk in turn, will increase the peak noise in the transient signals that pass through the interconnects. As multiple occurrences of crosstalk happen, the noise propagates through multiple stages of wires and the problem worsens to logic failure.

But thanks to semiconducting CNTs, which till now have found applications in the fabrication of futuristic field effect transistors, when placed around an interconnect, can reduce crosstalk to a large extent. Basically, semiconducting CNTs are non-conducting, have small dielectric constant, medium to large band gaps and hence can act as insulating shields to electric fields.

As semiconducting CNTs are one dimensional nanowires, they have very high anisotropic properties along their axis as well as their radius. The dielectric polarizability, which is the measure of number of polarizable bonds in a material, is found to be very smaller along the CNT radius compared to its axis. So, semiconducting CNTs are less polarizable along their radius which further suggests that they have small dielectric constants. The famous Clausius-Mossotti relation can be used to derive the dielectric constant from the dielectric polarizability. Further, this relation also tells that the dielectric constant of a CNT increases with its radius. So, obviously small diameter semiconducting CNTs are the ideal candidates as the low-k dielectric medium between two CNT interconnects.

The contact geometry is modified in such a way that more metal atoms are present at the centre where metallic CNTs are present. The contact has lesser number of metal atoms at the periphery where semiconducting CNTs are present. This helps in building a Schottky barrier at the contact semiconducting CNT interface and hence, inhibits any carrier movement.

Finally, experimental results show that the radial dielectric constant can be as low as 2.82 if (2,2) CNTs are used as shields. The coupling capacitance between adjacent wires is dependent on the interconnect thickness as well as the semiconducting CNT shield thickness. Crosstalk between CNT wires can be reduced by 28% if semiconducting CNTs are used. The crosstalk induced peak noise was also found to be 25% lesser for semiconducting CNT shielded interconnects at different input voltages of 0.8V, 0.5V and 0.3V.

For the first time, physicists have developed a technique that can peer deep beneath the surface of a material to identify the energies and momenta of electrons there.

The energy and momentum of these electrons, known as a material’s “band structure,” are key properties that describe how electrons move through a material. Ultimately, the band structure determines a material’s electrical and optical properties.

The team, at MIT and Princeton University, has used the technique to probe a semiconducting sheet of gallium arsenide, and has mapped out the energy and momentum of electrons throughout the material. The results are published today in the journal Science.

By visualizing the band structure, not just at the surface but throughout a material, scientists may be able to identify better, faster semiconductor materials. They may also be able to observe the strange electron interactions that can give rise to superconductivity within certain exotic materials.

“Electrons are constantly zipping around in a material, and they have a certain momentum and energy,” says Raymond Ashoori, professor of physics at MIT and a co-author on the paper. “These are fundamental properties which can tell us what kind of electrical devices we can make. A lot of the important electronics in the world exist under the surface, in these systems that we haven’t been able to probe deeply until now. So we’re very excited — the possibilities here are pretty vast.”

Ashoori’s co-authors are postdoc Joonho Jang and graduate student Heun Mo Yoo, along with Loren Pfeffer, Ken West, and Kirk Baldwin, of Princeton University.

Pictures beneath the surface

To date, scientists have only been able to measure the energy and momentum of electrons at a material’s surface. To do so, they have used angle-resolved photoemission spectroscopy, or ARPES, a standard technique that employs light to excite electrons and make them jump out from a material’s surface. The ejected electrons are captured, and their energy and momentum are measured in a detector. Scientists can then use these measurements to calculate the energy and momentum of electrons within the rest of the material.

“[ARPES] is wonderful and has worked great for surfaces,” Ashoori says. “The problem is, there is no direct way of seeing these band structures within materials.”

In addition, ARPES cannot be used to visualize electron behavior in insulators — materials within which electric current does not flow freely. ARPES also does not work in a magnetic field, which can greatly alter electronic properties inside a material.

The technique developed by Ashoori’s team takes up where ARPES leaves off and enables scientists to observe electron energies and momenta beneath the surfaces of materials, including in insulators and under a magnetic field.

“These electronic systems by their nature exist underneath the surface, and we really want to understand them,” Ashoori says. “Now we are able to get these pictures which have never been created before.”

Tunneling through

The team’s technique is called momentum and energy resolved tunneling spectroscopy, or MERTS, and is based on quantum mechanical tunneling, a process by which electrons can traverse energetic barriers by simply appearing on the other side — a phenomenon that never occurs in the macroscopic, classical world which we inhabit. However, at the quantum scale of individual atoms and electrons, bizarre effects such as tunneling can occasionally take place.

“It would be like you’re on a bike in a valley, and if you can’t pedal, you’d just roll back and forth. You would never get over the hill to the next valley,” Ashoori says. “But with quantum mechanics, maybe once out of every few thousand or million times, you would just appear on the other side. That doesn’t happen classically.”

Ashoori and his colleagues employed tunneling to probe a two-dimensional sheet of gallium arsenide. Instead of shining light to release electrons out of a material, as scientists do with ARPES, the team decided to use tunneling to send electrons in.

The team set up a two-dimensional electron system known as a quantum well. The system consists of two layers of gallium arsenide, separated by a thin barrier made from another material, aluminum gallium arsenide. Ordinarily in such a system, electrons in gallium arsenide are repelled by aluminum gallium arsenide, and would not go through the barrier layer.

“However, in quantum mechanics, every once in a while, an electron just pops through,” Jang says.

The researchers applied electrical pulses to eject electrons from the first layer of gallium arsenide and into the second layer. Each time a packet of electrons tunneled through the barrier, the team was able to measure a current using remote electrodes. They also tuned the electrons’ momentum and energy by applying a magnetic field perpendicular to the tunneling direction. They reasoned that those electrons that were able to tunnel through to the second layer of gallium arsenide did so because their momenta and energies coincided with those of electronic states in that layer. In other words, the momentum and energy of the electrons tunneling into gallium arsenide were the same as those of the electrons residing within the material.

By tuning electron pulses and recording those electrons that went through to the other side, the researchers were able to map the energy and momentum of electrons within the material. Despite existing in a solid and being surrounded by atoms, these electrons can sometimes behave just like free electrons, albeit with an “effective mass” that may be different than the free electron mass. This is the case for electrons in gallium arsenide, and the resulting distribution has the shape of a parabola. Measurement of this parabola gives a direct measure of the electron’s effective mass in the material.

Exotic, unseen phenomena

The researchers used their technique to visualize electron behavior in gallium arsenide under various conditions. In several experimental runs, they observed “kinks” in the resulting parabola, which they interpreted as vibrations within the material.

“Gallium and arsenic atoms like to vibrate at certain frequencies or energies in this material,” Ashoori says. “When we have electrons at around those energies, they can excite those vibrations. And we could see that for the first time, in the little kinks that appeared in the spectrum.”

They also ran the experiments under a second, perpendicular magnetic field and were able to observe changes in electron behavior at given field strengths.

“In a perpendicular field, the parabolas or energies become discrete jumps, as a magnetic field makes electrons go around in circles inside this sheet,” Ashoori says.

“This has never been seen before.”

The researchers also found that, under certain magnetic field strengths, the ordinary parabola resembled two stacked donuts.

“It was really a shock to us,” Ashoori says.

They realized that the abnormal distribution was a result of electrons interacting with vibrating ions within the material.

“In certain conditions, we found we can make electrons and ions interact so strongly, with the same energy, that they look like some sort of composite particles: a particle plus a vibration together,” Jang says.

Further elaborating, Ashoori explains that “it’s like a plane, traveling along at a certain speed, then hitting the sonic barrier. Now there’s this composite thing of the plane and the sonic boom. And we can see this sort of sonic boom — we’re hitting this vibrational frequency, and there’s some jolt happening there.”

The team hopes to use its technique to explore even more exotic, unseen phenomena below the material surface.

“Electrons are predicted to do funny things like cluster into little bubbles or stripes,” Ashoori says. “These are things we hope to see with our tunneling technique. And I think we have the power to do that.”

SkyWater Technology Foundry announces that it has been assigned the Specialty Foundry customer relationships from Cypress Semiconductor Corporation. The customer relationships were already being serviced within SkyWater’s 200mm semiconductor wafer manufacturing facility when purchased from Cypress earlier this year. Through the transaction, SkyWater assumes ownership of Cypress’ current embedded Specialty Foundry customer engagements and adds associated business management personnel.

“This transaction builds upon the concept of a Technology Foundry, which enables customers to design, build, and scale their products by simplifying the realization of complex technologies through access to semiconductor technology, experienced personnel and volume manufacturing capabilities,” said SkyWater Chairman of the Board Gary Obermiller. “The addition of the Specialty Foundry customers is synergistic with our pure-play Technology Foundry model; customers come to us with their ideas and we transform them into practice through the application of our differentiated semiconductor technology and operational expertise.”

The Technology Foundry Business model enables customers to design and optimize their product concepts. In tandem with SkyWater’s advanced wafer manufacturing facility, customers are able to prototype and rapidly scale to production volumes, all inside of a high-yield production fab.

“The Specialty Foundry Business was created in 2008 with the vision of providing advanced development access to a high-volume production-scale fab, building on the site’s proven track record of success in bringing new technologies to production,” said Michael Moore, executive vice president of Sales and Marketing at SkyWater. “It’s in our DNA. We’ve been doing development work at this site for decades, right alongside production.  This move is a natural next step for the company and our customers.  We have successfully diversified the customer base this way, by serving new and unique markets that are poised for rapid growth.”

As part of the assignment, which closed October 2, SkyWater will now have direct responsibility for all Specialty Foundry Business customers, eliminating the prior Cypress interface. Because of the existing working relationship between all parties, there will be a seamless transition for all current projects; the same team will continue working with all existing customers, the only difference being that they are now SkyWater employees.

Within SkyWater’s manufacturing facility there are a wide variety of unique technologies currently being developed and manufactured – from superconducting quantum computers to advanced technology Readout IC’s (ROIC), MEMS-based infrared imagers, DNA sequencing and fabrication platforms, and photonic integrated circuit (PIC) devices.

According to SkyWater’s Senior Director of Sales Brad Ferguson, “These types of Technology engagements just start with a simple conversation about our capabilities, and once Customers see the potential of our Technology Foundry solution, they realize this is the right place to transform their concepts into a manufactured product.”

SkyWater is a U.S.-based technology foundry specializing in the development and manufacturing of a wide variety of semiconductor based solutions.

The Semiconductor Industry Association (SIA) today announced the SIA Board of Directors has elected Matt Murphy, president and CEO of Marvell Semiconductor, Inc. (NASDAQ: MRVL), as its 2018 Chair and Sanjay Mehrotra, president and CEO of Micron Technology, Inc. (NASDAQ: MU), as its 2018 Vice Chair.

SIA Matt Murphy headshot

“It is a great pleasure to welcome Matt Murphy as SIA’s 2018 Chair and Sanjay Mehrotra as SIA’s Vice Chair,” said John Neuffer, SIA President and CEO. “Matt is a strong leader, an industry veteran, and an outstanding champion for SIA and our industry. An engineer by trade, Sanjay is a mainstay in our industry and a respected voice on semiconductor technology. Together, their skills and accomplishments will be a major asset to advancing SIA’s priorities in Washingtonand around the world.”

Murphy has led Marvell since joining the company in July 2016, and serves as a member of the company’s board of directors. Since that time, he has led the company’s turnaround and reestablished Marvell as a leading innovator in storage and networking technology.

Prior to joining Marvell, Murphy spent over two decades at Maxim Integrated, most recently as Executive Vice President of Business Units and Sales & Marketing, overseeing all product development and go-to-market activities. Previously, Murphy managed the company’s Communications & Automotive Solutions Group, led Worldwide Sales & Marketing, and served in a range of other business unit management positions.

“Few technologies have impacted the modern world more than semiconductors, and we’re now entering an era that promises even greater change,” said Murphy. “However, progress isn’t guaranteed unless the United States does more to support research, boost competitiveness, and promote global trade. As 2018 SIA Chair, I look forward to working with my colleagues to champion these priorities.”

Mehrotra joined Micron in May 2017, after a long and distinguished career at SanDisk Corporation where he led the company from a start-up in 1988 until its eventual sale in 2016. In addition to being a SanDisk co-founder, Mr. Mehrotra served as its President and CEO from 2011 to 2016, overseeing its growth to a Fortune 500 company.

Prior to SanDisk, Mr. Mehrotra held design engineering positions at Integrated Device Technology, Inc., SEEQ Technology and Intel Corporation. Mehrotra earned both bachelor’s and master’s degrees in electrical engineering and computer science from the University of California, Berkeley. He holds more than 70 patents and has published articles on nonvolatile memory design and flash memory systems.

“Semiconductor technology has revolutionized our society and transformed our economy,” said Mehrotra. “The success of our industry is driven, in part, by our unity of purpose. Working together through SIA, we can ensure continued U.S. leadership in semiconductor manufacturing, design, and research. I look forward to helping lead that effort as 2018 SIA Vice Chair.”

For the first time ever, SEMICON Southeast Asia (SEMICON SEA), the region’s premier gathering of the industry connecting people, products, technologies and solutions across the electronics manufacturing supply chain, will be held in Kuala Lumpur. Taking place 8 to 10 May 2018, the conference will debut in the newly constructed Malaysia International Trade and Exhibition Centre (MITEC). With more than 85 percent of the exhibition space already sold, SEMICON SEA 2018 will represent companies from Southeast Asia, China, Taiwan, Europe and the U.S.  More than 300 companies will exhibit and as many as 8,000 visitors from 15 countries are expected to participate in SEMICON SEA. Organised by SEMI, SEMICON SEA 2018 theme will be “Think Smart Make Smart.”

The Southeast Asia region is a world-class electronics manufacturing hub with end-to-end R&D capabilities, and SEMICON SEA 2018 is the comprehensive platform for the electronics industry in the region. The event will feature three themed pavilions, five country pavilions, keynote presentations, and forums that will address critical trending topics within the semiconductor eco-system. The show will connect decision makers from the industry, demonstrate the most advanced products, and provide the most up-to-date market and technology trends.

Ng Kai Fai, president of SEMI Southeast Asia says, “The growth of SEMICON Southeast Asia is attributed to the rapid expansion and robust growth of the Electrical & Electronics (E&E) sector across Southeast Asia, with companies emerging as world leaders in mobile, automotive, medical and Internet of Things (IoT) supply chains. As one of the high-growth markets in the region, Malaysia contributes 44 percent of the total manufacturing output and 26 percent of the total Gross Domestic Product of the region and is forecasted to generate approximately US$ 382 billion in exports in 2018.”

Over the past three years, SEMICON SEA has become the annual gathering of the full regional supply chain. SEMICON SEA 2018 will feature a supplier search programme to encourage cross-border business matching as well as a technology start-up platform which will bring together Southeast Asia technology entrepreneurial resources. In conjunction with SEMICON SEA 2018, this event will also include the SEMICON University Programme which aims to encourage and promote STEM (Science, Technology, Engineering, and Mathematics) interest amongst young talent and will also include a job fair.

IC Insights has revised its outlook for semiconductor industry capital spending and will present its new findings in the November Update to The McClean Report 2017, which will be released at the end of this month.  IC Insights’ latest forecast now shows semiconductor industry capital spending climbing 35% this year to $90.8 billion.

After spending $11.3 billion in semiconductor capex last year, Samsung announced that its 2017 outlays for the semiconductor group are expected to more than double to $26 billion.  Bill McClean, president of IC Insights stated, “In my 37 years of tracking the semiconductor industry, I have never seen such an aggressive ramp of semiconductor capital expenditures.  The sheer magnitude of Samsung’s spending this year is unprecedented in the history of the semiconductor industry!”

Figure 1 shows Samsung’s capital spending outlays for its semiconductor group since 2010, the first year the company spent more than $10 billion in capex for the semiconductor segment.  After spending $11.3 billion in 2016, the jump in capex expected for this year is simply amazing.

To illustrate how forceful its spending plans are, IC Insights anticipates that Samsung’s semiconductor capex of $8.6 billion in 4Q17 will represent 33% of the $26.2 billion in total semiconductor industry capital spending for this quarter.  Meanwhile, the company is expected to account for about 16% of worldwide semiconductor sales in 4Q17.

IC Insights estimates that Samsung’s $26 billion in semiconductor outlays this year will be segmented as follows:

3D NAND flash: $14 billion (including an enormous ramp in capacity at its Pyeongtaek fab)

DRAM: $7 billion (for process migration and additional capacity to make up for capacity loss due to migration)

Foundry/Other: $5 billion (for ramping up 10nm process capacity)

annual samsung capex

IC Insights believes that Samsung’s massive spending outlays this year will have repercussions far into the future. One of the effects likely to occur is a period of overcapacity in the 3D NAND flash market. This overcapacity situation will not only be due to Samsung’s huge spending for 3D NAND flash, but also to its competitors in this market segment (e.g., SK Hynix, Micron, Toshiba, Intel, etc.) responding to the company’s spending surge.  At some point, Samsung’s competitors will need to ramp up their capacity or loose market share.

Samsung’s current spending spree is also expected to just about kill any hopes that Chinese companies may have of becoming significant players in the 3D NAND flash or DRAM markets.  As our clients have been aware of for some time, IC Insights has been extremely skeptical about the ability of new Chinese startups to compete with Samsung, SK Hynix, and Micron with regards to 3D NAND and DRAM technology.  This year’s level of spending by Samsung just about guarantees that without some type of joint venture with a large existing memory suppler, new Chinese memory startups stand little chance of competing on the same level as today’s leading suppliers.

SUNY Polytechnic Institute (SUNY Poly) is hosting the 11th IEEE Nanotechnology Symposium at its world-class Albany NanoTech Complex on Wednesday, November 15, from 9 a.m. to 5:30 p.m., with support from sponsors IEEE and the Electron Devices Society, as well as from donors IBM and GlobalFoundries.

The symposium will feature keynotes and presentations on topics from computational health, silicon photonics, spintronics, and packaging to advances in quantum computing devices and architecture. In addition, a number of technical leaders will be recognized with awards for their contributions toward the introduction of copper (Cu) interconnects to the semiconductor industry, including Dr. Dan Edelstein, IBM Fellow and one of the pioneers of this advancement.

In addition to the award recipients from IBM and GlobalFoundries, guests of honor include:

  • Mukesh Khare (Vice President, Semiconductor Technology Research, IBM);
  • Bahgat Sammakia (Interim President, SUNY Poly);
  • T.C. Chen (Vice President Science & Technology, IBM Fellow, IBM);
  • Bijan Davari (Vice President, Next Generation Computing Systems and Technology, IBM Fellow, IBM);
  • George Gomba (Vice President, Technology Research, GLOBALFOUNDRIES);
  • Thomas N. Theis (Executive Director, Columbia Nano Initiative, Columbia University); and
  • Kang-ill Seo (Vice President, R & D, Samsung Semiconductor Inc.).

A link to more information about the symposium, as well as an agenda, can be found here: http://albanynanotechnology.org/

SEMICON Europa 2017 will take place in Munich from 14 to 17 November, co-located with productronica. Consistent with SEMI’s theme “Connect, Collaborate, and Innovate,” co-locating SEMICON Europa with productronica gathers the full span of electronics manufacturing and end-products, creating the largest European electronics platform ever. More than 400 exhibitors will present their products and innovations at SEMICON Europa 2017. Over 40,000 attendees are expected at the co-located events.

After a period of slow growth, Europe’s semiconductor manufacturers are investing in new construction of 300mm fabs in Germany, Italy and France. Four semiconductor and MEMS manufacturers have announced investments in Europe totaling more than $10 billion. Bosch will build a new fab in Dresden; ST Microelectronics is planning two new 300mm fabs in Agrate and Crolles; and GLOBALFOUNDRIES and Infineon plan to expand their production capacity.

“The global industry will invest more than US$100 billion in equipment and materials this year. Forecasts for 2017 also predict that semiconductor manufacturers worldwide will exceed $400 billion in revenue ─ a new record,” says Ajit Manocha, president and CEO of SEMI.  “An unprecedented number of new inflections and applications will broadly expand the digital economy and drive increasing silicon content — in areas including IoT, assisted driving in automotive, Artificial Intelligence (AI), Big Data, and 5G. Assuming an average 7 percent CAGR, global chip sales could approach $1 trillion by 2030, and equipment and materials spending could similarly grow to nearly a quarter of a trillion dollars.”

The market segments in which European companies hold strong market positions also shape the conference program of SEMICON Europa 2017. More than 250 presentations, 50 conferences and high-caliber discussions provide an overview of current trends. Key issues this year include: materials, semiconductor manufacturing, advanced packaging, MEMS/sensors, power electronics, flexible and printed electronics. The focus is also on important applications such as the Internet of Things (IoT) and artificial intelligence (AI), smart manufacturing (“Industry 4.0”), automotive electronics and medical technology.

The Opening Ceremony will include a welcome speech by Ajit Manocha, president and CEO of SEMI,followed by Laith Altimime, president, SEMI Europe, plus four keynotes:

  • Bosch Sensortec: Stefan Finkbeiner, CEO, on how environmental sensing can contribute to a better quality of life in the context of the IoT
  • Rinspeed Inc.: Frank M. Rinderknecht, founder and CEO, on how to create innovative technologies, materials and mobility means of tomorrow
  • SOITEC: Carlos Mazure, CTO, executive VP, on contributions and benefits of engineered substrates solutions and thin-layer transfer technologies, focusing on applications in the smart space
  • TSMC Europe: Maria Marced, president, on opportunities for new business models to apply in the Smart City

On the exhibition show floor, the TechARENA free sessions are a highlight with the SEMI China Innovation and Investment Forum and the INNOVATION VILLAGE.

GLOBALFOUNDRIES and Fudan Microelectronics Group today announced they have produced a next generation dual interface CPU card, using GF’s 55nm Low Power Extended (55LPx) technology platform. GF’s 55LPx platform has the capability to integrate multiple functions onto a single chip that results in a secure, low power, and cost effective solution uniquely suited for the Chinese bank card market, including financial, social security, transportation, healthcare, and mobile payment applications.

Fudan’s dual interface CPU card, FM1280, supports both contact and contactless modes of communication, and shares a low power CPU that automatically selects the desired interface. The non-contact interface utilizes GF’s readily available and silicon-proven 55LPx RF IP. Fudan’s FM1280 also uses the embedded EEPROM-based on Silicon Storage Technology (SST) SuperFlash® memory technology to ensure user code and data security.

“With the increasing usage of smart bank cards, and in order to maintain our leadership position in this market, a solution with low power consumption was critical,” said Shen Lei, VP of Technology Engineering at Fudan.  “Our FM1280 card offers lower power consumption, enhanced reliability, and uses an advanced process node. GF’s advanced platform, 55LPx, with its low power logic and highly reliable embedded non-volatile memory, is ideal for our next generation bank card offering. Fudan is pleased to continue our long-standing relationship with GF to manufacture our industry leading products.”

The 55nm LPx platform provides a fast path-to-product solution, and includes SST’s SuperFlash® memory technology, which is fully qualified for consumer, industrial and automotive applications. GF’s 55LPx implementation of SuperFlash offers a small bitcell size, very fast read speed, and superior data retention and endurance.

“GF is delighted to expand our relationship with Fudan Microelectronics, who is the acknowledged leader in the Chinese smart card industry,” said Dave Eggleston, vice president of Embedded Memory at GF. “Fudan joins our rapidly growing customer base for GF’s 55LPx platform, which offers a superior combination of low power logic, embedded non-volatile memory and RF IP for the smart card, wearable IoT, industrial MCU and automotive markets.”

GF’s 55LPx-enabled platform is in volume production at the foundry’s 300mm line in Singapore. GF has previously announced that On Semiconductor and Silicon Mobility are currently using GF’s 55LPx platform for wearable IoT and automotive products.