Category Archives: Device Architecture

NXP Semiconductors N.V. (NASDAQ:NXPI) announced that it had received the 2017 Excellence in Quality award from Cisco.

This prestigious award recognizes NXP for Excellence in Quality for displaying the highest quality standards, practices, and methodologies in their products and processes, and differentiating through their quality management systems and alignment to Cisco’s strategies and values.

The distinction was awarded during Cisco’s 26th Annual Supplier Appreciation Event, held August 31 at the Santa Clara Convention Center in California.

“The theme this year for our Supplier Appreciation event is ‘Connecting the Unconnected: Transforming to the Digital Supply Chain,’ which highlights our laser focus on enabling break-through value in operational commitments and customer satisfaction through digital orchestration,” said Jeff Gallinat, senior vice president, Global Manufacturing Operations, Cisco.

“As we continue on our digitization journey, our strong relationships and close collaboration with our supplier and partner ecosystem will continue to play a critical role in our continued innovation, productivity and ultimately success.”

Cisco presented awards to its partners and suppliers in recognition of their contributions to Cisco’s success in the fiscal year 2017.  At the event, Cisco celebrated the collective achievements of its most strategic suppliers and partners, and reaffirmed its commitment to a strong, continued partnership that will further accelerate innovation, alignment and operational excellence.

Columbia Engineering researchers, led by Harish Krishnaswamy, associate professor of electrical engineering, in collaboration with Professor Andrea Alu’s group from UT-Austin, continue to break new ground in developing magnet-free non-reciprocal components in modern semiconductor processes. At the IEEE International Solid-State Circuits Conference in February, Krishnaswamy’s group unveiled a new device: the first magnet-free non-reciprocal circulator on a silicon chip that operates at millimeter-wave frequencies (frequencies near and above 30GHz). Following up on this work, in a paper (DOI 10.1038/s41467-017-00798-9) published today in Nature Communications, the team demonstrated the physical principles behind the new device.

Most devices are reciprocal: signals travel in the same manner in forward and reverse directions. Nonreciprocal devices, such as circulators, on the other hand, allow forward and reverse signals to traverse different paths and therefore be separated. Traditionally, nonreciprocal devices have been built from special magnetic materials that make them bulky, expensive, and not suitable for consumer wireless electronics.

The team has developed a new way to enable nonreciprocal transmission of waves: using carefully synchronized high-speed transistor switches that route forward and reverse waves differently. In effect, it is similar to two trains approaching each other at super-high speeds that are detoured at the last moment so that they do not collide.

The key advance of this new approach is that it enables circulators to be built in conventional semiconductor chips and operate at millimeter-wave frequencies, enabling full-duplex or two-way wireless. Virtually all electronic devices currently operate in half-duplex mode at lower radio-frequencies (below 6GHz), and consequently, we are rapidly running out of bandwidth. Full-duplex communications, in which a transmitter and a receiver of a transceiver operate simultaneously on the same frequency channel, enables doubling of data capacity within existing bandwidth. Going to the higher mm-wave frequencies, 30GHz and above, opens up new bandwidth that is not currently in use.

“This gives us a lot more real estate,” notes Krishnaswamy, whose Columbia High-Speed and Mm-wave IC (CoSMIC) Lab has been working on silicon radio chips for full duplex communications for several years. His method enables loss-free, compact, and extremely broadband non-reciprocal behavior, theoretically from DC to daylight, that can be used to build a wide range of non-reciprocal components such as isolators, gyrators, and circulators.

“This mm-wave circulator enables mm-wave wireless full-duplex communications, Krishnaswamy adds, “and this could revolutionize emerging 5G cellular networks, wireless links for virtual reality, and automotive radar.”

The implications are enormous. Self-driving cars, for instance, require low-cost fully-integrated millimeter-wave radars. These radars inherently need to be full-duplex, and would work alongside ultra-sound and camera-based sensors in self-driving cars because they can work in all weather conditions and during both night and day. The Columbia Engineering circulator could also be used to build millimeter-wave full-duplex wireless links for VR headsets, which currently rely on a wired connection or tether to the computing device.

“For a smooth wireless VR experience, a huge amount of data has to be sent back and forth between the computer and the headset requiring low-latency bi-directional communication,” says Krishnaswamy. “A mm-wave full-duplex transceiver enabled by our CMOS circulator could be a promising solution as it has the potential to deliver high speed data with low latency, in a small size with low cost.”

The team, funded by sources including the National Science Foundation EFRI program, the DARPA SPAR program, and Texas Instruments, is currently working to improve the linearity and isolation performance of their circulator. Their long-term goal is to build a large-scale mm-wave full-duplex phased array system that uses their circulator.

Global power semiconductor revenues grew year-over-year by 3.9 percent in 2016, reversing a 4.8 percent decline in 2015, according to a recent report from business information provider IHS Markit (Nasdaq: INFO).

All categories of power semiconductors (power discretes, power modules, and power integrated circuits) were up for the year, with the discretes market seeing the biggest jump. Sales in all regions increased, with China revenues topping the list. IHS Markit expects the market to grow by 7.5 percent in 2017, to $38.3 bill and achieve yearly increases through 2021.

Automotive and industrial lead the way

The automotive and industrial segments were particularly strong in 2016, with power semis in automotive growing by 7.0 percent and industrial by 5.0 percent. Advanced driver assistance systems (ADAS) – such as blind-spot detection, collision avoidance, and adaptive cruise control – are moving from luxury to mid-level vehicles, driving double digit increases for power semiconductors in that category.

Power semiconductors, especially power modules and discretes also saw sharp gains as the number of cars equipped with inverter systems for advanced start/stop and hybrid powertrains increased. In particular, power modules for cars and light trucks jumped 29.3 percent in 2016.

In the broad industrial sector the drive for energy efficiency improvement led to growth in renewable energy (solar and wind inverters), building and home control, and factory automation applications. Revenues from home appliances in the consumer segment also grew nicely as advanced motor control systems found their way into white goods, fans, kitchen, and cleaning products.

Despite good gains, other categories were flat to down. Power module sales for industrial motor drives, a large sub-segment, slid 1.1 percent and modules for traction applications were down 17.5 percent for the year.  Power ICs for consumer application declined 4.9 percent while power discretes for lighting applications were off 2.7 percent.

Growth to continue

“The industry megatrends of vehicle electrification, advanced vehicle safety, energy efficiency and connected everything will continue to drive growth over the next five years,” said Kevin Anderson, senior analyst, power management for IHS Markit. “IHS Markit predicts that the compound-average annual growth rate (CAGR) from 2016 – 2021 will be 4.8 percent.  Regionally, the highest growth is projected in China, at 6.0 percent CAGR, followed closely by the rest of Asia including Taiwan, Europe, Middle East and Africa, and the Americas – all with projected growth over 5 percent.”

IC Insights recently released its September Update to The McClean Report.  This 32-page Update included a detailed look at the pure-play foundry market.  Shown below is an excerpt from the Update.

With the rise of fabless IC companies in China, demand for foundry services in that country has also increased.  Figure 1 shows IC Insights’ listing of the top pure-play foundries and their sales to China in 2016 and a forecast for 2017.  In total, pure-play foundry sales in China are expected to jump by 16% this year to about $7.0 billion, more than double the rate of increase for the total pure-play foundry market.  As shown, only about 10% of TSMC’s sales are forecast to go into China in 2017, yet the company is expected to hold the largest share of the China foundry market this year with a 46% share, up two percentage points from 2016.

Figure 1

Figure 1

The Chinese foundry market represented 11% of the total pure-play foundry market in 2015, 12% in 2016, and is forecast to hold a 13% share this year.  As a result of this growth, most pure-play foundries have made plans to locate or expand IC production in mainland China over the next few years. TSMC, GlobalFoundries, UMC, Powerchip, and, most recently, TowerJazz have announced plans to boost their China-based wafer fabrication production.  Most of these new China-based foundry wafer fabs are scheduled to come online in late 2017 or in 2018.  UMC began 40nm production at its 300mm joint venture China fab in November of 2016 and the company is planning to introduce 28nm technology into the fab in the second half of this year with additional expansion plans to come through the end of the decade.

It is well known that China is striving to develop an indigenous semiconductor industry but gaining access to the manufacturing technology has become increasingly difficult.  As a result, many China IC companies and government entities have structured joint ventures or partnerships with foundry companies in order to access leading manufacturing technology.  The partnerships give Chinese companies much needed access to production capacity using first-rate manufacturing technology and provide the foundries with an ongoing market presence and revenue stream within China.

Examples of pure-play foundries that are working to set up new manufacturing plants in China include,

•    UMC is working with Fujian Jin Hua IC Company to construct a 300mm wafer fab in Fujian, China to manufacture DRAM using 32nm process technology developed by UMC.

•    GlobalFoundries joined with the Chengdu Government in 1Q17 to begin building a 300mm wafer fab that will manufacture ICs using mainstream 130nm and 180nm processes.  Completion is set for early 2018.

•    TSMC started construction on a wholly owned $3 billion fab in Nanjing, China that will serve as a foundry that manufactures ICs using 16nm technology.  Production is scheduled to begin in 2H18.

•    TowerJazz signed an agreement with Tacoma Semiconductor to construct a 200mm wafer fab, also in Nanjing, China.  TowerJazz will have access to 50% of the capacity.  Tacoma is responsible for the entire investment of the project.

Advanced Linear Devices Inc. (ALD), a designer of analog semiconductors, today announced a zero-gate threshold voltage EPAD P-Channel MOSFET Array launching the industry’s first precision sub-threshold circuit. The MOSFET currently has the industry’s lowest operating voltage of 0.2 Volt (V) and current of less than one nano amp (nA). These chips enable the operating regions required for the next generations of development in energy harvesting, Internet of Things (IoT) sensors applications.

The ALD310700A/ALD310700 quad zero threshold MOSFET is intended for the development of small signal precision applications utilizing 0.00V Zero Threshold Voltage. The circuit is ideal for designs requiring very low operating voltages of < +0.5V power supplies. Allowing circuits to operate in the subthreshold region for the first time ever, expands the MOSFET’s operating range into never-before achieved signal levels.

The new MOSFET simplifies circuit biasing schemes and reduces component counts while providing greater precision and sensitivity of sensor applications for IoT engineers. The P-Channel MOSFET can work in conjunction with ALD N-Channel Zero Threshold MOSFET devices in matched sensor applications. The ALD310700A/ALD310700 is the P-channel version of the popular ALD110800A/ALD110800 Precision Zero Threshold N-channel device. Together, these two MOSFET series deliver complementary precision performance. These complementary paired devices enable the design of 0.5% precision current mirrors, current sources, and circuits referenced to power or ground sources including differential amplifier input stages, transmission gates and multiplexers.

Notable device features

  •     Precision offset voltages (VOS): 2mV max.; 10mV max.;
  •     Low minimum operating voltage of less than 0.2V;
  •     Ultra-low minimum operating current of less than 1nA:
  •     Matched and tracked temperature characteristics.

“These devices operate at a point with 100 times lower power than comparable MOSFET arrays. More importantly they enable the next generation of applications at power levels and precision that were impossible until now,” said Robert Chao, President, and Founder, Advanced Linear Devices Inc. “These arrays offer circuit designers working on IoT nodes that require matched sensor activity a method to collect power from supercapacitors or deep cycle batteries.”

As an example, some potential energy harvesting sources, such as thermal electric generators that yield just 0.2V, produce such low levels of energy that they are barely useful for driving power in electronic circuitry. The ALD P-Channel Zero-Threshold (VGS(th)=0.00) EPAD MOSFET arrays can be coupled with a low voltage step-up converter to give low-level power sources a greater range as an energy harvesting source.

This device is available in a quad version and is a member of the EPAD® Matched Pair MOSFET Family. The parts can be ordered directly from ALD or DigiKey and Mouser. Prices start at $2.00 at 100 pieces.

The Semiconductor Industry Association (SIA) today announced worldwide sales of semiconductors reached $35.0 billion for the month of August 2017, an increase of 23.9 percent compared to the August 2016 total of $28.2 billion and 4.0 percent more than the July 2017 total of $33.6 billion. All major regional markets posted both year-to-year and month-to-month increases in August, and the Americas market led the way with growth of 39.0 percent year-to-year and 8.8 percent month-to-month. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“Global semiconductor sales were up significantly in August, increasing year-to-year for the thirteenth consecutive month and reaching $35 billion for the first time,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Sales in August increased across the board, with every major regional market and semiconductor product category posting gains on a month-to-month and year-to-year basis. Memory products continue be a major driver of overall market growth, but sales were up even without memory in August.”

Year-to-year sales increased in the Americas (39.0 percent), China (23.3 percent), Asia Pacific/All Other (19.5 percent), Europe (18.8 percent), and Japan (14.3 percent). Month-to-month sales increased in the Americas (8.8 percent), China (3.7 percent), Japan (2.8 percent), Asia Pacific/All Other (2.2 percent), and Europe (0.6 percent).

“With about half of global market share, the U.S. semiconductor industry is the worldwide leader, but U.S. companies face intense global competition,” said Neuffer. “To allow our industry to continue to grow and innovate here at home, policymakers in Washington should enact corporate tax reform that makes the U.S. tax system more competitive with other countries. The corporate tax reform framework released last week by leaders in Congress and the Trump Administration is an important step forward. We look forward to working with policymakers to enact corporate tax reform that strengthens our industry and the U.S. economy.”

Aug 2017

Billions

Month-to-Month Sales                              

Market

Last Month

Current Month

% Change

Americas

6.94

7.55

8.8%

Europe

3.20

3.22

0.6%

Japan

3.04

3.13

2.8%

China

10.68

11.08

3.7%

Asia Pacific/All Other

9.77

9.98

2.2%

Total

33.63

34.96

4.0%

Year-to-Year Sales                         

Market

Last Year

Current Month

% Change

Americas

5.43

7.55

39.0%

Europe

2.71

3.22

18.8%

Japan

2.73

3.13

14.3%

China

8.99

11.08

23.3%

Asia Pacific/All Other

8.35

9.98

19.5%

Total

28.22

34.96

23.9%

Three-Month-Moving Average Sales

Market

Mar/Apr/May

Jun/Jul/Aug

% Change

Americas

6.27

7.55

20.5%

Europe

3.11

3.22

3.8%

Japan

2.95

3.13

6.0%

China

10.25

11.08

8.1%

Asia Pacific/All Other

9.43

9.98

5.9%

Total

31.99

34.96

9.3%

A team of University of Wisconsin–Madison engineers has created the most functional flexible transistor in the world — and with it, a fast, simple and inexpensive fabrication process that’s easily scalable to the commercial level.

It’s an advance that could open the door to an increasingly interconnected world, enabling manufacturers to add “smart,” wireless capabilities to any number of large or small products or objects — like wearable sensors and computers for people and animals — that curve, bend, stretch and move.

Literal flexibility may bring the power of a new transistor developed at UW–Madison to digital devices that bend and move. PHOTO COURTESY OF JUNG-HUN SEO, UNIVERSITY AT BUFFALO, STATE UNIVERSITY OF NEW YORK

Literal flexibility may bring the power of a new transistor developed at UW–Madison to digital devices that bend and move. PHOTO COURTESY OF JUNG-HUN SEO, UNIVERSITY AT BUFFALO, STATE UNIVERSITY OF NEW YORK

Transistors are ubiquitous building blocks of modern electronics. The UW–Madison group’s advance is a twist on a two-decade-old industry standard: a BiCMOS (bipolar complementary metal oxide semiconductor) thin-film transistor, which combines two very different technologies — and speed, high current and low power dissipation in the form of heat and wasted energy — all on one surface.

As a result, these “mixed-signal” devices (with both analog and digital capabilities) deliver both brains and brawn and are the chip of choice for many of today’s portable electronic devices, including cellphones.

“The industry standard is very good,” says Zhenqiang (Jack) Ma, the Lynn H. Matthias Professor and Vilas Distinguished Achievement Professor in electrical and computer engineering at UW–Madison. “Now we can do the same things with our transistor — but it can bend.”

Ma is a world leader in high-frequency flexible electronics. He and his collaborators described their advance in the inaugural issue of the journal npj Flexible Electronics, published Sept. 27.

Making traditional BiCMOS flexible electronics is difficult, in part because the process takes several months and requires a multitude of delicate, high-temperature steps. Even a minor variation in temperature at any point could ruin all of the previous steps.

Ma and his collaborators fabricated their flexible electronics on a single-crystal silicon nanomembrane on a single bendable piece of plastic. The secret to their success is their unique process, which eliminates many steps and slashes both the time and cost of fabricating the transistors.

“In industry, they need to finish these in three months,” he says. “We finished it in a week.”

He says his group’s much simpler high-temperature process can scale to industry-level production right away.

“The key is that parameters are important,” he says. “One high-temperature step fixes everything — like glue. Now, we have more powerful mixed-signal tools. Basically, the idea is for flexible electronics to expand with this. The platform is getting bigger.”

His collaborators include Jung-Hun Seo of the University at Buffalo, State University of New York; Kan Zhang of UW–Madison; and Weidong Zhou of the University of Texas at Arlington.

A sea of spinning electrons


October 3, 2017

Picture two schools of fish swimming in clockwise and counterclockwise circles. It’s enough to make your head spin, and now scientists at Rutgers University-New Brunswick and the University of Florida have discovered the “chiral spin mode” – a sea of electrons spinning in opposing circles.

“We discovered a new collective spin mode that can be used to transport energy or information with very little energy dissipation, and it can be a platform for building novel electronic devices such as computers and processors,” said Girsh Blumberg, senior author of the study and a professor in the Department of Physics and Astronomy in Rutgers’ School of Arts and Sciences.

Collective chiral spin modes are propagating waves of electron spins that do not carry a charge current but modify the “spinning” directions of electrons. “Chiral” refers to entities, like your right and left hands, that are matching but asymmetrical and can’t be superimposed on their mirror image.

The study, led by Hsiang-Hsi (Sean) Kung, a graduate student in Blumberg’s Rutgers Laser Spectroscopy Lab, was published in Physical Review Letters. Kung used a custom-made, ultra-sensitive spectrometer to study a prototypical 3D topological insulator. A microscopic theoretical model that predicts the energy and temperature evolution of the chiral spin mode was developed by Saurabh Maiti and Professor Dmitrii Maslov at the University of Florida, strongly substantiating the experimental observation.

The blue and red cones show the energy and momentum of surface electrons in a 3D topological insulator. The spin structure is shown in the blue and red arrows at the top and bottom, respectively. Light promotes electrons from the blue cone into the red cone, with the spin direction flipping. The orderly spinning leads to the chiral spin mode observed in this study. Credit: Hsiang-Hsi (Sean) Kung/Rutgers University-New Brunswick

The blue and red cones show the energy and momentum of surface electrons in a 3D topological insulator. The spin structure is shown in the blue and red arrows at the top and bottom, respectively. Light promotes electrons from the blue cone into the red cone, with the spin direction flipping. The orderly spinning leads to the chiral spin mode observed in this study.
Credit: Hsiang-Hsi (Sean) Kung/Rutgers University-New Brunswick

In a vacuum, electrons are simple, boring elementary particles. But in solids, the collective behavior of many electrons interacting with each other and the underlying platform may result in phenomena that lead to new applications in superconductivity, magnetism and piezoelectricity (voltage generated via materials placed under pressure), to name a few. Condensed matter science, which focuses on solids, liquids and other concentrated forms of matter, seeks to reveal new phenomena in new materials.

Silicon-based electronics, such as computer chips and computers, are one of the most important inventions in human history. But silicon leads to significant energy loss when scaled down. One alternative is to harness the spins of electrons to transport information through extremely thin wires, which in theory would slash energy loss.

The newly discovered “chiral spin mode” stems from the sea of electrons on the surface of “3D topological insulators.” These special insulators have nonmagnetic, insulating material with robust metallic surfaces, and the electrons are confined so they move only on 2D surfaces.

Most importantly, the electrons’ spinning axes are level and perpendicular to their velocity. Chiral spin modes emerge naturally from the surface of such insulating materials, but they were never observed before due to crystalline defects. The experimental observation in the current study was made possible following the development of ultra-clean crystals by Rutgers doctoral student Xueyun Wang and Board of Governors Professor Sang-Wook Cheong in the Rutgers Center for Emergent Materials.

The discovery paves new paths for building next generation low-loss electronic devices.

By Dr. Jeongdong Choe, Senior Technical Fellow, TechInsights

There has been a great deal of speculation around the composition of Intel’s Optane™ XPoint memory technology: PCM or ReRAM, selector, layouts, patterning technology, technology node, multi-stacked cell structure, die floor plan, interconnection to each electrode (wordlines and bitlines), functional blocks, scalability and process integration.

TechInsights set about to find answers. We have analyzed Optane’s memory cell structure, materials, cell array and memory peripheral array design, layouts, process flow and circuitry. Our Advanced CMOS Essential (ACE) analyses on Intel’s XPoint memory presents our complete findings and market trend predictions. The following paragraphs present some of the highlights.

Intel XPoint memory is based on PCM and selector memory (storage) cell elements. GST-based PCM, Ge-Se-As-Si based Ovonic Threshold Switch (OTS) and two memory cell stacked array architecture are common across Intel’s and Micron’s XPoint technologies.

We examined effective memory cell area efficiency vs. memory array efficiency, and compared it to current DRAM and NAND products. In our previous analysis on XPoint memory die, we found that memory density per die is 0.62 Gb/mm2 and memory efficiency is over 91%. The memory array efficiency, however, may not represent the reality because the memory peripheral and CMOS circuitry cover most of the die area.

We can define the effective cell area efficiency as a ratio of the real area of the cell memory elements (storage) to the total die area. For example, the effective memory cell area efficiency on Toshiba 15 nm 2D planar NAND is 43.9% due to excluding BC, CSL, SSL, GSL dummy wordlines and peripheral area on a die, while memory array efficiency is 72%. Figure 1 shows comparison of the effective memory cell area efficiency for 2D/3D NAND products from Toshiba/SanDisk (Western Digital), Micron/Intel, SK Hynix and Samsung, and 3D XPoint (OptaneTM from Intel).

Figure 1. A comparison of effective memory cell area efficiency on 2D/3D NAND and XPoint memory

Figure 1. A comparison of effective memory cell area efficiency on 2D/3D NAND and XPoint memory

When it comes to the effective unit cell size per 1 bit, NAND flash devices have been scaled down from 2D NAND (320 nm2) to 48L 3D NAND (145.8 nm2) or even to 64L 3D NAND (88.5 nm2) for Toshiba NAND products, while Intel OptaneTM two cell stacked XPoint memory has 800 nm2 (effectively 2F2) (Figure 2).

Figure 2. A comparison of effective unit cell area per bit on 2D/3D NAND and XPoint memory

Figure 2. A comparison of effective unit cell area per bit on 2D/3D NAND and XPoint memory

A comparison of memory density with DRAM products shown in Figure 3 illustrates that XPoint has higher memory density (0.62 Gb/mm2) than Samsung 1x nm (0.19 Gb/mm2), SK Hynix 2y nm (0.15 Gb/mm2) and Micron 20 nm (0.094 Gb/mm2) DRAM dice. Micron announced that the memory density of XPoint would be ten times higher than commercial DRAM products. This is true if we compare it with 30 nm class DRAM products, because most of the 30 nm class DRAM products from major DRAM manufacturers have 0.06 Gb/mm2 memory density. The first commercial XPoint memory die has three times (vs. Samsung 1x DRAM) or six times (vs. Micron 20 nm DRAM) higher memory density than those of current DRAM products.

Figure 3. A comparison of die size and memory density on DRAM (25nm/20nm/18nm) and XPoint memory

Figure 3. A comparison of die size and memory density on DRAM (25nm/20nm/18nm) and XPoint memory

We found that Intel introduced some innovative and compelling technologies on their first XPoint products such as PCM/OTS stack used for memory elements, GST based PCM, Ge-Se-As-Si based OTS and carbon based conductor and 2-bit cell stacked memory array with three electrodes. Intel successfully used a 20nm SADP double patterning technology to build a very uniform GST-based PCM/OTS memory square/island. Complete details on the of TechInsights’ XPoint memory analysis can be found here.

Click here to hear more from Dr. Choe and his TechInsights colleagues on 3D NAND.

Today, SEMI announced the lineup of keynotes coming to SEMICON Japan’s “SuperTHEATER” ─ focusing on the future of the electronics manufacturing supply chain. SEMICON Japan 2017, the largest exhibition in Japan for electronics manufacturing, will take place at Tokyo Big Sight in Tokyo on December 13-15. Registration is now open for the exhibition and programs.

With the theme “Dreams Start Here,” SEMICON Japan 2017 will bring together the connections between people, technologies and businesses across the electronics manufacturing supply chain ─ extending to the internet of things (IoT) applications that inspire the dreams that shape the future.

Japan has the world’s third-largest 300mm wafer installed fab capacity and the world’s largest 200mm and smaller wafer fab capacity (including discrete devices production). Japan also supplies one third of the semiconductor equipment and more than half of the semiconductor materials that are purchased in the global market.

The SuperTHEATER offers nine keynote forums, all with simultaneous English-Japanese translation. On December 13, keynotes at SEMICON Japan’s SuperTHEATER include:

  • Opening Keynotes ─ Visions of the Game Changing Era
    • Soft Bank:  Ken Miyauchi, president and CEO, “The Information Revolution beyond the Singularity”
    • Qualcomm Technologies: Raj Talluri, senior VP of product management, “Qualcomm Viewpoint: Accelerating the Internet of Things”
       
  • Semiconductor Executive Forum ─ Growth Strategy in New Business Environment
    • TowerJazz Semiconductor: Russell Ellwanger, CEO, “Value Creation”
    • SMIC: Haijun Zhao, CEO, “Considerations in Developing Manufacturable IC Technologies”
    • Micron Technology: Wayne Allan, senior VP of global manufacturing, “Enabling Smart Manufacturing in Today’s Industry 4.0”

The SEMI Market Forum, also on December 13, will offer presentations from IHS Markit and SEMI, with the theme “In the Light and Shadow of Awaking China”

Additional SEMICON Japan 2017 highlights include:

  • IT/AI Forum on U.S. companies’ artificial intelligence strategies
  • IoT Global Trends Forum on semiconductors for IoT
  • IoT Key Technology Forum on Smart Transportation
  • Manufacturing Innovation Forum n “Manufacturing Technology for the Diversified Future”
  • Electronics Trends
  • Mirai (the Future) Vision

 

For more information and to register for SEMICON Japan, visit www.semiconjapan.org/en/