Category Archives: Device Architecture

By Yoichiro Ando, SEMI Japan

Shinzo Abe, the prime minister of Japan, plans to stage a Robot Olympics in 2020 alongside the summer Olympic Games to be hosted in Tokyo. Abe said he wants to showcase the latest global robotics technology, an industry in which Japan has long been a pioneer. Japan’s Robot Strategy developed by the Robot Revolution Initiative Council plans to increase Japanese industrial robot sales to 1.2 trillion JPY by 2020. This article discusses how the robotics industry is not just a key pillar of Japan’s growing strategy but also a key application segment that may lead Japan’s semiconductor industry growth.

Japan leads robotics industry

According to International Federation of Robotics (IFR), the 2015 industrial robot sales increased by 15 percent to 253,748 units compared to the 2014 sales. Among the 2015 record sales, Japanese companies shipped 138,274 units that represent 54 percent of the total sales according to Japan Robot Association (JARA). The robotics companies in Japan include Yaskawa Electric, Fanuc, Kawasaki Heavy Industries, Fujikoshi and Epson.

Source: International Federation of Robotics (global sales) and Japan Robot Association (Japan shipment)

Source: International Federation of Robotics (global sales) and Japan Robot Association (Japan shipment)

The automotive industry was the most important customer of industrial robots in 2015 that purchased 97,500 units or 38 percent of the total units sold worldwide. The second largest customer was the electrical/electronics industry (including computers and equipment, radio, TV and communication devices, medical equipment, precision and optical instruments) that showed significant growth of 41 percent to 64,600 units.

Semiconductors devices used in robotics industry

Robotics needs semiconductor devices to improve both performance and functionality. As the number of chips used in a robot increases and more advanced chips are required, the growing robotics market is expected to generate significant semiconductor chip demands.

FEA-RO-IA-R2000-SpotWeld-3

Semiconductor devices in robots are used for collecting information; information processing and controlling motors and actuators; and networking with other systems.

  • Sensing Devices: Sensors are used to collect information including external information such as image sensors, sound sensors, ultrasonic sensors, infrared ray sensors, temperature sensors, moisture sensors and pressure sensors; and movement and posture of the robot itself such as acceleration sensors and gyro sensors.

    Enhancing these sensors’ sensitivity would improve the robot performance. However, for robot applications, smaller form factors, lighter weight, lower power consumption, and real-time sensing are also important. Defining all those sensor requirements for a specific robot application is necessary to find an optimal and cost-effective sensor solution.

    In addition, noise immunity is getting more important in selecting sensors as robot applications expand in various environments that include noises. Another new trend is active sensing technology that enhances sensors’ performance by actively changing the position and posture of the sensors in various environments.

  • Data Processing and Motor Control Devices: The information collected by the sensors is then processed by microprocessors (MPUs) or digital signal processors (DSPs) to generate control signals to the motors and actuators in the robot. Those processors must be capable of operating real-time to quickly control the robot movement based on processed and analyzed information. To further improve robot performance, new processors that incorporate artificial intelligence (AI) and ability to interact with the big data cloud database are needed.
  • As robotics is adapted to various industry areas as well as other services and consumer areas, the robotics industry will need to respond to multiple demands. It is expected that more field programmable gate arrays (FPGAs) will be used in the industry to manufacture robots to those demands.

    In the control of motors and actuators, power devices play important roles. For precise and lower-power operation of the robot, high performance power devices using high band gap materials such as Silicon Carbide and Gallium Nitride will likely used in the industrial applications.

  • Networking Devices: Multiple industrial robots used in a production line are connected with a network. Each robot has its internal network to connect its components. Thus every robot is equipped with networking capability as a dedicated IC, FPGA or a function incorporated in microcontrollers.

Ando--industrial-automation

Smart Manufacturing or Industry 4.0 requires all equipment in a factory to be connected to a network that enables the machine-to-machine (M2M) communication as well as connection to the external information (such as ordering information and logistics) to maximize factory productivity. To be a part of such Smart Factories, industrial robots must be equipped with high-performance and high-reliability network capability.

Opportunities for semiconductor industry in Japan

Japanese semiconductor companies are well-positioned in the key semiconductor product segments for robotics such as sensors, microcontrollers and power devices. These products do not require the latest process technology to manufacture and can be fabricated on 200mm or smaller wafers at a reasonable cost. Japan is the region that holds the largest 200mm and smaller wafer fab capacity in the world and the lines are quite versatile in these product categories.

The robotics market will likely be a large-variety and small-volume market. Japanese semiconductor companies will have an advantage over companies in other regions because they can collaborate with leading robotics companies in Japan from early stages of development. Also, Japan may lead the robotics International Standards development which would be another advantage to Japanese semiconductor companies.

For more information about the robotics and semiconductor, attend SEMICON Japan on December 13 to 15 in Tokyo. Event and program information will be available at www.semiconjapan.org soon.

By James Amano, International Standards, SEMI

The SEMI International Standards Committee, at their SEMICON West 2017 meeting, approved the transformation of the existing 3D Stacked IC Committee and Assembly & Packaging Committee into a single, unified 3D Packaging and Integration Committee. Emerging technologies will be accommodated into the scope of the new committee, as North American TC Chapter Co-Chair Sesh Ramaswami (Applied Materials) explains: “Multi-die integration, horizontally and vertically, leveraging substrate, fan-out, interposer and TSV technology is our future. Hence, the new charter and scope will enable the committee to be of more value to the industry.”

Charter:

To explore, evaluate, discuss, and create consensus-based specifications, guidelines, test methods, and practices that, through voluntary compliance, will:

  • include the materials, piece parts, and interconnection schemes, and unique packaging assemblies that provide for the communication link between the semiconductor chip and the next level of integration, either single- or multi-chip configurations. It relates to the technologies for heterogeneous and other multi-chip packaging such as Fan-out/Fan-in Wafer Level Packaging, Panel Level Packaging, Three-Dimensional Stacking IC, device embedded packaging, flexible electronics technology
  • promote mutual understanding and improved communication between users and suppliers, equipment, automation systems, devices, and services
  • enhance the manufacturing efficiency, capability and shorten time-to-market and reduce manufacturing cost

Scope:

To develop standards for semiconductor devices, including processed wafers, chips, or multi-chip configurations to the next level of integration, either in single- or multi-chip configurations.

  • materials needed for 3D applications, including prime silicon and glass wafers, temporary and permanent bonding material, specifications needed for processed wafers and/or chips to enter an integration step, etc.
  • the materials related to the elements of, interconnection schemes, and unique packaging assemblies that provide for the communication link between device and packaging.
  • the technologies for heterogeneous and other multi-chip packaging such as Fan-out/Fan-in Wafer Level Packaging, Panel Level Packaging, Three-Dimensional Stacking IC, device embedded packaging, and flexible electronics technology
  • metrologies to support these 3D integration and packaging technologies

Masahiro Tsuriya (iNEMI), Japan Co-Chair, further emphasizes “The new 3D Packaging & Integration Committee will be able to contribute to the advance of new, innovative semiconductor packaging technologies.”

The global committee currently has chapters active in Japan, North America, and Taiwan, which all meet throughout the year. To get involved, please join the SEMI International Standards Program at: www.semi.org/standardsmembership.

Graphene is a sheet of carbon that is only one atom thick, and it has drawn worldwide attention as a new material. A research group from Kumamoto University, Japan has discovered that pressure can be generated by simply stacking graphene oxide nanosheets, a material that closely resembles graphene. They also found that the pressure can be increased by reducing the interlayer distance through heat treatment. It is an innovative approach for applying high pressure without using an enormous amount of energy.

The 2010 Nobel Prize in Physics was awarded to two scientists, Andre Geim and Konstantin Novoselov, for groundbreaking graphene experiments. The carbon material is very thin, strong, flexible, and has high electrical conductivity. Oxidized graphene nanosheets have many oxygen functional groups at the front and back of graphene, and previous research has shown that if several layers of oxidized graphene nanosheets are heat treated, the interlayer distance shrinks as oxygen functional groups are eliminated.

This led the researchers at Kumamoto University, Japan to consider that reducing the interlayer distance of graphene oxide nanosheets, could allow it to be used as a compressor that applies pressure to a substance sandwiched between the sheets. To measure pressure between nanosheets, they used molecular materials that change the electrical state of metal ions in response to pressure (spin crossover phenomenon). They observed an electrical state change of iron nanoparticles by sandwiching the material and measuring the spin crossover phenomenon between graphene oxide nanosheets.

As the interlayer distance becomes smaller, the pressure between layers rises. This means that the pressure value can be adjusted by the heat treatment temperature. The maximum pressure the researchers measured was 38 x 106 Pa (101,300 Pa at atmospheric pressure, or about 375 atm). Moreover, they found that pressure does not occur unless the nanosheets are properly stacked.

“There are several examples of special materials that cause compression by just sandwiching or wrapping, similar to our results here,” said Assistant Professor Ryo Ohtani of Kumamoto University, who led the study. “But, as far as we know, this graphene nanosheet is the first example in the world with the ability to adjust applied pressure by simply changing the heat treatment temperature. We expect that this “nano-compressor” will lead to new developments from fields such as material chemistry or physics. Particularly since this technique produces high pressures that normally cannot be obtained without adding a large amount of energy.”

The Semiconductor Industry Association (SIA) released the following statement today from SIA president & CEO John Neuffer in support of the corporate tax reform framework released today by leaders in the Trump Administration and Congress. The proposal is expected to be considered by Congress in the coming weeks.

“Over the past three decades, the U.S. semiconductor industry has unleashed tremendous innovations that have transformed America’s economic, technological, and national security landscape. America’s corporate tax system, meanwhile, has remained largely unchanged, leaving U.S. businesses at a disadvantage to their overseas competitors.

“The tax reform framework is a step forward to make the U.S. corporate tax system more competitive and allow U.S. semiconductor companies to continue to grow and innovate here at home. The plan would advance the U.S. semiconductor industry’s core priorities for tax reform: a lower, globally competitive rate, a modern international tax system, and strong incentives for research and innovation.

“While there are many details of importance to our industry that need to be fleshed out, we support the plan as a framework for advancing corporate tax reform.  We look forward to working with Congress and the Administration to enact corporate tax reform that makes the United States more globally competitive and boosts U.S. leadership in semiconductor research, design, and manufacturing.”

SK Hynix Inc. (or “the Company“, www.skhynix.com) announced its board of directors yesterday approved its plan to participate in a Bain Capital-led consortium that plans to purchase Toshiba Corporation’s memory chip unit, Toshiba Memory Corporation (or “TMC“). The Company will invest 395 billion yen (4 trillion won) in the consortium’s estimated 2 trillion yen of total investment.

SK Hynix is a part of a group of investors led by Bain Capital Private Equity that includes several Japanese and a number of U.S. companies. The Bain-led consortium will hold 49.9 percent stake in TMC, while Toshiba will hold 40.2 percent and Japan’s Hoya Corp. will own 9.9 percent.

SK Hynix plans to finance 129 of its total 395 billion yen via convertible bonds that could allow it to take an equity stake of up to 15 percent in the future. The remaining 266 billion yen is to put in a fund established by Bain Capital as a limited partner, which would help the Company enjoy capital gains when the TMC is listed.

The Bain-led consortium including SK Hynix will make its best endeavors to finalize the deal by March 2018.

Since the 2009 semiconductor downturn and strong 2010 recovery year, power transistor sales have been rocked by market volatility, falling in three of the last five years because of inventory corrections and drawdowns by systems makers worried about ongoing economic weakness and price erosion in some product categories. After recovering from a 7% drop in 2015, power transistor sales grew 5% in 2016 to $12.9 billion and are forecast to set a new record high this year with worldwide revenues rising 6% to $13.6 billion, according to IC Insights’ 2017 O-S-D Report—A Market Analysis and Forecast for Optoelectronics, Sensors/Actuators, and Discrete Semiconductors.

The expected 2017 growth in power transistor sales will be the first back-to-back annual increase in this semiconductor market segment in six years, and that will push dollar volumes past the current record high of $13.5 billion set in 2011. In 2012 and 2013, power transistors suffered their first back-to-back annual sales decline in more than three decades—dropping 8% and 6%, respectively—after rising 12% in 2011 and surging 44% in the 2010 recovery from the 2009 downturn year. The power transistor market then rebounded in 2014 with a strong 14% increase, only to drop 7% in 2015. In 2016, this semiconductor discretes market category began to stabilize and is expected to continue expanding at a modest rate in the next several years, based on IC Insights’ O-S-D Report forecast (Figure 1).

Power transistors are the primary growth engine in the $23 billion discrete semiconductor market because they play a vital role in controlling and conditioning electricity for all types of electronics—including a growing number of battery-operated systems. Worldwide efforts to reduce the waste of power in electric utility grids have significantly increased the importance of power transistors in consumer, commercial, and industrial systems. Renewable-energy applications (e.g., wind and solar systems) as well as electric and hybrid vehicles have also become important applications for power transistors in the last 15 years.

Figure 1

Figure 1

However, volatility in the first half of this decade resulted in an uncharacteristic drop in market size for power transistors during the last five years.  Between 2011 and 2016, power transistor sales fell by a compound annual growth rate of -0.9% compared to a 25-year historical annual average increase of 6.4% (between 1991 and 2016).  The 2017 O-S-D Report is projecting that worldwide power transistor sales will grow by a CAGR of 4.2% between 2016 and 2021, reaching $15.8 billion in the final year of the forecast.

All power transistor technology categories are expected to register sales growth in 2017 with MOS field effect transistor (FET) products increasing 6% to nearly $7.7 billion, insulated-gate bipolar transistor (IGBT) products also rising 6% to $4.1 billion, and bipolar junction transistor products growing 4% to about $875 million.  RF/microwave power transistors and module sales are forecast to rise 3% in 2017 to $960 million, according to the O-S-D Report.

SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced it has joined the TSMC (NYSE: TSM) IP Alliance Program, part of the TSMC Open Innovation Platform, which accelerates innovation in the semiconductor design community. As an alliance member, SiFive’s RISC-V based Coreplex IP are made available to its customers to reduce time-to-market, increase return on investment and reduce waste in the manufacturing process.

With the significant increases in non-recurring engineering and design costs required to bring to life new silicon designs, TSMC’s IP Alliance Program makes it easier for fabless chipmakers to innovate and produce custom semiconductors. By participating in the TSMC IP Alliance Program, SiFive becomes the first RISC-V solution provider to make its IP readily available for fabless chipmakers leveraging the industry’s most comprehensive semiconductor IP portfolio.

“Acceptance into the TSMC IP Alliance is an honor and a significant validation not only of SiFive, but of the RISC-V architecture as a whole,” said Jack Kang, vice president of Product and Business Development, SiFive. “Having the SiFive Coreplex IP platform available through the program makes designing a chip based on the latest in open source hardware even easier. We look forward to continued collaboration with TSMC and the other members of the IP Alliance ecosystem.”

“The TSMC Open Innovation Platform forms the center of our open innovation model that addresses the needs of our customers looking to reduce design time and speed time-to-market,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “The addition of SiFive’s IP to the TSMC IP catalog will streamline the process of fabricating custom silicon designs based on the RISC-V implementation.”

SiFive was founded by the inventors of RISC-V – Andrew Waterman, Yunsup Lee and Krste Asanovic – with a mission to democratize access to custom silicon. In its first six months of availability, more than 1,000 HiFive1 software development boards have been purchased and delivered to developers in over 40 countries. Additionally, the company has engaged with multiple customers across its IP and SoC products, started shipping the industry’s first RISC-V SoC in November 2016 and announced the availability of its Coreplex RISC-V based IP earlier this year. SiFive’s innovative “study, evaluate, buy” licensing model dramatically simplifies the IP licensing process, and removes traditional road blocks that have limited access to customized, leading edge silicon.

Researchers from Finland and Taiwan have discovered how graphene, a single-atom-thin layer of carbon, can be forged into three-dimensional objects by using laser light. A striking illustration was provided when the researchers fabricated a pyramid with a height of 60nm, which is about 200 times larger than the thickness of a graphene sheet. The pyramid was so small that it would easily fit on a single strand of hair. The research was supported by the Academy of Finland and the Ministry of Science and Technology of the Republic of China.

A similar structure was made experimentally by using laser irradiation in a process called "optical forging." Credit: The University of Jyväskylä

A similar structure was made experimentally by using laser irradiation in a process called “optical forging.” Credit: The University of Jyväskylä

Graphene is a close relative to graphite, which consists of millions of layers of graphene and can be found in common pencil tips. After graphene was first isolated in 2004, researchers have learned to routinely produce and handle it. Graphene can be used to make electronic and optoelectronic devices, such as transistors, photodetectors and sensors. In future, we will probably see an increasing number of products containing graphene.

“We call this technique optical forging, since the process resembles forging metals into 3D shapes with a hammer. In our case, a laser beam is the hammer that forges graphene into 3D shapes,” explains Professor Mika Pettersson, who led the experimental team at the Nanoscience Center of the University of Jyväskylä, Finland. “The beauty of the technique is that it’s fast and easy to use; it doesn’t require any additional chemicals or processing. Despite the simplicity of the technique, we were very surprised initially when we observed that the laser beam induced such substantial changes on graphene. It took a while to understand what was happening.”

“At first, we were flabbergasted. The experimental data simply made no sense,” says Dr Pekka Koskinen, who was responsible for the theory. “But gradually, by close interplay between experiments and computer simulations, the actuality of 3D shapes and their formation mechanism started to become clear.”

“When we first examined the irradiated graphene, we were expecting to find traces of chemical species incorporated into the graphene, but we couldn’t find any. After some more careful inspections, we concluded that it must be purely structural defects, rather than chemical doping, that are responsible for such dramatic changes on graphene,” explains Associate Professor Wei Yen Woon from Taiwan, who led the experimental group that carried out X-ray photoelectron spectroscopy at the synchrotron facility.

The novel 3D graphene is stable and it has electronic and optical properties that differ from normal 2D graphene. Optically forged graphene can help in fabricating 3D architectures for graphene-based devices.

Advancements in spintronics


September 25, 2017

Applications now include nanoscale Spintronics sensors that further enhance the areal density of hard disk drives, through MRAMs that are seriously being considered to replace embedded flash, static random access memories (SRAM) and at a later stage dynamic random access memories (DRAM).

BY HIDEO OHNO, MARK STILES, and BERNARD DIENY, IEEE

Spintronics is the concept of using the spin degree of freedom to control electrical current to expand the capabilities of electronic devices. Over the last 10 years’ considerable progress has been made. This progress has led to technologies ranging from some that are already commercially valuable, through promising ones currently in development, to very speculative possibilities.

Today, the most commercially important class of devices consists of magnetic sensors, which play a major role in a wide variety of applications, a particularly prominent example of which is magnetic recording. Nonvolatile memories called magnetic random access memories (MRAMs) based on magnetic tunnel junctions (MTJs), are commercial products and may develop into additional high impact applications either as standalone memories to replace other random access memories or embedded in complementary metal–oxide–semiconductor (CMOS) logic.

Some technologies have appealing capabilities that may improve sensors and magnetic memories or develop into other devices. These technologies include three- terminal devices based on different aspects of spin-transfer torques, spin-torque nano-oscillators, devices controlled by electric fields rather than currents, and devices based on magnetic skyrmions. Even further in the future are Spintronics-based applications in energy harvesting, bioinspired computing, and quantum technologies.

But before we get into detail about where Spintronics is today, we need to cover the history of Spintronics.

The history of spintronics

Spintronics dates to the 1960s and was discovered by a group at IBM headed by Leo Esaki, a Japanese physicist who would later go on to win a share of the Nobel Prize I 1973 for discovering the phenomenon of electronic tunneling. Esaki and his team conducted a study which showed an antiferromagnetic barrier of EuSe sandwiched between metal electrodes exhibits a large magnetoresistance.

Subsequent advances of semiconductor thin film deposition techniques such as molecular beam epitaxy led to the development of semiconductor quantum structures, which prompted studies of magnetic multilayers. Ensuing studies of magnetic multilayers resulted in the discovery of giant magne- toresistance (GMR) in 1988. This effect was used to make magnetic sensors, which boosted the areal density of information stored on hard disk drives and led to the 2007 Nobel Prize in Physics awarded to Albert Fert and Peter Grunberg.

Since then rapid progress has continued to enhance both the role and the potential of Spintronics. So, let’s take a look at where we are now.

Where we are now

Applications now include nanoscale Spintronics sensors that further enhance the areal density of hard disk drives, through MRAMs that are seriously being considered to replace embedded flash, static random access memories (SRAM) and at a later stage dynamic random access memories (DRAM). Applica- tions also include devices that utilize spin current and the resulting torque to make oscillators and to transmit information without current.

Now let’s look at those applications and more in-depth.

Modern Hard Disk Drives: Two breeds of Spintronics sensors have replaced traditional anisotropic magnetoresistance (AMR) sensors. Those sensors include giant magnetoresistance (GMR) sensors (used in hard disk drives between 1998 and 2004) and tunnel magnetoresistance (TMR) sensors (used since 2004).

Those sensors are part of the technology development that enabled the increase of storage density of hard disk drives by several orders of magnitude, laying the foundation of today’s information age in the form of data centers installed by the cloud computing industry.

Magnetoresistive Random Access Memory (MRAM): MRAM and particularly spin-transfer- torque MRAM (STT-MRAM) is a nonvolatile memory with very high endurance and scalability. The current STT-MRAM technology uses an array of MTJs with an easy axis of magnetization oriented out of the plane of the layers. These MTJs utilize interface perpendicular anisotropy at the CoFeB–MgO interface, along with the large TMR of the system, for reading the state of magnetization. The spin-transfer torque exerted by a spin polarized current is used to change the magneti- zation direction, offering an efficient way of rewriting the memory. FIGURE 1 show the main families of MRAM that have evolved since 1995.

Screen Shot 2017-09-25 at 12.26.37 PM

 

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Three Terminal Magnetic Memory Devices: Recent physics developments raise the prospect of three- terminal spintronic memory devices. These devices have an advantage over the standard two-terminal devices used in memory applications such as MRAM in that separating the read and write functions poten- tially overcomes several future roadblocks in the devel- opment of MRAM. There are two writing schemes: one is based on spin currents generated by an electrical current running through a heavy metal adjacent to the free layer of the MTJ. The current causes a spin current both in the bulk of the heavy metal and at the interface; this spin current then exerts a torque, called the spin-orbit torque, on the magnetization. In this scheme, the write current does not pass through the MTJ, separating the write and read functions. The other scheme uses current-induced domain wall motion to move a domain wall in the free layer of the MTJ from one side of the fixed layer to the other. In this scheme, the current passes through the free layer, but not the tunnel barrier, again separating the read and write functions.

Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing: Spintronic-based nonvolatile embedded working memory used in conjunction with CMOS-based logic applications is a crucial first step toward standby-power-free logic circuits that are much needed for Internet of Things (IoT) applications. MRAM based logic-in-memory reduces the overhead of having memory and logic apart and gives both minimized interconnection delay and nonvolatility.

Security: These devices have shown great promise for logic and memory applications due to their energy efficiency, very high write endurance, and nonvolatility. Besides, these systems gather
many entropy sources which can be advantageously used for hardware security. The spatial and temporal randomness in the magnetic system associated with complex micromagnetic configurations, the nonlinearity of magnetization dynamics, cell-to-cell process variations, or thermally induced fluctuations of magnetization can be employed to realize novel hardware security primitives such as physical unclonable functions, encryption engines, and true random number generators.

Spin-Torque and Spin-Hall Nano-Oscillators: Spin-torque nano-oscillators (STNO) and spin-Hall effect nano-oscillators (SHNO) are in a class of miniaturized and ultra-broadband microwave signal generators that are based on magnetic resonances in single or coupled magnetic thin films. These oscil- lators are based on magnetic resonances in single or combined magnetic thin films where magnetic torques are used to both excite the resonances and subsequently tune them. The torques can be either spin-transfer torques due to spin-polarized currents (STNOs) or spin Hall torques due to pure spin currents (SHNOs). These devices are auto-oscillators and so do not require any active feedback circuitry with a positive gain for their operation. The auto-oscillatory state is strongly nonlinear, causing phase– amplitude coupling, which governs a wide range of properties, including frequency tunability, modulation, injection locking, mutual synchronization, but also causes significant phase noise. STNOs and SHNOs can, in principle, operate at any frequency supported by a magnetic mode, resulting in a potential frequency range of over six orders of magnitude, from below 100 MHz for magnetic vortex gyration modes to beyond 1 THz for exchange dominated modes. Since STNOs and SHNOs can also act as tunable detectors over this frequency range, there is significant potential for novel devices and applications.

Beyond the applications listed, the spin degree of freedom is also being used to convert heat to energy through the spin Seebeck effect, to manipulate quantum states in solids for information processing and communication, and to realize biologically inspired computing. These may lead to new develop- ments in information storage, computing, communication, energy harvesting, and highly sensitive sensors. Let’s take a look at these new developments.

Thermoelectric Generation Based on Spin Seebeck Effects: The study of combined heat and spin flow, called spin caloritronics, may be used to develop more efficient thermoelectric conversion. Much of the focus of research in spin caloritronics has been the longitudinal spin Seebeck effect, which refers to spin-current generation by temperature gradients across junctions between metallic layers and magnetic layers. The generated spin current in the metallic layer gets converted into a charge current by the inverse spin Hall effect, making a two-step conversion process from a thermal gradient perpen- dicular to the interface into a charge current in the plane of the interface. This process can be used for thermoelectric conversion. Device structures using the spin Seebeck effect differ significantly from those using conventional Seebeck effects due to the orthog- onality of the thermal gradient and resulting charge current, giving different strategies for applications of the two effects.

Electric-Field Control of Spin-Orbit Interaction for Low-Power Spintronics: Control of magnetic properties through electric fields rather than currents raises the possibility of low energy magnetization reversal, which is needed for low-power electronics and Spintronics. One specific way to accomplish this low energy switching is through electric-field control of electronic states leading to modification of the magnetic anisotropy. By applying a voltage to a device, it is possible to change the anisotropy such that the magnetization rotates into a new direction. While such demonstrations of switching alone are not sufficient to make a viable device, voltage controlled reversal is a promising pathway toward low-energy nonvolatile memory devices.

Control of Spin Defects in Wide-Bandgap Semiconductors for Quantum Technologies: The spins in deep level defects found in diamond (nitrogen- vacancy center) and in silicon carbide (divacancy) have a quantum nature that manifests itself even at room temperature. These can be used as extremely sensitive nanoscale temperature, magnetic-field, and electric-field sensors. In the future, microwave, photonic, electrical, and mechanical control of these spins may lead to quantum networks and quantum transducers.

Spintronic Nanodevices for Bioinspired Computing: Bioinspired computing devices promises low-power, high-performance computing but will likely depend on devices beyond CMOS. Low-power, high performance bioinspired hardware relies on ultrahigh- density networks built out of complex processing units interlinked by tunable connections (synapses). There are several ways in which spin-torque-driven MTJs, with their multiple, tunable functionalities and CMOS compatibility, are very well adapted for this purpose. Some groups have recently proposed a variety of bioin- spired architectures that include one or several types of spin-torque nanodevices.

Skyrmion-Electronics: An Overview and Outlook: The concept of skyrmions derives from high energy physics. In magnetic systems, skyrmions are magnetic textures that can be viewed as topological objects. Theory suggests that they have properties that might make them useful objects in which to store and manip- ulate information. Many of the ideas are similar to ideas that were developed decades ago for bubble memory or, more recently, racetrack memory. There are several possible advantages for skyrmion devices as compared to other related devices. They are potentially higher density and lower energy, although the arguments for these remain to be experimentally verified.

So, what does the future of spintronics have in store?

The future

Spintronics will continue to have increasing impact, but the future is somewhat uncertain. The importance of magnetic sensors is likely to remain important while the importance of the magnetic sensors in hard disk drives appears to depend on the economics of mass storage in the cloud.

MRAM seems likely to play an increasing role both as standalone memory and embedded in CMOS. The degree of adoption still depends on a few technical and many economic considerations. The acceleration, over the past few months, of announcements and demonstrations related to STT-MRAM produced by major microelectronics companies, seems to indicate that large volume production of STT-MRAM is getting quite close. If the adoption of this technology by microelectronics industry becomes a reality, the whole field will be strongly boosted.

In the future, Spintronics can play a critical role in areas such as IoT, ultralow-power electronics, high-performance computing (HPC). Besides, in the next 10 to 15 years, we are likely to see a much greater role played by alternative forms of computing. The role that Spintronics plays in those technologies is likely to be strongly influenced by the success of MRAM. If MRAM is successful, we will have developed the ability to manufacture it making it easier to import into other technologies.

Some of the recent technical developments that have significant virtues for applications will likely play a role in technology 10 to 15 years from now but many will not. Research on many of these ideas will continue and will spawn related areas. Material research is key along this road.

Innovative materials allowing efficient charge to spin and spin to charge current conversion, or good control of magnetic properties by voltage, or efficient injection/manipulation/detection of spins in semicon- ductors can play major roles. Along with this idea, the use of oxide materials in spintronic devices can become quite important. Oxides share crystal- linity with semiconductors in distinction to metallic magnetic devices. Will the greater control that comes with crystallinity give advantages to oxides in future devices? These are some of the many topics that are likely to be addressed in the coming years.

North America-based manufacturers of semiconductor equipment posted $2.18 billion in billings worldwide in August 2017 (three-month average basis), according to the August Equipment Market Data Subscription (EMDS) Billings Report published today by SEMI.

SEMI reports that the three-month average of worldwide billings of North American equipment manufacturers in August 2017 was $2.18 billion.The billings figure is 3.9 percent lower than the final July 2017 level of $2.27 billion, and is 27.7 percent higher than the August 2016 billings level of $1.71 billion.

“Equipment billings in August declined relative to July, signaling a pause in this year’s extraordinary growth,” said Ajit Manocha, president and CEO of SEMI. “Nonetheless monthly billings remain well above last year’s monthly levels.”

The SEMI Billings report uses three-month moving averages of worldwide billings for North American-based semiconductor equipment manufacturers. Billings figures are in millions of U.S. dollars.
Billings
(3-mo. avg)
Year-Over-Year
March 2017
$2,079.7
73.7%
April 2017
$2,136.4
46.3%
May 2017
$2,270.5
41.8%
June 2017
$2,300.3
34.1%
July 2017 (final)
$2,269.7
32.9%
August 2017 (prelim)
$2,181.8
27.7%

Source: SEMI (www.semi.org), September 2017