Category Archives: Device Architecture

GLOBALFOUNDRIES this week announced the availability of its 7nm Leading-Performance (7LP) FinFET semiconductor technology, delivering a 40 percent generational performance boost to meet the needs of applications such as premium mobile processors, cloud servers and networking infrastructure. Design kits are available now, and the first customer products based on 7LP are expected to launch in the first half of 2018, with volume production ramping in the second half of 2018.

In September 2016, GF announced plans to develop its own 7nm FinFET technology leveraging the company’s unmatched heritage of manufacturing high-performance chips. Thanks to additional improvements at both the transistor and process levels, the 7LP technology is exceeding initial performance targets and expected to deliver greater than 40 percent more processing power and twice the area scaling than the previous 14nm FinFET technology. The technology is now ready for customer designs at the company’s leading-edge Fab 8 facility in Saratoga County, N.Y.

“Our 7nm FinFET technology development is on track and we are seeing strong customer traction, with multiple product tapeouts planned in 2018,” said Gregg Bartlett, senior vice president of the CMOS Business Unit at GF. “And, while driving to commercialize 7nm, we are actively developing next-generation technologies at 5nm and beyond to ensure our customers have access to a world-class roadmap at the leading edge.”

GF also continues to invest in research and development for next-generation technology nodes. In close collaboration with its partners IBM and Samsung, the company announced a 7nm test chip in 2015, followed by the recent announcement of the industry’s first demonstration of a functioning 5nm chip using silicon nanosheet transistors. GF is exploring a range of new transistor architectures to enable its customers to deliver the next era of connected intelligence.

GF’s 7nm FinFET technology leverages the company’s volume manufacturing experience with its 14nm FinFET technology, which began production in early 2016 at Fab 8. Since then, the company has delivered “first-time-right” designs for a broad range of customers.

To accelerate the 7LP production ramp, GF is investing in new process equipment capabilities, including the addition of the first two EUV lithography tools in the second half of this year. The initial production ramp of 7LP will be based on an optical lithography approach, with migration to EUV lithography when the technology is ready for volume manufacturing.

Imec, a research and innovation hub in nano-electronics and digital technology, announced today that it has developed 200V and 650V normally-off/enhancement mode (e-mode) on 200mm/8-inch GaN-on-Silicon wafers, achieving a very low dynamic Ron dispersion (below 20 percent) and state-of-the-art performance and reproducibility. Stress tests have also shown a good device reliability. Imec’s technology is ready for prototyping, customized low-volume production as well as for technology transfer.

GaN technology offers faster switching power devices with higher breakdown voltage and lower on-resistance than silicon (Si), making it an ideal material for advanced power electronic components. Imec’s GaN-on-Si device technology is Au-free and compatible with the wafer handling and contamination requirements for processing in a Si fab. A key component of the GaN device structure is the buffer layer, which is required to accommodate the large difference in lattice parameters and thermal expansion coefficient between the AlGaN/GaN materials system and the Si substrate. Imec achieved a breakthrough development in the buffer design (patent pending), allowing to grow buffers qualified for 650 Volt on large diameter 200mm wafers. This, in combination with the choice of the Si substrate thickness and doping increased the GaN substrate yield on 200mm to competitive levels, enabling low-cost production of GaN power devices. Also, the cleaning and dielectric deposition conditions have been optimized, and the field plate design (a common technique for achieving performance  improvement) has been extensively studied. As a result, the devices exhibit dynamic Ron dispersion below 20% up till 650 Volt over the full temperature range from 25°C to 150°C. This means that there is almost no change in the transistor on-state after switching from the off-state, a challenge typical for GaN technology.

“Having pioneered the development of GaN-on-Si power device technology on large diameter substrates (200mm/8-inch), imec now offers companies access to its normally-off/e-mode GaN power device technology through prototyping, low-volume manufacturing as well as via a full technology transfer” stated Stefaan Decoutere, program director for GaN technology at imec. “Next to enhancement mode power device switches, imec also provides lateral Schottky diodes for power switching applications. Based on imec’s proprietary device architecture, the diode combines low turn-on voltage with low leakage current, up to 650V – a combination that is very challenging to achieve.”

si wafer

Cypress Semiconductor Corporation (“Cypress”) (NASDAQ: CY) today announced that Executive Chairman Ray Bingham has tendered his resignation as Executive Chairman and is stepping down from the Board of Directors. He also notified the Board that he was declining to stand for re-election at the Annual Meeting. The Board has accepted his decision. In addition, Eric Benhamou has stepped down as Lead Independent Director. He will remain on the Board. In response to these developments, the Board of Directors has appointed current independent director W. Steve Albrecht as its new Chairman. As a world-renowned expert in the field of corporate governance, the Board unanimously decided that Steve is the right person for the job. Finally, the independent members of the Cypress Board decided, given CEO Hassane El-Khoury’s superior performance, there is no longer a need for the Executive Chairman role. All of these changes are effective immediately.

“It has been a great privilege to serve as Chairman of Cypress’ Board of Directors and most recently Executive Chairman, alongside some of the smartest minds in the business, at such an important time in Cypress’ history,” said Bingham. “In the last year, we have accomplished a great deal, including removing an underperforming CEO who was no longer right for the Company, and appointing a dynamic CEO who I believe will continue to lead the Company upward and implement the successful turnaround driven by the Cypress 3.0 strategy. While it saddens me to leave the Board at such a time, I believe that the nature of this proxy contest has become a distraction to the Company and the management team’s ability to fully execute Cypress 3.0 – the strategy that is putting Cypress back on track. I wish Hassane, his team and the Board members all the best in the future and look forward to watching them accomplish great things in the months and years to come.”

“On behalf of the full Board, I want to thank Ray for his years of contributions to Cypress,” said W. Steve Albrecht, Chairman of Cypress. “His extensive experience and deep industry knowledge played an enormous part in the turnaround that started with the removal of T.J. Rodgers as CEO and member of the Board and culminated with the appointment of Hassane as the new CEO and his formulation and execution of the Cypress 3.0 strategy. The Board and I remain as committed and as focused as ever to good corporate governance, driving growth and creating value for all of our stockholders. I’m honored to take on the role and responsibility of Chairman and pledge to serve in the best interests of all Cypress’ stakeholders through my service on the Board. I am also grateful that Eric Benhamou will continue to serve on the Board. He brings a wealth of experience that is highly relevant to our new 3.0 strategy.”

Dr. Albrecht, who is a National Association of Corporate Directors (“NACD”) Board Leadership Fellow, is highly acclaimed in the corporate governance field, having chaired the audit committee and served on the nomination/governance committee of nearly every board he has served on. Dr. Albrecht also teaches the MBA corporate governance and board of directors’ class at Brigham Young University (“BYU”) and has authored a text on corporate governance and boards of directors. Albrecht has done extensive research and writing on financial reporting, business fraud, ethics and corporate governance. His research has resulted in the publication of over one hundred and twenty-five articles in professional and academic journals. He is the author or co-author of over 25 books or monographs, several of which are on fraud, integrity, financial and managerial accounting and corporate governance/boards of directors. Dr. Albrecht is also a certified public accountant, certified internal auditor and certified fraud examiner with extensive experience in controls and financial accounting matters, with a particular expertise in multinational companies.

Dr. Albrecht has served on the boards of directors of four public companies and five private companies. In addition to Cypress Semiconductor, he currently serves on the Boards of Directors of Red Hat, Inc. and SkyWest, Inc. At BYU, Dr. Albrecht is the Gunnel Endowed Professor in the Marriott School of Management and a BYU Wheatley Fellow. Prior to BYU, he taught at Stanford Universityand the University of Illinois and served as a trustee for both the Financial Accounting Foundation (which oversees the FASB) and COSO (the organization that established the internal control framework used by corporations). He has consulted with numerous corporations and has been an expert witness in 37 fraud cases, including many of the largest financial statement fraud cases in the United States. In 2006, Dr. Albrecht was named by Utah Business as one of its first class of top five corporate directors in the state of Utah. In 2013 he was included in the NACD Directorship 100, being named one of the top 50 Corporate Directors in America. Later this month, Dr. Albrecht will receive the Lifetime Outstanding Director Award in the State of Utah.

IC Insights recently released its Update to its 2017 IC Market Drivers Report.  The Update includes IC Insights’ latest outlooks on the smartphone, automotive, PC/tablet and Internet of Things markets.

In the Update, IC Insights scaled back its total semiconductor sales forecast for system functions related to the Internet of Things in 2020 by about $920 million, mostly because of lower revenue projections for connected cities applications (such as smart electric meters and infrastructure supported by government budgets).  The updated forecast still shows total 2017 sales of IoT semiconductors rising about 16.2% to $21.3 billion (with final revenues in 2016 being slightly lowered to $18.3 billion from the previous estimate of $18.4 billion), but the expected compound annual growth rate between 2015 and 2020 has been reduced to 14.9% versus the CAGR of 15.6% in IC Insights’ original projection from December 2016. Total semiconductor sales for IoT system functions are now expected to reach $31.1 billion in 2020 (Figure 1) versus the previous projection of $32.0 billion in the final year of the forecast.

Figure 1

Figure 1

IC Insights’ revised outlook for IoT semiconductor sales by end-use market categories shows that semiconductor revenues for connected cities applications are projected to grow by a CAGR of 8.9% between 2015 and 2020 (down from 9.7% in IC Insights’ original forecast).  Meanwhile, the IoT semiconductor market for wearable systems is expected to show a CAGR of 17.1% (versus 18.8% in the previous projection).  The lower growth projection in chip sales for connected cities systems is a result of anticipated belt tightening in government spending around the world and the slowing of smart meter installations now that the initial wave of deployments has ended in many countries.  Slower growth in semiconductor sales for wearable systems is primarily related to IC Insights’ reduced forecast for smartwatch shipments through 2020.

The updated outlook nudges up semiconductor growth in the industrial Internet category to a CAGR of 24.1% (compared to 24.0% in the December 2016 forecast) and slightly lowers the annual rate of increase in connected homes and connected vehicles to CAGRs of 21.3% and 32.9%, respectively (from 22.7% and 33.1% in the original 2017 report).

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $31.3 billion for the month of April 2017, an increase of 20.9 percent from the April 2016 total of $25.9 billion and 1.3 percent more than last month’s total of $30.9 billion. April marked the global market’s largest year-to-year growth since September 2010. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average. Additionally, a new WSTS industry forecast projects annual global market growth of 11.5 percent in 2017 and 2.7 percent in 2018, followed by a slight decrease of 0.2 percent in 2019.

GSR graph 2_med

 

“The global semiconductor market has grown at an impressive rate through the beginning of 2017, culminating with April’s year-to-year growth of 21 percent, the global market’s largest increase in nearly seven years,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Although driven in part by tremendous growth in the memory market, sales of non-memory products also grew by double digits in April, and all major regional markets posted substantial year-to-year gains. The global market is projected to experience significant annual growth this year, with slower growth expected next year and roughly flat sales in 2019.”

Regionally, year-to-year sales increased in China (30.0 percent), the Americas (26.9 percent), Asia Pacific/All Other (14.1 percent), Europe (12.7 percent), and Japan (12.0 percent). Compared with last month, sales were up slightly across all regions: Asia Pacific/All Other (2.0 percent), the Americas (1.8 percent), Japan (1.4 percent), China (0.7 percent), and Europe (0.5 percent).

Additionally, SIA today endorsed the WSTS Spring 2017 global semiconductor sales forecast, which projects the industry’s worldwide sales will be $377.8 billion in 2017. This would mark the industry’s highest-ever annual sales, an 11.5 percent increase from the 2016 sales total. WSTS projects year-to-year increases across all regional markets for 2017: Asia Pacific (12.4 percent), the Americas (12.2 percent), Europe (8.7 percent), and Japan (6.6 percent). Beyond 2017, growth in the semiconductor market is expected to slow across all regions. WSTS tabulates its semi-annual industry forecast by convening an extensive group of global semiconductor companies that provide accurate and timely indicators of semiconductor trends.

The Semiconductor Industry Association (SIA) today welcomed a new $75 million initiative outlined in the President’s fiscal year 2018 budget proposal and funded through the Defense Advanced Research Projects Agency (DARPA) that would bolster long-term semiconductor research. The public-private “electronics resurgence” initiative would advance research to progress beyond the limits of traditional scaling and catalyze next-generation semiconductor materials, designs, and architectures. The program would combine with DARPA’s other microelectronics R&D initiatives for a total of more than $200 million devoted to semiconductor and related technology research in the coming fiscal year, an amount that will be supplemented by significant industry investments.

“Semiconductors, the brains of modern electronics, are fundamental to America’s economic, technological, and military infrastructure,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Advances in semiconductor technology reverberate throughout society, making technology more affordable and accessible to consumers and boosting U.S. innovation, productivity, and economic growth. DARPA’s new initiative would strengthen long-range semiconductor research, enhance semiconductor technology’s positive impacts on our country, and bolster national security. The semiconductor industry has a long record of partnering with our government to advance early-stage research. This new, forward-looking program is yet another important example of this ongoing collaboration, and we are committed to working with the Administration and Congress to ensure its enactment.”

The new DARPA initiative is expected to focus on the development of new materials for use in electronics devices, nontraditional architectural approaches, and innovative circuit designs, among other research areas. In addition to fostering advancements in semiconductor technologies used for national security, the ripple effect from this research will be felt across the full range of semiconductor applications: communications, computing, health care, transportation, clean energy, and countless others.

As one of America’s top exporters and advanced manufacturers, the U.S. semiconductor industry is a key contributor to our country’s strength. Our industry supports more than one million jobs in America, accounts for nearly half of the world’s chip sales, and is the world’s most innovative sector. And the United States is home to almost half of U.S. semiconductor companies’ manufacturing base, across 21 states.

“Our industry’s continued strength, and the myriad benefits it provides to our country, are directly attributable to large and sustained investments in research,” said Neuffer. “Recognizing this, the U.S. semiconductor industry plows about one-fifth of its annual sales back into research and development, among the most of any industry. The new DARPA initiative marks a major commitment to furthering semiconductor technology and keeping America at the head of the class in innovation.”

Neuffer also noted SIA’s longstanding support for basic scientific research funded through other federal agencies such as the National Science Foundation (NSF), the National Institute of Standards and Technology (NIST), and the Department of Energy (DOE) Office of Science. He expressed the semiconductor industry’s eagerness to work with the Administration and Congress to enact a budget that prioritizes the strategic importance of research investments to America’s economic and national security and technological leadership.

 

SEMI today reported that worldwide semiconductor manufacturing equipment billings reached US$13.1 billion for the first quarter of 2017. The quarter ended very strong, with March billings reaching $5.6 billion, an all-time monthly record.

Quarterly billings of US$13.1 billion also represent the first time quarterly billings exceeded the record quarterly high set in the third quarter of 2000 ($13.0 billion). Billings for the most recent quarter are 14 percent higher than the fourth quarter of 2016 and 58 percent higher than the same quarter a year ago. The data is gathered jointly with the Semiconductor Equipment Association of Japan (SEAJ) from over 95 global equipment companies that provide data on a monthly basis.

The quarterly billings data by region in billions of U.S. dollars, quarter-over-quarter growth and year-over-year rates by region are as follows:

 
1Q2017
4Q2016
1Q2016
1Q2017/4Q2016
(Qtr-over-Qtr)
1Q2017/1Q2016
(Year-over-Year)
Korea
3.53
2.39
1.68
48%
110%
Taiwan
3.48
4.15
1.89
-16%
84%
China
2.01
1.15
1.60
74%
25%
North America
1.27
1.24
1.01
3%
26%
Japan
1.25
1.05
1.24
19%
1%
Europe
0.92
0.93
0.35
-1%
160%
Rest of World
0.63
0.60
0.51
4%
23%
Total
13.08
11.52
8.28
14%
58%

Source: SEMI (www.semi.org) and SEAJ, June 2017

The Equipment Market Data Subscription (EMDS) from SEMI provides comprehensive market data for the global semiconductor equipment market. A subscription includes three reports: the monthly SEMI Billings Report, which offers a perspective of the trends in the equipment market; the monthly Worldwide Semiconductor Equipment Market Statistics (WWSEMS), a detailed report of semiconductor equipment bookings and billings for seven regions and 24 market segments; and the SEMI Semiconductor Equipment Forecast, which provides an outlook for the semiconductor equipment market.

 

The latest update to the World Fab Forecast report, published on May 31, 2017 by SEMI, reveals record spending for fab construction and fab equipment. Korea, Taiwan, and China all see large investments, and spending in Europe will also increase significantly. In 2017, over US$49 billion will be spent on equipment alone, a record for the semiconductor industry.  Spending on new fab construction is projected to reach over $8 billion, the second largest year on record.  Records will shatter again in 2018, when equipment spending will pass $54 billion, and new fab construction spending is forecast at an all-time high of $10 billion. See Figure.

Figure 1

Figure 1

SEMI reports that these unprecedented high numbers are not only driven by a handful of well-known, established companies, but also by several new Chinese companies entering the scene with large budgets. An increase in overall fab spending (construction and equipment together) of 54 percent year-over-year (YoY) in China is expected.  Total spending rises from $3.5 billion in 2016 to $5.4 billion in 2017, and then to $8.6 billion in 2018, another 60 percent year-over-year (YoY).

Some of these China-based companies are well known, such as Hua Li Microelectronics or SMIC (top investors in 2017 and 2018), though newcomers in the arena, including Yangtze Memory Technology, Fujian Jin Hua Semiconductor, Tsinghua Unigroup, Tacoma Semiconductor, and Hefei Chang Xin Memory, add to the spending surge.

The SEMI World Fab Forecast breaks down fab equipment spending by region. Korea leads both years of our forecast period, with spending of $14.6 billion in 2017 and $15.1 billion in 2018.  In 2017, Taiwan is projected to be the second largest spending region on equipment, but China will take over second place in 2018 as it equips the many new fabs being built in 2016 and 2017.  Americas is in fourth place, projected to spend $5.2 billion in 2017 and $5.5 billion in 2018.  Japan will come in fifth, spending $5.1 billion in 2017 and $5.3 billion in 2018.  Although the Europe/Mideast region is in sixth place with relatively modest investments of $3.8 billion in 2017, this represents remarkable growth for the region, 71 percent more than in 2016; and the region will bump spending another 20 percent in 2018 (to $4.6 billion).

This exciting growth cycle could continue well beyond 2018.  Record fab construction spending of $10 billion for 2018 means new fabs will need to be equipped at least a year down the road, leading to high expectations for good business beyond the current two-year forecast period.

Since the last publication on February 28, the SEMI Industry Research & Statistics team has made 279 changes on 244 facilities/lines. In that time frame, 24 new facilities were added and 4 fab projects were closed.

For insight into semiconductor manufacturing in 2017 and 2018 with details about capex for construction projects, fab equipping, technology levels, and products, visit the SEMI Fab Database webpage and order the SEMI World Fab Forecast Report. The report, in Excel format, tracks spending and capacities for over 1,100 facilities including over 60 future facilities, across industry segments from Analog, Power, Logic, MPU, Memory, and Foundry to MEMS and LEDs facilities.

An engineer with the Erik Jonsson School of Engineering and Computer Science at The University of Texas at Dallas has designed a novel computing system made solely from carbon that might one day replace the silicon transistors that power today’s electronic devices.

“The concept brings together an assortment of existing nanoscale technologies and combines them in a new way,” said Dr. Joseph S. Friedman, assistant professor of electrical and computer engineering at UT Dallas who conducted much of the research while he was a doctoral student at Northwestern University.

The resulting all-carbon spin logic proposal, published by lead author Friedman and several collaborators in the June 5 issue of the online journal Nature Communications, is a computing system that Friedman believes could be made smaller than silicon transistors, with increased performance.

Today’s electronic devices are powered by transistors, which are tiny silicon structures that rely on negatively charged electrons moving through the silicon, forming an electric current. Transistors behave like switches, turning current on and off.

In addition to carrying a charge, electrons have another property called spin, which relates to their magnetic properties. In recent years, engineers have been investigating ways to exploit the spin characteristics of electrons to create a new class of transistors and devices called “spintronics.”

Friedman’s all-carbon, spintronic switch functions as a logic gate that relies on a basic tenet of electromagnetics: As an electric current moves through a wire, it creates a magnetic field that wraps around the wire. In addition, a magnetic field near a two-dimensional ribbon of carbon — called a graphene nanoribbon — affects the current flowing through the ribbon. In traditional, silicon-based computers, transistors cannot exploit this phenomenon. Instead, they are connected to one another by wires. The output from one transistor is connected by a wire to the input for the next transistor, and so on in a cascading fashion.

In Friedman’s spintronic circuit design, electrons moving through carbon nanotubes — essentially tiny wires composed of carbon — create a magnetic field that affects the flow of current in a nearby graphene nanoribbon, providing cascaded logic gates that are not physically connected.

Because the communication between each of the graphene nanoribbons takes place via an electromagnetic wave, instead of the physical movement of electrons, Friedman expects that communication will be much faster, with the potential for terahertz clock speeds. In addition, these carbon materials can be made smaller than silicon-based transistors, which are nearing their size limit due to silicon’s limited material properties.

“This was a great interdisciplinary collaborative team effort,” Friedman said, “combining my circuit proposal with physics analysis by Jean-Pierre Leburton and Anuj Girdhar at the University of Illinois at Urbana-Champaign; technology guidance from Ryan Gelfand at the University of Central Florida; and systems insight from Alan Sahakian, Allen Taflove, Bruce Wessels, Hooman Mohseni and Gokhan Memik at Northwestern.”

While the concept is still on the drawing board, Friedman said work toward a prototype of the all-carbon, cascaded spintronic computing system will continue in the interdisciplinary NanoSpinCompute research laboratory, which he directs at UT Dallas.

Silicon based CMOS (Complementary metal-oxide semiconductors) technology has truly shaped our world. It enables most of the electronics that we rely on today including computers, smartphones and digital cameras. However, to continue the path of progress in the electronics industry new technology must be developed and a key feature of this is the ability to integrate CMOS with other semiconductors. Now, Graphene Flagship researchers from ICFO (The Institute of Photonic Sciences in Barcelona) have shown that it is possible to integrate graphene into a CMOS integrated circuit.

This is graphene integrated onto CMOS pixels. Credit: Fabien Vialla

This is graphene integrated onto CMOS pixels. Credit: Fabien Vialla

In their paper published in the journal Nature Photonics they combine this graphene-CMOS device with quantum dots to create an array of photodetectors, producing a high resolution image sensor. When used as a digital camera this device is able to sense UV, visible and infrared light at the same time. This is just one example of how this device might be used, others include in microelectronics, sensor arrays and low-power photonics.

“The development of this monolithic CMOS-based image sensor represents a milestone for low-cost, high-resolution broadband and hyperspectral imaging systems” ICREA Professor at ICFO, Frank Koppens, highlights. He assures that “in general, graphene-CMOS technology will enable a vast amount of applications, that range from safety, security, low cost pocket and smartphone cameras, fire control systems, passive night vision and night surveillance cameras, automotive sensor systems, medical imaging applications, food and pharmaceutical inspection to environmental monitoring, to name a few”.

These results were enabled by the collaboration between Graphene Flagship Partner Graphenea (a Spanish graphene supplier) and ICFO, within the optoelectronics workpackage of the Graphene Flagship.

By creating a hybrid graphene and quantum dot system on a CMOS wafer using a layering and patterning approach, the Flagship team solved a complex problem with a simple solution. First the graphene is deposited, then patterned to define the pixel shape and finally a layer of PbS colloidal quantum dots is added. The photoresponse of this system is based on a photogating effect, which starts as the quantum dot layer absorbs light and transfers it as photo-generated holes or electrons to the graphene, where they circulate due to a bias voltage applied between two pixel contacts. The photo signal is then sensed by the change in conductivity of the graphene, with graphene’s high charge mobility allowing for the high sensitivity of the device.

As Stijn Goossens comments, “No complex material processing or growth processes were required to achieve this graphene-quantum dot CMOS image sensor. It proved easy and cheap to fabricate at room temperature and under ambient conditions, which signifies a considerable decrease in production costs. Even more, because of its properties, it can be easily integrated on flexible substrates as well as CMOS-type integrated circuits.”

The commercial applications of this research and the potential for imaging and sensing technology are now being explored in ICFO’s Launchpad incubator.

Professor Andrea Ferrari, Science and Technology Officer and Chair of the Management Panel of the Graphene Flagship added: “The integration of graphene with CMOS technology is a cornerstone for the future implementation of graphene in consumer electronics. This work is a key first step, clearly demonstrating the feasibility of this approach. The Flagship has put a significant investment in the system level integration of graphene, and this will increase as we move along the technology and innovation roadmap”.