Category Archives: Device Architecture

Worldwide semiconductor wafer-level manufacturing equipment (WFE) revenue totaled $37.4 billion in 2016, an 11.3 percent increase from 2015, according to final results by Gartner, Inc. The top 10 vendors accounted for 79 percent of the market, up 2 percent from 2015.

“Spending on 3D NAND and leading-edge logic process drove growth in the market in 2016,” said Takashi Ogawa, research vice president at Gartner. “This spending was driven by momentum for high-end services in data centers and requirements for faster processors and high-volume memory for mobile devices.”

Applied Materials continued to lead the WFE market with 20.5 percent growth in 2016 (see Table 1). The active investment in 3D device manufacturing provided significant momentum in Applied’s etch revenue, specifically in the conductor etch segment. Screen Semiconductor Solutions experienced the highest growth in the market, with 41.5 percent. This was due to a combination of the appreciation of the Japanese Yen against the U.S. dollar, which elevated dollar-based sales estimates and the demand in premium smartphone and data center servers for big data analysis that drove investment in 3D-NAND capacity and leading-edge technology in foundries.

Table 1

Top 10 Companies’ Revenue From Shipments of Total Wafer-Level Manufacturing Equipment, Worldwide (Millions of U.S. Dollars)

Rank 2015

Rank 2014

Vendor

2016 Revenue

2016 Market Share (%)

2015

Revenue

2015 Market Share (%)

2015-2016 Growth (%)

1

1

Applied Materials

7,736.9

20.7

6,420.2

19.1

20.5

2

4

Lam Research

5,213.0

13.9

4,808.3

14.3

8.4

3

2

ASML

5,090.6

13.6

4,730.9

14.1

7.6

4

3

Tokyo Electron

4,861.0

13.0

4,325.0

12.9

12.4

5

5

KLA-Tencor

2,406.0

6.4

2,043.2

6.1

17.8

6

6

Screen Semiconductor Solutions

1,374.9

3.7

971.5

2.9

41.5

7

7

Hitachi High-Technologies

980.2

2.6

788.3

2.3

24.3

8

8

Nikon

731.5

2.0

724.2

2.2

1.0

9

9

Hitachi Kokusai

528.4

1.4

633.8

1.9

-16.6

10

13

ASM International

496.9

1.3

582.5

1.7

-14.7

Others

7,988.0

21.4

7,586.2

22.6

5.3

Total Market

37,407.3

100.0

33,613.7

100

11.3

Source: Gartner (April 2017)

Additional information is provided in the Gartner report “MarketShare: SemiconductorWaferFab Equipment, Worldwide, 2016.” The report provides rankings and market share for the top 10 vendors. In 2015, Gartner changed the segment reporting to focus on wafer-level manufacturing and is no longer providing segment details for die-level packaging or automatic test. This report is limited to wafer-level manufacturing equipment.

Worldwide PC shipments totaled 62.2 million units in the first quarter of 2017, a 2.4 percent decline from the first quarter of 2016, according to preliminary results by Gartner, Inc. The first quarter of 2017 was the first time since 2007 that the PC market experienced shipments below 63 million units in a quarter.

The PC industry experienced modest growth in the business PC market, but this was offset by declining consumer demand. Consumers continued to refrain from replacing older PCs, and some consumers have abandoned the PC market altogether. The business segment still sees the PC as an important device, and it’s the main work device for businesses.

“While the consumer market will continue to shrink, maintaining a strong position in the business market will be critical to keep sustainable growth in the PC market. Winners in the business segment will ultimately be the survivors in this shrinking market,” said Mikako Kitagawa, principal analyst at Gartner. “Vendors who do not have a strong presence in the business market will encounter major problems, and they will be forced to exit the PC market in the next five years. However, there will also be specialized niche players with purpose-built PCs, such as gaming PCs and ruggedized laptops.”

“The top three vendors — Lenovo, HP and Dell — will battle for the large-enterprise segment. The market has extremely limited opportunities for vendors below the top three, with the exception of Apple, which has a solid customer base in specific verticals.”

The competition among the top three vendors intensified in the first quarter of 2017. Lenovo and HP were in a virtual tie for the top spot. Lenovo accounted for 19.9 percent of worldwide PC shipments (see Table 1), followed by HP with 19.5 percent share, and Dell at 15 percent share. Lenovo’s growth exceeded the regional average in all key regions except the U.S.

Table 1
Preliminary Worldwide PC Vendor Unit Shipment Estimates for 1Q17 (Thousands of Units)

Company

1Q17 Shipments

1Q17 Market Share (%)

1Q16 Shipments

1Q16 Market Share (%)

1Q17-1Q16 Growth (%)

Lenovo

12,377

19.9

12,226

19.2

1.2

HP Inc.

12,118

19.5

11,383

17.9

6.5

Dell

9,351

15.0

9,040

14.2

3.4

Asus

4,547

7.3

5,287

8.3

-14.0

Apple

4,217

6.8

4,034

6.3

4.5

Acer Group

4,190

6.7

4,266

6.7

-1.8

Others

15,380

24.7

17,486

27.4

-12.0

Total

62,180

100.0

63,721

100.0

-2.4

Notes: Data includes desk-based PCs, notebook PCs and ultramobile premiums (such as Microsoft Surface), but not Chromebooks or iPads. All data is estimated based on a preliminary study. Final estimates will be subject to change. The statistics are based on shipments selling into channels. Numbers may not add up to totals shown due to rounding.
Source: Gartner (April 2017)

HP showed the strongest growth among the top six vendors, as its global PC shipments increased 6.5 percent in the first quarter of 2017. HP’s shipments grew in all regions, and it did especially well in the U.S. market, where it had a 15.9 percent increase in PC shipments (see Table 2).

Dell has achieved four consecutive quarters of year-over-year growth. It had PC shipment increases in all regions except the U.S. Dell enhanced its channel program and expanded its share in the large-enterprise market.

The PC industry is also experiencing a price increase. Over two years ago, the price hike was attributed to the local currency deterioration against the U.S. dollar. This time around, the price hike is due to a component shortage.

DRAM prices have doubled since the middle of 2016, and SSD has been in short supply as well,” Ms. Kitagawa said. “The price hike will suppress PC demand even further in the consumer market, discouraging buyers away from PC purchases unless it is absolutely necessary. The price hike started affecting the market in 1Q17. This issue will grow into a much bigger problem in 2Q17, and we expect it to continue throughout 2017.”

In the U.S., PC shipments totaled 12.3 million units in the first quarter of 2017, a 2.4 percent decline from the first quarter of 2016. The U.S. market has experienced a modest decline for two quarters. Much of the decline is attributed to the weak consumer market.

Table 2
Preliminary U.S. PC Vendor Unit Shipment Estimates for 1Q17 (Thousands of Units)

Company

1Q17 Shipments

1Q17 Market Share (%)

1Q16 Shipments

1Q16 Market Share (%)

1Q17-1Q16 Growth (%)

HP Inc.

3,572

29.1

3,083

24.5

15.9

Dell

3,238

26.4

3,385

26.9

-4.3

Lenovo

1,720

14.0

1,785

14.2

-3.6

Apple

1,470

12.0

1,483

11.8

-0.9

Asus

503

4.1

636

5.1

-20.8

Others

1,755

14.3

2,195

17.5

-20.0

Total

12,260

100.0

12,566

100.0

-2.4

Notes: Data includes desk-based PCs, notebook PCs and ultramobile premiums (such as Microsoft Surface), but not Chromebooks or iPads. All data is estimated based on a preliminary study. Final estimates will be subject to change. The statistics are based on shipments selling into channels. Numbers may not add up to totals shown due to rounding.
Source: Gartner (April 2017) 

PC shipments in EMEA totaled 17.9 million units in the first quarter of 2017, a 6.9 percent decline year over year. All major regions in EMEA experienced a decline in the first quarter. However, Russia saw single-digit PC growth, which was attributed to stabilization of the local economy.

The Asia/Pacific PC market showed some stabilization, as PC shipments totaled 22.8 million units in the first quarter of 2017, a 0.8 percent decline from the first quarter of 2016. PC spending in China began to show a modest recovery. Steady economic conditions were an influencing factor driving a PC refresh.

These results are preliminary. Final statistics will be available soon to clients of Gartner’s PC Quarterly Statistics Worldwide by Region program. This program offers a comprehensive and timely picture of the worldwide PC market, allowing product planning, distribution, marketing and sales organizations to keep abreast of key issues and their future implications around the globe.

Samsung Electronics Co., Ltd. announced today that its second generation 10-nanometer (nm) FinFET process technology, 10LPP (Low Power Plus), has been qualified and is ready for production. With further enhancement in 3D FinFET structure, 10LPP allows up to 10-percent higher performance or 15-percent lower power consumption compared to the first generation 10LPE (Low-Power Early) process with the same area scaling.

Samsung was the first in the industry to begin mass production of system-on-chips (SoCs) products on 10LPE last October. The latest Samsung Galaxy S8 smartphones are powered by some of these SoCs.

To meet long-term demand for the 10nm process for a wide range of customers, Samsung has started installing production equipment at its newest S3-line in Hwaseong, Korea. The S3-line is expected to be ready for production by the fourth quarter of this year.

“With our successful 10LPE production experience, we have commenced production of the 10LPP to maintain our leadership in the advanced-node foundry market,” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “10LPP will be one of our key process offerings for high performance mobile, computing and network applications, and Samsung will continue to offer the most advanced logic process technology.”

In 2016, annual global semiconductor sales reached their highest-ever point, at $339 billion worldwide. In that same year, the semiconductor industry spent about $7.2 billion worldwide on wafers that serve as the substrates for microelectronics components, which can be turned into transistors, light-emitting diodes, and other electronic and photonic devices.

A new technique developed by MIT engineers may vastly reduce the overall cost of wafer technology and enable devices made from more exotic, higher-performing semiconductor materials than conventional silicon.

The new method, reported today in Nature, uses graphene — single-atom-thin sheets of graphite — as a sort of “copy machine” to transfer intricate crystalline patterns from an underlying semiconductor wafer to a top layer of identical material.

The engineers worked out carefully controlled procedures to place single sheets of graphene onto an expensive wafer. They then grew semiconducting material over the graphene layer. They found that graphene is thin enough to appear electrically invisible, allowing the top layer to see through the graphene to the underlying crystalline wafer, imprinting its patterns without being influenced by the graphene.

Graphene is also rather “slippery” and does not tend to stick to other materials easily, enabling the engineers to simply peel the top semiconducting layer from the wafer after its structures have been imprinted.

Jeehwan Kim, the Class of 1947 Career Development Assistant Professor in the departments of Mechanical Engineering and Materials Science and Engineering, says that in conventional semiconductor manufacturing, the wafer, once its crystalline pattern is transferred, is so strongly bonded to the semiconductor that it is almost impossible to separate without damaging both layers.

“You end up having to sacrifice the wafer — it becomes part of the device,” Kim says.

With the group’s new technique, Kim says manufacturers can now use graphene as an intermediate layer, allowing them to copy and paste the wafer, separate a copied film from the wafer, and reuse the wafer many times over. In addition to saving on the cost of wafers, Kim says this opens opportunities for exploring more exotic semiconductor materials.

“The industry has been stuck on silicon, and even though we’ve known about better performing semiconductors, we haven’t been able to use them, because of their cost,” Kim says. “This gives the industry freedom in choosing semiconductor materials by performance and not cost.”

Kim’s research team discovered this new technique at MIT’s Research Laboratory of Electronics. Kim’s MIT co-authors are first author and graduate student Yunjo Kim; graduate students Samuel Cruz, Babatunde Alawonde, Chris Heidelberger, Yi Song, and Kuan Qiao; postdocs Kyusang Lee, Shinhyun Choi, and Wei Kong; visiting research scholar Chanyeol Choi; Merton C. Flemings-SMA Professor of Materials Science and Engineering Eugene Fitzgerald; professor of electrical engineering and computer science Jing Kong; and assistant professor of mechanical engineering Alexie Kolpak; along with Jared Johnson and Jinwoo Hwang from Ohio State University, and Ibraheem Almansouri of Masdar Institute of Science and Technology.

Graphene shift

Since graphene’s discovery in 2004, researchers have been investigating its exceptional electrical properties in hopes of improving the performance and cost of electronic devices. Graphene is an extremely good conductor of electricity, as electrons flow through graphene with virtually no friction. Researchers, therefore, have been intent on finding ways to adapt graphene as a cheap, high-performance semiconducting material.

“People were so hopeful that we might make really fast electronic devices from graphene,” Kim says. “But it turns out it’s really hard to make a good graphene transistor.”

In order for a transistor to work, it must be able to turn a flow of electrons on and off, to generate a pattern of ones and zeros, instructing a device on how to carry out a set of computations. As it happens, it is very hard to stop the flow of electrons through graphene, making it an excellent conductor but a poor semiconductor.

Kim’s group took an entirely new approach to using graphene in semiconductors. Instead of focusing on graphene’s electrical properties, the researchers looked at the material’s mechanical features.

“We’ve had a strong belief in graphene, because it is a very robust, ultrathin, material and forms very strong covalent bonding between its atoms in the horizontal direction,” Kim says. “Interestingly, it has very weak Van der Waals forces, meaning it doesn’t react with anything vertically, which makes graphene’s surface very slippery.”

Copy and peel

The team now reports that graphene, with its ultrathin, Teflon-like properties, can be sandwiched between a wafer and its semiconducting layer, providing a barely perceptible, nonstick surface through which the semiconducting material’s atoms can still rearrange in the pattern of the wafer’s crystals. The material, once imprinted, can simply be peeled off from the graphene surface, allowing manufacturers to reuse the original wafer.

The team found that its technique, which they term “remote epitaxy,” was successful in copying and peeling off layers of semiconductors from the same semiconductor wafers. The researchers had success in applying their technique to exotic wafer and semiconducting materials, including indium phosphide, gallium arsenenide, and gallium phosphide — materials that are 50 to 100 times more expensive than silicon.

Kim says that this new technique makes it possible for manufacturers to reuse wafers — of silicon and higher-performing materials — “conceptually, ad infinitum.”

An exotic future

The group’s graphene-based peel-off technique may also advance the field of flexible electronics. In general, wafers are very rigid, making the devices they are fused to similarly inflexible. Kim says now, semiconductor devices such as LEDs and solar cells can be made to bend and twist. In fact, the group demonstrated this possibility by fabricating a flexible LED display, patterned in the MIT logo, using their technique.

“Let’s say you want to install solar cells on your car, which is not completely flat — the body has curves,” Kim says. “Can you coat your semiconductor on top of it? It’s impossible now, because it sticks to the thick wafer. Now, we can peel off, bend, and you can do conformal coating on cars, and even clothing.”

Going forward, the researchers plan to design a reusable “mother wafer” with regions made from different exotic materials. Using graphene as an intermediary, they hope to create multifunctional, high-performance devices. They are also investigating mixing and matching various semiconductors and stacking them up as a multimaterial structure.

“Now, exotic materials can be popular to use,” Kim says. “You don’t have to worry about the cost of the wafer. Let us give you the copy machine. You can grow your semiconductor device, peel it off, and reuse the wafer.”

A team of Columbia Engineering researchers, led by Applied Physics Assistant Professor Nanfang Yu, has invented a method to control light propagating in confined pathways, or waveguides, with high efficiency by using nano-antennas. To demonstrate this technique, they built photonic integrated devices that not only had record-small footprints but were also able to maintain optimal performance over an unprecedented broad wavelength range.

Artistic illustration of a photonic integrated device that in one arm an incident fundamental waveguide mode (with one lobe in the waveguide cross-section) is converted into the second-order mode (with two lobes in the waveguide cross-section), and in the other arm the incident fundamental waveguide mode is converted into strong surface waves, which could be used for on-chip chemical and biological sensing. Credit: Nanfang Yu/Columbia Engineering

Artistic illustration of a photonic integrated device that in one arm an incident fundamental waveguide mode (with one lobe in the waveguide cross-section) is converted into the second-order mode (with two lobes in the waveguide cross-section), and in the other arm the incident fundamental waveguide mode is converted into strong surface waves, which could be used for on-chip chemical and biological sensing. Credit: Nanfang Yu/Columbia Engineering

Photonic integrated circuits (ICs) are based on light propagating in optical waveguides, and controlling such light propagation is a central issue in building these chips, which use light instead of electrons to transport data. Yu’s method could lead to faster, more powerful, and more efficient optical chips, which in turn could transform optical communications and optical signal processing. The study is published online in Nature Nanotechnology April 17.

“We have built integrated nanophotonic devices with the smallest footprint and largest operating bandwidth ever,” Yu says. “The degree to which we can now reduce the size of photonic integrated devices with the help of nano-antennas is similar to what happened in the 1950s when large vacuum tubes were replaced by much smaller semiconductor transistors. This work provides a revolutionary solution to a fundamental scientific problem: How to control light propagating in waveguides in the most efficient way?”

The optical power of light waves propagating along waveguides is confined within the core of the waveguide: researchers can only access the guided waves via the small evanescent “tails” that exist near the waveguide surface. These elusive guided waves are particularly hard to manipulate and so photonic integrated devices are often large in size, taking up space and thus limiting the device integration density of a chip. Shrinking photonic integrated devices represents a primary challenge researchers aim to overcome, mirroring the historical progression of electronics that follows Moore’s law, that the number of transistors in electronic ICs doubles approximately every two years.

Yu’s team found that the most efficient way to control light in waveguides is to “decorate” the waveguides with optical nano-antennas: these miniature antennas pull light from inside the waveguide core, modify the light’s properties, and release light back into the waveguides. The accumulative effect of a densely packed array of nano-antennas is so strong that they could achieve functions such as waveguide mode conversion within a propagation distance no more than twice the wavelength.

“This is a breakthrough considering that conventional approaches to realize waveguide mode conversion require devices with a length that is tens of hundreds of times the wavelength,” Yu says. “We’ve been able to reduce the size of the device by a factor of 10 to 100.”

Yu’s teams created waveguide mode converters that can convert a certain waveguide mode to another waveguide mode; these are key enablers of a technology called “mode-division multiplexing” (MDM). An optical waveguide can support a fundamental waveguide mode and a set of higher-order modes, the same way a guitar string can support one fundamental tone and its harmonics. MDM is a strategy to substantially augment an optical chip’s information processing power: one could use the same color of light but several different waveguide modes to transport several independent channels of information simultaneously, all through the same waveguide. “This effect is like, for example, the George Washington Bridge magically having the capability to handle a few times more traffic volume,” Yu explains. “Our waveguide mode converters could enable the creation of much more capacitive information pathways.”

He plans next to incorporate actively tunable optical materials into the photonic integrated devices to enable active control of light propagating in waveguides. Such active devices will be the basic building blocks of augmented reality (AR) glasses–goggles that first determine the eye aberrations of the wearer and then project aberration-corrected images into the eyes–that he and his Columbia Engineering colleagues, Professors Michal Lipson, Alex Gaeta, Demetri Basov, Jim Hone, and Harish Krishnaswamy are working on now. Yu is also exploring converting waves propagating in waveguides into strong surface waves, which could eventually be used for on-chip chemical and biological sensing.

At SEMICON Southeast Asia 2017, Dr. Chen Fusen, CEO of Kulicke & Soffa Pte Ltd, Singapore, will give a keynote on digital transformation in the manufacturing sector. Chen believes that Smart Manufacturing, or Industry 4.0, is no longer hype but real, and Asia needs to get on board sooner rather than later. SEMICON Southeast Asia (SEA) 2017, held at the SPICE arena in Penang on 25-27 April, is Asia’s premier showcase for electronics manufacturing innovation.

“Digital transformation has proven to provide solutions for addressing challenges in the manufacturing industry but there is still the issue of acceptance as well as lack of skills and knowledge that needs to be addressed,” said Chen. “With disruptive technology changing our world, I expect that more companies will see the value of their investments realised as this technology accelerates the creation of more individualised products and services.”

Dr. Hai Wang from NXP Semiconductors Singapore Pte Ltd agreed that more consumer-related innovations would stem from digital transformation as demand for solutions that provide efficiency and security increases. “At NXP, we look at developing advanced cyber security solutions for the automotive industry, such as tracking and analysing intelligence around connected and automated vehicles, which will help to counter any adverse threats in real time. These innovations are real and will soon mark a shift in the future of automation and manufacturing. It is vital that we embrace the change and adapt accordingly,” he said.

Other speakers at SEMICON SEA also feel strongly about the importance of Smart Manufacturing and digital transformation. David Chang of HTC Corporation, Taiwan, sees a dramatic shift in the value of being a “smart” manufacturer to address to the rising demand in consumer products and services innovation. “We have seen virtual reality technology offered by products such as HTC VIVE(TM) really shaping the future of the world. Transformative innovations such as this will pave the way for disruptive technology to be coupled into business models to benefit consumers in the long term,” he said.

These three speakers will join a long list of thought leaders from the electronics manufacturing sector – including Jamie Metcalfe from Mentor Graphics U.S., Chiang Gai Kit from Omron Asia Pacific Singapore, Ranjan Chatterjee from Cimetrix U.S. and Duncan Lee from Intel Products Malaysia – to speak at SEMICON SEA 2017. Topics discussed will cover issues relevant to the transformation of the manufacturing industry ranging from next-generation manufacturing to system-level integration, including exhibitions that will highlight the market and technology trends that are driving investment and growth in all sectors across the region.

The conference also aims to champion regional collaboration through new business opportunities for customers and foster stronger cross-regional engagement through reaching buyers, engineers and key decision-makers in the Southeast Asia microelectronics industry, including buyers from Malaysia, Singapore, Thailand, Indonesia, the Philippines, and Vietnam.

Learn more about SEMICON Southeast Asia 2017 in Penang, Malaysia on 25-27 April: http://www.semiconsea.org/.

As GaN Systems’ gallium nitride transistors revolutionize the power electronics market, the company’s funding partners are being recognized for their investment success. After releasing its 8th annual Global Cleantech 100 list, Cleantech Group (CTG) has awarded GaN Systems investor, Crysalix Venture Capital, the 2017 Financial Investor of the Year Award. The Global Cleantech 100 is a peer-reviewed list of the top private companies involved in innovative clean technology, and that have the greatest potential to impact the future of a wide range of industries within a 5-10 year timeframe. In a parallel development, in its 2016 “Year in Review” report, the CVCA (Canadian Venture Capital and Private Equity Association) reported that GaN Systems’ funding partner, Cycle Capital Management, was recognized for being the most active cleantech venture capital firm in Canada in 2016. Additionally, Cycle Capital was Canada’s 2nd most active independent private venture capital firm, consummating 29 deals and investing at total investment of $132M. According to the CVCA report, Canadian cleantech investments for 2016 experienced a 200% increase over the previous year.

Chrysalix Venture Capital was selected from a field of over 11,000 peer-reviewed nominees. They were chosen for having the highest percentage – in excess of 60% – of their qualifying portfolio companies on the 2017 Global Cleantech 100 list. Chrysalix Venture Capital is a technology-focused investment firm that invests in companies that bring disruptive innovation to the world’s largest industries. GaN Systems, a developer of gallium nitride power switching semiconductors, is one of seven such companies in the investment firm’s portfolio that are also included in the Global Cleantech 100 list.

As stated by Chrysalix President and CEO, Wal van Lierop, “We are honored to be recognized as the Financial Investor of the Year at this year’s Global Cleantech 100. This award is a great endorsement of our portfolio and validation of Chrysalix’s strategy of targeting breakthrough industrial innovations leveraging intelligent systems and components, which we pioneered in our last fund and have made the central focus of our new Chrysalix RoboValley Fund.”

Cycle Capital invests in cleantech entrepreneurial companies that are dedicated to fostering a sustainable future and that produce more with less. Commenting on how GaN Systems fits into its portfolio, Cycle Capital’s Founder and Managing Partner Andrée-Lise Méthot said, “We’re happy to share these results with our portfolio companies because it’s by investing in globally competitive companies led by great entrepreneurial teams like GaN Systems that we become the leader of the cleantech investment in Canada.”

“GaN Systems is proud to be a member of Chrysalix Venture Capital’s portfolio of leading-edge technology companies,” remarked GaN Systems CEO, Jim Witham. “We congratulate our funding partner on being recognized for their forward-thinking, and for winning this well-deserved and highly prestigious award.” Mr. Witham went on to congratulate Cycle Capital, “We’re extremely proud to be a member of the Cycle Capital portfolio of companies who are at the vanguard of the cleantech revolution. By investing in GaN Systems, together we are helping to reduce the world’s exploding demand for more energy, while simultaneously enabling our customers with solutions that give them a competitive advantage.”

Worldwide semiconductor revenue is forecast to total $386 billion in 2017, an increase of 12.3 percent from 2016, according to Gartner, Inc. Favorable market conditions that gained momentum in the second half of 2016, particularly for commodity memory, have accelerated and raised the outlook for the market in 2017 and 2018. However, the memory market is fickle, and additional capacity in both DRAM and NAND flash is expected to result in a correction in 2019.

“While price increases for both DRAM and NAND flash memory are raising the outlook for the overall semiconductor market, it will also put pressure on margins for system vendors of smartphones, PCs and servers,” said Jon Erensen, research director at Gartner. “Component shortages, a rising bill of materials, and the prospect of having to counter by raising average selling prices (ASPs) will create a volatile market in 2017 and 2018.”

PC DRAM pricing has doubled since the middle of 2016. A 4GB module that cost $12.50 has jumped to just under $25 today. NAND flash ASPs increased sequentially in the second half of 2016 and the first quarter of 2017. Pricing for both DRAM and NAND is expected to peak in the second quarter of 2017, but relief is not expected until later in the year as content increases in key applications, such as smartphones, have vendors scrambling for supply.

“With memory vendors expanding their margins though 2017, the temptation will be to add new capacity,” said Mr. Erensen. “We also expect to see China make a concerted effort to join the memory industry, setting the market up for a downturn in 2019.”

Unit production estimates for premium smartphones, graphics cards, video game consoles and automotive applications have improved and contributed to the stronger outlook in 2017. In addition, electronic equipment with heavy exposure to DRAM and NAND flash saw semiconductor revenue estimates increase. This includes PCs, ultramobiles, servers and solid-state drives.

“The outlook for emerging opportunities for semiconductors in the Internet of Things (IoT) and wearable electronics remains choppy with these markets still in the early stages of development and too small to have a significant impact on overall semiconductor revenue growth in 2017,” said Mr. Erensen.

To construct magnetic memories, elements with two stable magnetization states are needed. Promising candidate for such magnetic elements are tiny rings, typically of the order of few micrometers, with clockwise or counterclockwise magnetization as the two states. Unfortunately, switching between those two states directly requires a circular magnetic field which is not easy to achieve.

A magnetic field pulse switches the initial vortex state to "onion state" with two walls. In the subsequent magnetic snapshots the domain wall motion is shown. After 58 ns both walls meet and annihilate, thus completing the switching process into the opposite sense of rotation. Credit: HZB

A magnetic field pulse switches the initial vortex state to “onion state” with two walls. In the subsequent magnetic snapshots the domain wall motion is shown. After 58 ns both walls meet and annihilate, thus completing the switching process into the opposite sense of rotation. Credit: HZB

Switching in asymmetric nanorings

But this problem can be solved, as demonstrated by a team of scientists from several institutions in Germany including Helmholtz-Zentrum Berlin: If the hole in the ring is slightly displaced, thus making the ring thinner on one side, a simple, uniaxial magnetic field pulse of some nanoseconds duration can switches between the two possible “vortex states” used for data storage (clockwise and counterclockwise).

Short magnetic field pulse is sufficient

The scientists recorded the time evolution of the magnetization dynamics of the device at the Maxymus-Beamline at BESSY II employing time-resolved x-ray microscopy during and after the short magnetic field pulse was applied. They observed how the magnetic field pulse leads in a first step to an intermediate “onion state” in the ring. This state is characterized by two domain walls, where different magnetization zones meet each other. After the external field pulse has vanished, these domain walls move towards each other and annihilate, which results in a stable opposite magnetization of the ring “vortex state”.

Very fast process for spintronics

“Our measurements show domain wall automotion with an average velocity of about 60 m/s. This is very fast for spintronic devices at zero applied field,” Dr. Mohamad-Assaad Mawass, lead author of the publication in Physical Review Applied, points out. Mawass has worked on these experiments already for his PhD at Johannes Gutenberg University Mainz (group of Prof. Kläui) in a joined project with Max Planck Institute for intelligent system at Stuttgart (Schütz-Department). He then continued his research as a postdoc research Scientist at X-PEEM beamline at HZB.

Details of domain wall motion observed

Another observation concerns the effect of the detailed topological nature of the walls in the annihilation process. According to the results, this effect influence the dynamics only on a local scale where walls experience an attractive or repulsive interaction once they get very close to each other without inhibiting the annihilation of walls through automotion. “The domain wall inertia and the stored energy, in the system, allows the walls to overcome both the local extrinsic pinning and the topological repulsion between DWs carrying the same winding number,” said Mawass. “We believe to have identified a robust and reliable switching process by domain wall automotion in ferromagnetic rings,” Mawass states. “This could pave the way for further optimization of these devices.”

The new, higher-speed DDR4 DRAM generation gained significant marketshare in 2016, representing 45% of total DRAM sales. Previously, DDR3 DRAM, including low-power versions used in tablets, smartphones, and notebook PCs, accounted for 84% of total DRAM sales in 2014 and 76% in 2015, but in 2016, DDR4 price premiums evaporated and prices fell to nearly the same ASP as DDR3 DRAMs. A growing number of microprocessors, like Intel’s newest 14nm x86 Core processors, now contain DDR4 controllers and interfaces.  As a result, IC Insights expects DDR4 to become the dominant DRAM generation in 2017 with 58% marketshare versus 39% for DDR3 (Figure 1).

Figure 1

Figure 1

The Joint Electron Devices Engineering Council (JEDEC) officially launched the fourth generation of DDR in 2012.  In 2014, DDR4 memories first began appearing on the market in DRAM modules for powerful servers and a small number of high-end desktop computers, which had souped-up motherboards or the “extreme” versions of Intel’s 22nm Haswell-E processors for high-performance gaming software and PC enthusiasts, but volume sales remained low until 2015, when data centers and Internet companies began loading up servers with the new-generation memories to increase performance and lower power consumption. In 2016, DDR4 memories quickly spread into more data center servers, mainframes, and high-end PCs, accounting for about 45% of total DRAM sales versus 20% in 2015.  In 2017, DDR4 will move into more notebook PCs, high-end tablets, and smartphones and is expected to hold a 58% share of DRAM sales.

The DDR4 standard contains a number of features that are expected to speed up memory operations and increase SDRAM storage in servers, notebook and desktop PCs, tablet computers, and a wide range of consumer electronics.  The DDR4 standard supports stacked memory chips with up to eight devices presenting a single signal load to memory controllers.  Compared to DDR3, DDR4 can potentially double the module density, double the speed, and lower power consumption up to 20%, thereby extending battery life in future 64-bit tablets and smartphones.

Meanwhile, the DRAM average selling price has been increasing very rapidly since mid-2016.  Figure 2 shows that the DRAM ASP increased 54% from $2.41 in April 2016 to $3.70 in February 2017.  As a result of this big increase, IC Insights raised its 2017 DRAM market forecast to $57.3 billion, which is a 39% increase over 2016.  IC Insights believes that DRAM ASPs will continue to trend upward through most of the first half of 2017, though probably not as rapidly as they did between the period from April 2016 to February 2017.

Figure 2

Figure 2

In its latest quarterly financial conference call, Micron indicated its DRAM outlook through the balance of its fiscal year 2017 (ending August 31) was very encouraging, with solid demand coming from PC, server, communication, automotive, and several other applications.

However, the bigger question for Micron and other top DRAM suppliers is available supply and whether (more accurately, when will) prices plateau and begin trending downward.  One indication that DRAM prices could soften in the second half of the year is the fact that Samsung and SK Hynix are bringing additional DRAM capacity online that features smaller process geometries. Samsung is slated to begin operations at its new Fab 18, in Pyeongtaek, South Korea in 2Q17.  Fab 18, with capacity of 300,000 300mm wafer starts per month, features five production lines that are dedicated primarily to making DRAM.  The company plans to begin DRAM operations at the fab using an 18nm process technology.

SK Hynix has transitioned most of its South Korean-based DRAM output from Fab M10 to Fab M14. With Fab M14 and its dedicated DRAM fab in Wuxi, China, SK Hynix has DRAM capacity of about 280,000 300mm wafer starts per month.  SK Hynix is manufacturing most of its DRAM at the 21nm node, but expects to begin using sub 20nm process technology later this year, thereby helping to reduce costs and increase the number of chips on a wafer.

Following a year of extraordinary gains in pricing, a boost to DRAM supply in the second half of 2017 could lead to reduced ASPs and the inevitable start of a cyclical slowdown in the DRAM market.

Participating in the DRAM market has always been a big challenge for suppliers.  Hot or cold, boom or bust—the DRAM market is rarely moving along in a steady, predictable manner.  For at least the first half of 2017, it appears that DRAM market will be very favorable for these top three suppliers.