Category Archives: Displays

Notch design of smartphone displays is estimated to raise manufacturing cost of display panels by more than 20 percent, according to IHS Markit.

According to the OLED Display Cost Model by IHS Markit, manufacturing cost of the 5.9-inch organic light-emitting diode (OLED) panel with notch design, as in the Apple iPhone X, is estimated to be $29. It is found to be 25 percent higher than manufacturing cost of full-display OLED panel without the notch design used in the 5.8-inch display for the Samsung Galaxy S9. Similar cost gap is also found in the thin-film transistor liquid crystal display (TFT-LCD). Manufacturing cost of a 6-inch notch TFT-LCD panel is estimated to be $19, 20 percent higher than similar-sized non-notch, full-display LCD panel.

“Notch cutting should accompany yield loss, resulting in increases in manufacturing cost. In case of TFT-LCD, a notch design may push up the manufacturing cost even to the level of rigid, full-screen OLED’s,” said Jimmy Kim, Ph.D. and senior principal analyst for display materials at IHS Markit. “For OLED panels, cost increase caused by notch design seems to be even higher.”

Quarterly shipments of the iPhone X, Apple’s first smartphone model using OLED panels, have reportedly been smaller than previous iPhone models’ so far, mainly due to higher selling price, caused by expensive OLED panels. “Apple seems to be in the middle of manufacturing optimization,” Kim said.

“Eventually, manufacturing cost for notch OLED will fall more rapidly than that for notch TFT-LCD. The plastic substrate for OLED is not as brittle as glass used in TFT-LCD, so it should be easier to cut the notch, theoretically.”

The OLED Display Cost Model by IHS Markit includes manufacturing cost analysis and forecasts of OLED display panels in mass production for smartwatch, smartphone, tablet PC and TV.

Organic light-emitting diodes (OLEDs) truly have matured enough to allow for first commercial products in form of small and large displays. In order to compete in further markets and even open new possibilities (automotive lighting, head-mounted-displays, micro displays, etc.), OLEDs need to see further improvements in device lifetime while operating at their best possible efficiency. Currently, intrinsic performance progress is solely driven by material development.

This is a graphic about improving OLEDS on the nanoscale. Credit: Joan Rafols Ribé (UAB) and Paul Anton Will (TU Dresden)To

Now researchers from the Universitat Autònoma de Barcelona and Technische Universität Dresden demonstrate the possibility of using ultrastable film formation to improve the performance of state-of-the-art OLEDs. In their joint paper published in Science Advances with the title ‘High-performance organic light-emitting diodes comprising ultrastable glass layers’, the researchers show in a detailed study significant increases of efficiency and operational stability (> 15% for both parameters and all cases, significantly higher for individual samples) are achieved for four different phosphorescent emitters. To achieve these results, the emission layers of the respective OLEDs were grown as ultrastable glasses – a growth condition that allows for thermodynamically most stable amorphous solids.

This finding is significant, because it is an optimization which does neither involve a change of materials used nor changes to the device architecture. Both are the typical levers for improvements in the field of OLEDs. This concept can universally be explored in every given specific OLED stack, which will be equally appreciated by leading industry. This in particular includes thermally activated delayed fluorescence (TADF) OLEDs, which see a tremendous research and development interest at the moment. Furthermore, the improvements that, as shown by the researchers, can be tracked back to differences on the exciton dynamics on the nanoscale suggest that also other fundamental properties of organic semiconductors (e.g. transport, charge separation, energy transfer) can be equally affected.

The 64th annual IEEE International Electron Devices Meeting(IEDM), to be held at the Hilton San Francisco Union Square hotel December 1-5, 2018, has issued a Call for Papers seeking the world’s best original work in all areas of microelectronics research and development.

The paper submission deadline this year is Wednesday, August 1, 2018. Authors are asked to submit four-page camera-ready papers. Accepted papers will be published as-is in the proceedings. A limited number of late-news papers will be accepted. Authors are asked to submit late-news papers announcing only the most recent and noteworthy developments. The late-news submission deadline is September 10, 2018.

At IEDM each year, the world’s best scientists and engineers in the field of microelectronics gather to participate in a technical program consisting of more than 220 presentations, along with a variety of panels, special sessions, Short Courses, a supplier exhibit, IEEE/EDS award presentations and other events highlighting leading work in more areas of the field than any other conference.

This year, special emphasis is placed on the following topics:

  • Neuromorphic computing/AI
  • Quantum computing devices and links
  • Devices for RF, 5G, THz and mmWave
  • Advanced memory technologies
  • More-than-Moore devices and integrations
  • Technologies for advanced logic nodes
  • Non-charge-based devices and systems
  • Sensors and MEMS devices
  • Package-device level interactions
  • Electron device simulation and modeling
  • Advanced characterization, reliability and noise
  • Optoelectronics, displays and imaging systems

Overall, papers in the following areas of technology are encouraged:

  • Circuit and Device Interaction
  • Characterization, Reliability and Yield
  • Compound Semiconductor and High-Speed Devices
  • Memory Technology
  • Modeling and Simulation
  • Nano Device Technology
  • Optoelectronics, Displays and Imagers
  • Power Devices
  • Process and Manufacturing Technology
  • Sensors, MEMS and BioMEMS

Further information

For more information, interested persons should visit the IEDM 2018 home page at www.ieee-iedm.org.

Memory devices employ a wide range of packaging technology from wire-bond leadframe and BGA to TSV.

BY SANTOSH KUMAR, Yole Développement, Lyon-Villeurbanne, France

The memory market is going through a strong growth phase. The total memory market grew by >50% YoY to more than US$125 billion in 2017 from US$79.4 billion in 2016. [1] RAM and NAND dominate the market, representing almost 95 % of standalone memory sales. There is a supply/demand mismatch in the market which is impacting on the ASP of memory devices, and as a result the large memory IDMs are reaping record profits. The memory industry has consolidated with the top five players – Samsung, SKHynix, Micron, Toshiba and Western Digital – accounting for 90% of the market.

The demand for memory is coming from all sectors but the mobile and computing (mainly servers) market is showing particularly strong growth. On average, the DRAM memory capacity per smartphone will rise more than threefold to reach around 6GB by 2022. DRAM cost per smartphone represents >10% of the bill of materials of the phone and is expected to increase further. The NAND capacity per smartphone will increase more than fivefold to reach >150GB by 2022. For servers, the DRAM capacity per unit will increase to a whopping 0.5TB by 2022, and the NAND capacity per SSD for the enterprise market will be in excess of 5TB by 2022. The growth in these markets is led by applications like deep learning, big-data, networking, AR/ VR, and autonomous driving. The automotive market, which traditionally used low density (low-MB) memory, will see the adoption of DRAM memory led by the emerging trend of autonomous driving and in-vehicle infotainment. The NOR flash memory market also saw a resurgence and is expected to grow at an impressive 16% CAGR to reach ~US$4.4 billion by 2022, due to its application in new areas such as AMOLED displays, touch display driver ICs and industrial IoTs.

On the supply side, the consolidation of players, the difficulty in migrating to advanced nodes due to technical challenges, and the need for higher investment to migrate from 2D to 3D NAND, has led to shortfall in both DRAM & NAND flash supply. DRAM players want to retain high ASPs (& high profitability) to justify the huge capex investment for advanced node migration and as such are not inclined to increase capacity. Entry of Chinese memory players will ease the supply side constraint, but it’ll not happen before 2020.

Memory device packaging

There are many variations of memory device packaging. This implies a wide range of packaging technology from the low pin count SOP package to the high pin-count TSV, all depending upon the specific product requirements such as density, performance, cost, etc. We have broadly identified five packaging platforms for memory devices: viz lead frame, wire-bond BGA, flip-chip BGA, WLCSP and TSV, even though in each platform there are many varia- tions and different nomenclature in industry.

The total memory package market is expected to grow at 4.6% CAGR2016-2022 to reach ~US$26 billion by 2022. [1] Wire-bond BGA accounted for more than 80% of the packaging market in dollar terms in 2016. Flip-chips, however, started making inroads in the DRAM memory packaging market and is expected to grow at ~20% CAGR in the next five years to account for more than 10% of the memorypackagingmarket.Currentlytheflip-chipmarket is only around 6% of the total memory packaging market. Flip-chip growth is led by its increased adoption in the DRAM PC/server segment fueled by a high bandwidth requirement.

Currently Samsung has already converted >90% of its DRAM packaging line. SK Hynix have started the conversion and other players will also adopt it in future. At Yole Développement (Yole), we believe that all DDR5 memory for PC/servers will move to flip-chip.

TSV is employed in high bandwidth memory devices requiring high bandwidth with low latency memory chips for high performance computing in various applications. In 2016 the TSV market was <1% of the total memory market. However, it is expected to grow by >30% CAGR to reach ~8% of memory packaging in dollar terms. WLSCP packaging is used in NOR flash and niche memory devices (EEPROMs/EPROM/ROM). It is expected to grow at >10% CAGR, but in terms of value will remain <1% of the market by 2022.

In mobile applications, memory packaging will mainly remain on the wire-bond BGA platform but will start to move into the multi-chip package (ePoP) for high end smartphones.

The main requirement of NAND flash devices is high storage density at low cost. NANDs are stacked using wire bonding to provide high density in a single package. The NAND packaging market is expected to reach ~ US$ 10 billion by 2022. NAND flash packaging will remain on the wire bond BGA platform and will not migrate to flip-chip. Toshiba, however, will start using TSV packaging in NAND devices to increase the data transfer rate for high end applications. Following Toshiba, we believe Samsung and SKHynix will also bring TSV packaged NAND devices into the market.

OSATs account for <20% of the memory packaging business

The total memory packaging market is estimated to have been ~US$20 billion in 2016. There are many OSATs involved in the memory packaging business, and >80% of the packaging (by value) is still done internally by OSATs. The majority of these are small OSATs and have only low-end packaging capability. Global memory IDMs have much experience in packaging, accumulated over years, and have their own internal large capacity. Therefore, there is limited opportunity for OSATs to make inroads into the packaging activity of IDMs. Many Chinese players, however, are entering the memory market with more than US$50 billion investment committed. [1] These new entrants do not have experience in memory assembly / packaging, unlike global IDMs, and they will outsource major packaging activities to OSATs. The flip-chip business for memory packaging will increase to 13% of the total market to reach US$3.5 billion in 2022. This is an opportunity for low-end memory OSATs to invest in flip-chip bumping and assembly capacity. Otherwise they will lose business to the big OSATs with advanced packaging capability.

Conclusion

The memory industry is going through a golden phase with strong demand coming from all sectors, particularly from the mobile and computing (mainly servers) markets.

Memory devices employ a wide range of packaging technology from wire-bond leadframe and BGA to TSV. Wire-bond BGA still accounts for the bulk of the memory packaging market. However, flip-chip technology will start making inroads in DRAM memory packaging and will grow at 20% CAGR (by revenue) over the next five years, accounting for ~13% of the total memory packaging market by 2022. The memory packaging market is mainly controlled by IDMs. OSATs have limited opportunity to impact IDM packaging activity. Many Chinese players, however, are entering the memory business and, unlike global IDMs, these new players lack experience in memory assembly/packaging and they outsource most of their packaging activity to OSATs.

SANTOSH KUMAR is a Senior Technology and Market Research Analyst at Yole Développement in France.

References

1. Memory Packaging Market and Technology Report 2017, Yole Développement

SEMI, the global industry association representing the electronics manufacturing supply chain, today announced that the WT | Wearable Technologies Conference 2018 USA will co-locate July 11-12 with SEMICON West 2018 in San Francisco. The electronics industry’s premier U.S. event, SEMICON West — July 10-12 at Moscone North and South — will highlight engines of industry expansion including smart transportation, smart manufacturing, smart medtech, smart data, big data, artificial intelligence, blockchain and the Internet of Things (IoT). Click here to register.

“We are excited that the WT | Wearables Technologies Conference has joined SEMICON West to co-locate in 2018,” said David Anderson, president of SEMI Americas. “Our strategic partnership brings new content and more value to our extended supply chain. Every day the semiconductor industry makes chips smaller and faster with ever-higher performance. These innovations enable new wearable applications for smart living, smart medtech and healthcare that are continuously improving our lives. The WT | Wearable Technologies Conference speakers at SEMICON West 2018 will demonstrate just how they use semiconductor technology to deliver leading-edge wearables.”

“It is a great pleasure to collaborate with the leading global electronics manufacturing association and its successful SEMICON West event,” said Christian Stammel, CEO of WT | Wearables Technologies. “Since the beginning of our platform in 2006, the semiconductor industry has been a major driver of wearables and IoT innovation. All major developments in the WT application markets like healthcare (smart patches), safety and security (tracking solutions), lifestyle and sport (smartwatches and wristbands) and in the industrial field (AR / VR) were driven by semiconductor and MEMS innovations. Our program of expert speakers at SEMICON West will share the latest insights in the wearables market as the SEMI and WT ecosystems explore collaboration and innovation opportunities.”

Technology trends in backplane technology are driving higher gas demand in display manufacturing. Specific gas requirements of process blocks are discussed, and various supply modes are reviewed.

BY EDDIE LEE, Linde Electronics, Hsinchu, Taiwan

Since its initial communalization in the 1990s, active matrix thin-film-transistor (TFT) displays have become an essential and indispensable part of modern living. They are much more than just televisions and smartphones; they are the primary communication and information portals for our day-to- day life: watches (wearables), appliances, advertising, signage, automobiles and more.

There are many similarities in the display TFT manufacturing and semiconductor device manufacturing such as the process steps (deposition, etch, cleaning, and doping), the type of gases used in these steps, and the fact that both display and semiconductor manufacturing both heavily use gases.

However, there are technology drivers and manufacturing challenges that differentiate the two. For semiconductor device manufacturing, there are technology limitations in making the device increasingly smaller. For display manufacturing, the challenge is primarily maintaining the uniformity of glass as consumers drive the demand for larger and thinner displays.

While semiconductor wafer size has maxed because of the challenges of making smaller features uniformly across the surface of the wafer, the size of the display mother glass has grown from 0.1m x 0.1m with 1.1mm thickness to 3m x 3m with 0.5mm thickness over the past 20 years due to consumer demands for larger, lighter, and more cost-effective devices.

As the display mother glass area gets bigger and bigger,so does the equipment used in the display manufacturing process and the volume of gases required. In addition, the consumer’s desire for a better viewing experience such as more vivid color, higher resolution, and lower power consumption has also driven display manufacturers to develop and commercialize active matrix organic light emitting displays (AMOLED).

Technology

Layers of display device

In general, there are two types of displays in the market today: active matrix liquid crystal display (AMLCD) and AMOLED. In its simplicity, the fundamental components required to make up the display are the same for AMLCD and AMOLED. There are four layers of a display device (FIGURE 1): a light source, switches that are the thin-film-transistor and where the gases are mainly used, a shutter to control the color selection, and the RGB (red, green, blue) color filter.

About backplane/TFT

The thin-film-transistors used for display are 2D transitional transistors, which are similar to bulk CMOS before FinFET. For the active matrix display, there is one transistor for each pixel to drive the individual RGB within the pixel. As the resolution of the display grows, the transistor size also reduces, but not to the sub-micron scale of semiconductor devices. For the 325 PPI density, the transistor size is approximately 0.0001 mm2 and for the 4K TV with 80 PPI density, the transistor size is approximately 0.001 mm2.

Technology trends TFT-LCD (thin-film-transistor liquid-crystal display) is the baseline technology. MO / White OLED (organic light emitting diode) is used for larger screens. LTPS / AMOLED is used for small / medium screens. The challenges for OLED are the effect of < 1 micron particles on yield, much higher cost compared to a-Si due to increased mask steps, and moisture impact to yield for the OLED step.

Mobility limitation (FIGURE 2) is one of the key reasons for the shift to MO and LTPS to enable better viewing experience from higher resolution, etc.

The challenge to MO is the oxidation after IGZO metalization / moisture prevention after OLED step, which decreases yield. A large volume of N2O (nitrous oxide) is required for manufacturing, which means a shift in the traditional supply mode might need to be considered.

Although AMLCD displays are still dominant in the market today, AMOLED displays are growing quickly. Currently about 25% of smartphones are made with AMOLED displays and this is expected to grow to ~40% by 2021. OLED televisions are also growing rapidly, enjoying double digit growth rate year over year. Based on IHS data, the revenue for display panels with AMOLED technol- ogies is expected to have a CAGR of 18.9% in the next five years while the AMLCD display revenue will have a -2.8% CAGR for the same period with the total display panel revenue CAGR of 2.5%. With the rapid growth of AMOLED display panels, the panel makers have accel- erated their investment in the equipment to produce AMOLED panels.

Types of backplanes

There are three types of thin-film-transistor devices for display: amorphous silicon (a-Si), low temperature polysilicon (LTPS), and metal oxide (MO), also known as transparent amorphous oxide semiconductor (TAOS). AMLCD panels typically use a-Si for lower-resolution displays and TVs while high-resolution displays use LTPS transistors, but this use is mainly limited to small and medium displays due to its higher costs and scalability limitations. AMOLED panels use LTPS and MO transistors where MO devices are typically used for TV and large displays (FIGURE 3).

How gases are used

This shift in technology also requires a change in the gases used in production of AMOLED panels as compared with the AMLCD panels. As shown in FIGURE 4, display manufacturing today uses a wide variety of gases.

These gases can be categorized into two types: Electronic Specialty gases (ESGs) and Electronic Bulk gases (EBGs) (FIGURE 5). Electronic Specialty gases such as silane, nitrogen trifluoride, fluorine (on-site generation), sulfur hexafluoride, ammonia, and phosphine mixtures make up 52% of the gases used in the manufacture of the displays while the Electronic Bulk gases–nitrogen, hydrogen, helium, oxygen, carbon dioxide, and argon – make up the remaining 48% of the gases used in the display manufacturing.

Key usage drivers

The key ga susage driver in the manufacturing of displays is PECVD (plasma-enhanced chemical vapor deposition), which accounts for 75% of the ESG spending, while dry etch is driving helium usage. LTPS and MO transistor production is driving nitrous oxide usage. The ESG usage for MO transistor production differs from what is shown in FIGURE 4: nitrous oxide makes up 63% of gas spend, nitrogen trifluoride 26%, silane 7%, and sulfur hexafluoride and ammonia together around 4%. Laser gases are used not only for lithography, but also for excimer laser annealing application in LTPS.

Silane: SiH4 is one of the most critical molecules in display manufacturing. It is used in conjunction with ammonia (NH3) to create the silicon nitride layer for a-Si transistor, with nitrogen (N2) to form the pre excimer laser anneal a-Si for the LTPS transistor, or with nitrous oxide (N2O) to form the silicon oxide layer of MO transistor.

Nitrogen trifluoride: NF3 is the single largest electronic material from spend and volume standpoint for a-Si and LTPS display production while being surpassed by N2O for MO production. NF3 is used for cleaning the PECVD chambers. This gas requires scalability to get the cost advantage necessary for the highly competitive market.

Nitrous oxide: Used in both LTPS and MO display production, N2O has surpassed NF3 to become the largest electronic material from spend and volume standpoint for MO production. N2O is a regional and localized product due to its low cost, making long supply chains with high logistic costs unfeasible. Averaging approximately 2 kg per 5.5 m2 of mother glass area, it requires around 240 tons per month for a typical 120K per month capacity generation 8.5 MO display production. The largest N2O compressed gas trailer can only deliver six tons of N2O each time and thus it becomes both costly and risky
for MO production.

Nitrogen: For a typical large display fab, N2 demand can be as high as 50,000 Nm3/hour, so an on-site generator, such as the Linde SPECTRA-N® 50,000, is a cost-effective solution that has the added benefit of an 8% reduction in CO2 (carbon dioxide) footprint over conventional nitrogen plants.

Helium: H2 is used for cooling the glass during and after processing. Manufacturers are looking at ways to decrease the usage of helium because of cost and availability issues due it being a non-renewable gas.

Gas distribution at the fab

N2 On-site generators: Nitrogen is the largest consumed gas at the fab, and is required to be available before the first tools are brought to the fab. Like major semiconductor fabs, large display fabs require very large amounts of nitrogen, which can only be economically supplied by on-site plants.

Cryogenic liquid truck trailers: Oxygen, argon, and carbon dioxide are produced at off-site plants and trucked short distances as cryogenic liquids in specialty vacuum-insulated tankers.
Compressed gas truck trailers: Other large volume gases like hydrogen and helium are supplied over longer distances in truck or ISO-sized tanks as compressed gases.

Individual packages: Specialty gases are supplied in individual packages. For higher volume materials like silane and nitrogen trifluoride, these can be supplied in large ISO packages holding up to 10 tons. Materials with smaller requirements are packaged in standard gas cylinders.

Blended gases: Laser gases and dopants are supplied as blends of several different gases. Both the accuracy and precision of the blended products are important to maintain the display device fabrication operating within acceptable parameters.

In-fab distribution: Gas supply does not end with the delivery or production of the material of the fab. Rather, the materials are further regulated with additional filtration, purification, and on-line analysis before delivery to individual production tools.

Conclusion

The consumer demand for displays that offer increas- ingly vivid color, higher resolution, and lower power consumption will challenge display makers to step up the technologies they employ and to develop newer displays such as flexible and transparent displays. The transistors to support these new displays will either be LTPS and / or MO, which means the gases currently being used in these processes will continue to grow. Considering the current a-Si display production, the gas consumption per area of the glass will increase by 25% for LTPS and ~ 50% for MO productions.

To facilitate these increasing demands, display manufacturers must partner with gas suppliers to identify which can meet their technology needs, globally source electronic materials to provide customers with stable and cost- effective gas solutions, develop local sources of electronic materials, improve productivity, reduce carbon footprint, and increase energy efficiency through on-site gas plants. This is particularly true for the burgeoning China display manufacturing market, which will benefit from investing in on-site bulk gas plants and collaboration with global materials suppliers with local production facilities for high-purity gas and chemical manufacturing.

Photolithography of organic semiconductors is an emerging technology that can enable high resolution OLED displays.

BY PAWEL MALINOWSKI and TUNGHUEI KE, imec, Leuven, Belgium

Modern society has grown accustomed to an overflow of visual information, with displays in the center of most user interfaces. The pace of introducing new technologies and of reducing cost of manufacturing has been impressive and does not seem to slow down. The most prominent examples are OLED displays (based on organic light emitting diodes), evolving from a curiosity only some years ago to a technology that is dominating the market position today. 2017 has seen major increase in both shipments (more than 400 million units) and revenue (around $25 billion) for AMOLED display panels (according to UBI Research and DSCC).

From the very beginning of OLED history, it was crucial to find a way to maintain efficient emission in stacks composed of very fragile materials. As most of the materials used in an OLED structure are highly sensitive to a lot of elements (e.g., air, moisture, solvents, temper- ature, radiation), protecting the device has always been crucial, both during fabrication and during operation. This has evolved into several research tracks. Firstly, great effort by material companies to synthesize new molecules and polymers resulted in many OLED families, both for thermal evaporation and solution processing. Secondly, equipment advances made it possible to uniformly deposit stacks on large substrates with indus- trial takt time. Thirdly, different encapsulations were developed to protect the OLED stack during usage to ensure enough lifetime for consumer applications. All of the above required years of research and significant investments, which makes it challenging to introduce new OLED manufacturing techniques and change the existing process flows.

At the same time, current manufacturing methods have their limitations. Two main approaches are color-by- white (WOLED) and side-by-side red-green-blue (RGB OLED), differing by the way that the colors are realized in subpixels (FIGURE 1). In WOLED, the light source is a continuous layer of a broadband (white) OLED emitter and the three basic colors are selected by passing the light through color filters (CF). The advantage is that the pixel density is limited only by the backplane resolution and the CF resolution, which is why this is the main concept used for OLED microdisplays with CMOS circuitry. The disad- vantage is that significant portion of the light is lost due to CF absorption, which impacts the display power efficiency. In RGB OLED, each subpixel is a different material stack, so each subpixel is a separate light emitter. This is typically realized by depositing each stack by thermal evaporation through a fine metal mask (FMM) and is used for most smartphone OLED displays. The advantage is that each color is optimized, so the display efficiency is much higher. At the same time, it is difficult to scale the FMM technique both in substrate size (masks tend to bend under their own weight, so the motherglass has to be cut for OLED deposition) and in resolution (standard masks are not suitable for resolutions above several hundred ppi and the cross-fading area limits the aperture ratio).

An alternative way to realize side-by-side RGB pixels is to use photolithography techniques known very well from the semiconductor industry (and used in displays for the TFT backplane fabrication). In such case, after depositing a blanket OLED stack, photoresists could be used to transfer the pattern and remove the unnec- essary material by etching (FIGURE 2). The challenge here is, again, susceptibility of OLED materials to solvents – using standard (semiconductor) photo- resist chemistry results in dissolution/removal of the stack. Still, the gains are definitely worth the extra effort, as litho can provide both very high pixel density (submicron pixel pitch) and, at the same time, very high aperture ratio (emitting area maximized thanks to minimizing pixel spacing). Over the years, some new approaches for photolithography have been proposed. One way, followed by Orthogonal Inc, is to use fluorinated materials which should not have any chemical interaction with the organic stacks (thus, orthogonal to OLED). The other approach, followed by imec together with Fujifilm, is to pattern organic stacks using a non-fluorinated, chemically amplified photoresist system.

For imec, R&D hub with long traditions of devel- oping new photolithography nodes, organic photolithography is a way to address the challenges of next- generation high resolution displays. In virtual and augmented reality (VR/AR) applications, the display is very near to the eye of the user. This results in very aggressive requirements in terms of pixel density in order to avoid annoying “pixilation.” The same goes for required minimum pixel spacing, to avoid “screen door effect”. With photolithography, these two challenges can be addressed simultaneously. The OSR photoresist system from Fujifilm can deliver lines and spaces with 1 μm pitch, which fits in the roadmap towards several thousand ppi resolution for the OLED frontplane. We have realized a dot pattern transfer to OLED emission layer with 3 μm pitch, which corresponds to 8400 ppi resolution in a monochrome array. After stripping off the photoresist, the EML remains on the substrate, as verified by photolumines- cence (FIGURE 3).

On the device level, we have fabricated OLED arrays with 10 μm pixel pitch (FIGURE 4), corresponding to 2500 ppi. In this case, an important parameter is the alignment accuracy, which defines how much of the total display area can be used for emission. Another limitation is the resolution of the PDL (pixel definition layer), a dielectric layer separating the OLED stack from the bottom contact level. The resolution of this layer limits the maximum opening that can be achieved, which translates to the aperture ratio of the pixel – or the percentage of the area that is used for OLED emission. In this example, the “photo- luminescence aperture ratio”, or the relation of the OLED island to the pixel area is around 50%, which is enabled by small spacing (<3 μm). However, the “electroluminescence aperture ratio”, of the relation of the area emitting light, is 25% because of the PDL area and the necessary overlap of the OLED island. Assuming minimum line spacing of 1 μm, one can envision PL ratio of 81% (9 x 9 μm) and EL ratio of 64% (8 x 8 μm) for a subpixel of 10 x 10 μm. With such scaling, the usable area of the array can be enlarged, which results in longer device lifetime (since we can reduce the driving current density) and in reduction or elimi- nation of the screen-door effects.

Obviously, interrupting the optimum deposition process in ultra-high vacuum and exposing the OLED stack to photolithography materials has an impact on the device performance. Just breaking the vacuum results in a hit on lifetime performance. Additionally, our initial process flow includes exposure of the stack to ambient atmosphere (air and humidity), as we have been using standard cleanroom equipment. In the beginning, such “worst case scenario” resulted in proof-of-concept of emitting OLEDs after patterning, but, unsurprisingly, with device lifetime of only few minutes. In the course of the development, we have introduced improvements on three fronts. Firstly, there have been continuous upgrades of the photoresist system to make it more compatible with the organic stack. Secondly, the process flow has been optimized to reduce the impact of process parameters on device performance. Thirdly, the OLED stacks have been tuned for robustness, for example by introducing additional protection layers for the most critical interfaces. All these actions resulted in device lifetimes of several hundred hours at 1000 nit luminance. As the lifetime is the major concern when it comes to the readiness of this technology, this is an ongoing effort to bring all the parameters to a level acceptable by the industry.

In parallel to performance improvement, we have been developing a route for patterning of multicolor arrays with photolithography. The main challenge in this case is to protect the previous “color” (OLED stack) while patterning the next one. Once this condition is satisfied, side-by-side arrays with several stacks can be realized – and, this is not limited to light emitters. Next to red-green-blue OLEDs, for example an organic photo- detector subpixel could be fabricated to add functionality to the display. In terms of manufacturing, each “color” of the frontplane would be fabricated in a similar way as it is done for each layer of the backplane.

In our recent work, we fabricated a 2-color passive OLED display and this prototype was demonstrated at the Touch Taiwan 2017 exhibition (FIGURE 5). The 1400 x 1400 pixel array has a subpixel pitch of 10 μm, resulting in a resolution of 1250 ppi. The stacks are phosphorescent red and green small molecule OLEDs, deposited by thermal evaporation. The display is designed for top emission and uses glass encapsulation. Thanks to the separate driving of two groups of subpixels, the two colors can be displayed independently. The prototype has been in operation for tens of hours with all pixels turned on, with no visible degradation. This indicates that the process flow for multicolor patterning proves basic functionality and already ensures stability for reasonable working time. A similar frontplane can be integrated with a TFT or CMOS backplane, enabling then video mode of operation, with individual driving of each subpixel. In a separate demonstration, we have also verified that the fabrication process is compatible with a FPD backplane process using IGZO TFT and flexible substrate.

Taking everything into account, photolithography of organic semiconductors is an emerging technology that can enable high resolution OLED displays. Many technology milestones have been already cleared – we know that we can achieve patterns of few microns, realize side-by-side multicolor pixels, integrate the pixelated frontplane on different backplanes, and get encouraging efficiency and lifetime performance. Currently, optimization of OLED performance after patterning is still the top priority. At the same time, we are addressing the complete integration flow and manufacturability aspects. To have this technology fully incorporated in a fab process flow, material and equipment developments are required. Still, the prospect of ultra-high resolution with simultaneous high aperture ratio in a process flow based on standard semiconductor techniques remains very attractive and justifies going the extra mile to tackle the pending engineering challenges.

By Walt Custer, Custer Consulting Group

Broad global & U.S. electronic supply chain growth

The first quarter of this year was very strong globally, with growth across the entire electronics supply chain. Although Chart 1 is based on preliminary data, every electronics sector expanded –  with many in double digits. The U.S. dollar-denominated growth estimates in Chart 1 have effectively been amplified by about 5 percent by exchange rates (as stronger non-dollar currencies were consolidated to weaker U.S. dollars), but the first quarter global rates are very impressive nonetheless.

Walt Custer Chart 1

U.S. growth was also good (Chart 2) with Quarter 1 2018 total electronics equipment shipments up 7.2 percent over the same period last year. Since all the Chart 2 values are based on domestic (US$) sales, there is no growth amplification due to exchange rates.

Walt Custer Chart 2

We expect continued growth in Quarter 2 but not at the robust pace as the first quarter.

Chip foundry growth resumes

Taiwan-listed companies report their monthly revenues on a timely basis – about 10 days after month end. We track a composite of 14 Taiwan Stock Exchange listed chip foundries to maintain a “pulse” of this industry (Chart 3).

Walt Custer Chart 3

Chip foundry sales have been a leading indicator for global semiconductor and semiconductor capital equipment shipments. After dropping to near zero in mid-2017, foundry growth is now rebounding.

Chart 4 compares 3/12 (3-month) growth rates of global semiconductor and semiconductor equipment sales to chip foundry sales. The foundry 3/12 has historically led semiconductors and SEMI equipment and is pointing to a coming cyclical upturn. It will be interesting to see how China’s semiconductor industry buildup impacts this historical foundry leading indicator’s performance.

Walt Custer Chart 4

Passive Component Shortages and Price Increases

Passive component availability and pricing are currently major issues. Per Chart 5, Quarter 1 2018 passive component revenues increased almost 25 percent over the same period last year. Inadequate component supplies are hampering many board assemblers with no short-term relief in sight.

Walt Custer Chart 5

Peeking into the Future

Looking forward, the global purchasing managers index (a broad leading indicator) has moderated but is still well in growth territory.

Walt Custer Chart 6

The world business outlook remains positive but requires continuous watching!

Walt Custer of Custer Consulting Group is an  analyst focused on the global electronics industry.

Originally published on the SEMI blog.

For the 20th year, a worldwide survey of semiconductor manufacturers has resulted in Plasma-Therm winning multiple awards for its systems and superior customer service.

In the annual Customer Satisfaction Survey conducted by VLSIresearch, Plasma-Therm earned a total of five awards, including two “RANKED 1st” awards. Plasma-Therm earned the highest scores of all companies in two award categories, “Etch & Clean Equipment” and “Focused Suppliers of Chip Making Equipment.”

Survey participants are asked to rate semiconductor equipment suppliers in 15 categories based on supplier performance, customer service, and product performance.

“The achievement of two ‘RANKED 1st’ awards and five awards overall is very gratifying” Plasma-Therm CEO Abdul Lateef said. “While we continue to expand our product and application portfolio, we never lose our focus on providing the best service and support. We are working harder than ever to ensure success for all our customers, from small institutions and start-ups to specialty fabs and high-volume manufacturers.”

In THE BEST Suppliers of Fab Equipment, which includes specialized manufacturers like Plasma-Therm as well as the world’s largest equipment makers, Plasma-Therm ranked higher than every other company besides ASML, the world’s largest maker photolithography supplier. Plasma-Therm also was ranked higher than all other suppliers besides ASML in THE BEST Suppliers of Fab Equipment to Specialty Chip Makers.

With this year’s awards, Plasma-Therm now has received a total of 42 awards over 20 years of participation in the Customer Satisfaction Survey. VLSIresearch received feedback from more than 94 percent of the chip market in this year’s survey, which was conducted over 2-1/2 months and in five languages. Here is the full list of awards earned by Plasma-Therm in the 2018 Customer Satisfaction Survey:

• RANKED 1st in FOCUSED SUPPLIERS OF CHIP MAKINGEQUIPMENT • RANKED 1st in ETCH & CLEAN EQUIPMENT
• 10 BEST FOCUSED SUPPLIERS OF CHIP MAKING EQUIPMENT
• THE BEST SUPPLIERS OF FAB EQUIPMENT

• THE BEST SUPPLIERS OF FAB EQUIPMENT TO SPECIALTY CHIP MAKERS About Plasma-Therm

Established in 1974, Plasma-Therm is a manufacturer of advanced plasma processing equipment for specialty semiconductor markets, including advanced packaging, wireless communication, photonics, solid-state lighting, MEMS/NEMS, nanotechnology, renewable energy, data storage, photomask, and R&D. Plasma-Therm offers etch and deposition technologies and solutions for these markets.

3D-Micromac AG, a supplier of laser micromachining and roll-to-roll laser systems for the photovoltaic, medical device and electronics markets, today announced it has received an order for the company’s new microMIRA excimer laser lift-off (LLO) system from dpiX, a leading manufacturer of high-resolution digital sensors. The microMIRA system will be shipped to dpiX’s fab in Colorado Springs, Colo., where it will provide laser lift-off processing from Gen 4.5 glass substrates used in manufacturing X-ray sensors for medical, industrial and military applications.

The new microMIRA excimer laser lift-off system from 3D-Micromac provides highly uniform, force-free lift-off of flexible layers on large surface areas and at high speeds.

The new microMIRA excimer laser lift-off system from 3D-Micromac provides highly uniform, force-free lift-off of flexible layers on large surface areas and at high speeds.

3D-Micromac’s new microMIRA laser lift-off system provides highly uniform, force-free lift-off of flexible layers on large surface areas and at high speeds (up to 500 wafers/hour and up to 200 sheets/hour on Gen 6 substrates depending on the application). The system is built on a highly customizable platform that can incorporate different laser sources, wavelengths and beam paths to meet each customer’s unique requirements.

The microMIRA system can be used for a variety of applications, such as device lift-off from glass and sapphire substrates in semiconductor manufacturing as well as organic light emitting diode (OLED) and microLED display manufacturing. Additional applications include laser annealing and crystallization for surface modification, including printed electronics such as near-field communication (NFC) sensors and tags.

“In evaluating various laser approaches for our manufacturing needs, 3D-Micromac’s microMIRA laser lift-off system provided the best possible combination of cost of ownership, throughput and uniformity results,” stated Frank Caris, President and CEO of dpiX. “We look forward to installing this system in our production fab for use in manufacturing our latest silicon-based X-ray sensor arrays.”

In addition to its high configurability, speed and uniformity, 3D-Micromac’s microMIRA laser lift-off system provides many other benefits, including:

  • Force-free and extremely selective laser processing
  • No damage due to thermo-mechanical effects
  • Low production costs, including the ability to recycle/reuse carrier substrates
  • Elimination of costly and polluting wet chemical processes
  • Easy integration of adjacent manufacturing steps for greater fab productivity

“Our new microMIRA laser lift-off system takes advantage of the extensive process and applications knowledge we have built up from the more than 400 3D-Micromac laser systems installed and in use worldwide to date, including dozens of excimer laser systems used for display and microelectronics manufacturing,” stated Uwe Wagner, 3D-Micromac’s chief technology officer. “We look forward to closer engagement with dpiX to explore new opportunities and applications that can benefit from our laser products, processes and expertise.”