Category Archives: Displays

After a decline in the second quarter of 2013 and a tepid expansion in the third, demand for touch-screen panels used in notebook PCs is set to rebound to double-digit growth during the last three months of the year.

Shipments of touch panels for notebooks will amount to 4.9 million sheets in the fourth quarter, up 10 percent from 4.4 million in the third quarter, according to data from the “Touch Panel Shipments Database – Notebook” report from IHS Inc. This follows a marginal 2 percent increase in the third quarter and a 5 percent drop in the second, as presented in the attached figure.

Screen Shot 2013-12-12 at 4.21.34 PM

“While the overall notebook PC market remains sluggish, sales of touch panels for notebook PCs are showing some signs of life in the fourth quarter,” said Stone Wu, principal analyst for display components and materials at IHS. “The resumption of double-digit growth is being driven by the full-scale launch of 10.1-inch touch-screen panels that appeal to consumers, along with the introduction of a new microprocessor solution and the arrival of exciting new form factors.”

Related: PC outlook lowered again

A touch-and-go market

Despite the growth in the second half of the year, demand for laptops with touch panels is falling short of expectations in 2013. Overall shipments of notebooks have been weak this year because of the continuing inroads of media tablets into consumer demand. This has slowed growth even in the hot touch-screen notebook segment.

Related: Tablet display market more than doubles in Q1

However, even with the disappointing growth, shipments of notebook touchscreen panels will rise to 18.2 million sheets in 2013, up nearly 500 percent from 3.2 million in 2012. This makes touch-screen notebooks the fastest-growing segment of the PC market today.

Wintel to the rescue

The notebook touch-screen panel market in the second half has been boosted by the launch of products based on the new low-power Atom Bay Trail central processing unit (CPU) chip from Intel Corp.

The market also is getting a lift from the release of two-in-one convertible form-factor notebooks that have detachable displays.

Shipments of notebook touch-screen panels that are smaller than 10.1 inches are expected to flourish in the near term thanks to heavy subsidies to be provided by Intel and Microsoft for laptops with touch-screen panels and utilizing the Atom chip or the Windows 8.1 operating system.

Third-quarter woes

Even with the rise in shipments in the third quarter, the notebook touch-screen panel market dwindled in terms of shipment area and revenue compared to the second quarter.

The average shipments area per unit in the third quarter was 0.065 square meters (sqm), or 4.1 percent smaller than the 0.068 sqm of the second quarter.

Market revenue for notebook touch-screen panels came to $190.2 million, down 12.8 percent from the second quarter. Pricing was impacted by an oversupply of panels, particularly in the large-sized laptop market.

In terms of form factors for notebooks with touch-screen panels, the most prominent change in the third quarter was the decrease in clamshell types, with their share of market shipments falling to 63.4 percent, down from 75.2 percent in the second quarter. Meanwhile, the detachable segment rose to 16.9 percent, up from 11.5 percent. Tablet form-factor types rose to 12.7 percent, up from 5.5 percent.

Much of the growth in the detachable and tablet form factors is attributed to the heavy subsidies originating from Intel and Microsoft.

Compiled by Shannon Davis, Web Editor

This week, industry leaders and experts have gathered in Washington D.C. at the 59th annual IEEE International Electron Device Meeting (IEDM) conference. The IEDM presents more leading work in more areas of the field than any other technical conference, encompassing silicon and non-silicon device technology, molecular electronics, nanotechnology, optoelectronics, MEM/NEMS, energy-related devices and bioelectronics. The 59th annual IEDM conference includes a strong overall emphasis on circuit-device interaction, advanced semiconductor manufacturing, and biomedical devices.

Solid State Technology‘s Pete Singer is on site all week, and we will be getting insight from bloggers and industry partners. Browse our slideshow of highlights from abstracts being presented this week.

Click here to start slideshow

Related blogs and articles:

Challenges of 10nm and 7nm CMOS at IEDM

IEDM’s special focus session highlights diverse challenge

Chipworks: IEDM 2013 Preview

SEMI today announced a “Call for Papers” for the new Semiconductor Technology Symposium, the popular TechXPOT programs, and a new Science Park program featuring university research and advanced R&D subjects at SEMICON West, North America’s premier microelectronics event, to be held July 8-10 at the Moscone Center in San Francisco, Calif.  Presentation abstracts are due March 17, 2014.

SEMICON West 2014 will be attended by nearly 30,000 semiconductor and related microelectronics industry professionals and feature more than 60 hours of technical sessions, led by the most informed and influential experts in the world. The “standing-room only” success of the SEMICON West TechXPOT programs has prompted the creation of the new Semiconductor Technology Symposium (STS). Beginning in 2014, popular programs on leading-edge chip manufacturing will be held in a classroom setting with reserved seating adjacent to the show floor in the North Hall of Moscone Center. STS will offer technology trends, developments and new technology information in the areas of advanced materials and processing, lithography, metrology, 450mm, advanced packaging, 3D-IC.  Test Vision 2020, the leading semiconductor test conference focusing on ATE and high-volume manufacturing, will join the STS in the Moscone Center location.

TechXPOT programs in the Moscone Center North and South Halls will continue focusing on special topics in semiconductor manufacturing, and adjacent and related microelectronics technologies. An additional new program, Science Park, will feature a dedicated stage and exhibition area featuring advanced research and development technology topics centered on universities, research consortia, and R&D tools and technologies.

For the Semiconductor Technology Symposium, SEMI is soliciting technical presentations in the following areas:

·         Manufacturing nonplanar transistors
·         New and advanced metrology solutions
·         Advanced lithography
·         450mm wafer processing
·         Advanced materials and processes
·         Advanced packaging
·         Trends and technologies in 3D stacked IC
·         Semiconductor test
For TechXPOT sessions in North and South Hall of the Moscone Center, SEMI is soliciting technical presentations in the following areas:

·         Semiconductor test
·         Advanced packaging
·         Productivity solutions for 200mm and 300mm wafer processing
·         Accelerating and improving yield
·         MEMS manufacturing and technology
·         Enabling the Internet of Things
·         Manufacturing advanced power semiconductors
·         Printed and flexible electronics
The new Science Park program is soliciting technical presentations from universities and research consortia on advanced R&D topics, and tools and technology solutions for laboratory, research and pilot line microelectronics technology and manufacturing.
“The semiconductor programs at SEMICON West have grown to become one of the industry’s most unique and anticipated events, but have outgrown the TechXPOT locations on the show floor,” said Karen Savala, president of SEMI Americas. “The new Semiconductor Technology Symposium will allow us to improve and expand these programs with a high-quality classroom setting, convenient lunch and networking opportunities — providing an ideal setting and a better value for our attendees.”

Prospective presenters are invited to submit abstracts (maximum 500 words) on key industry issues and topics in the areas listed above for consideration. Presentations should focus on the latest developments and innovations in these technology areas, inclusive of supporting data. Submissions may be made online from the SEMICON West 2014 “Call for Participants” website at: www.semiconwest.org/Participate/SPCFP.

The deadline for abstract submission is March 17, 2014.

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that the Singapore-MIT Alliance for Research Technology (SMART) has ordered an EVG 850LT fully automated production bonding system designed for silicon-on-insulator (SOI) and direct wafer bonding using low-temp plasma activation processing.  SMART, which is a leading research center established by the Massachusetts Institute of Technology (MIT) in partnership with the National Research Foundation of Singapore, will utilize the EVG850LT system to support its advanced substrate development efforts.

The MIT research center is located outside the United States in Singapore and has five different research groups, including the Low Energy Electronic Systems (LEES) Research Group, which focuses on integrating silicon CMOS and compound semiconductor materials to enable new integrated circuits (ICs) for wireless devices, power electronics, LEDs, displays and other applications.  The LEES Research Group features a fabrication facility, where the EVG850LT has already been installed and is in use.

According to Professor Eugene Fitzgerald from MIT’s Department of Materials Science and Engineering, SMART chose the EVG850LT for the center’s advanced R&D efforts due to the system’s high process flexibility and performance, EVG’s experience in low-temperature bonding, and expertise and support in process development.

“The charter of our LEES Research Group is to identify new IC technologies that enable devices that consume less power, enable higher performance and open up new applications for information systems.  EV Group’s technology and expertise will play an important role in supporting this effort,” stated Professor Fitzgerald.

The EVG850 platform, upon which the EVG850LT system is built, is the only SOI and direct wafer bonding platform designed to operate in high-throughput, high-yield environments—establishing it as the industry standard in the SOI wafer bonding market.  The EVG850LT platform combines all essential steps for wafer bonding—from cleaning and alignment to pre-bonding and IR-inspection—in a single platform.  This ensures an ultra-clean production process throughout all stages to enable high-yield, void-free wafers, as opposed to stand-alone processing units that require the wafers to be manually transported in a regular cleanroom environment.  The EVG850 supports a variety of advanced substrates, including SOI and silicon on lattice engineered substrate (SOLES) technology, up to 300mm in diameter.

Global Industry Analysts, Inc. invites senior industry executives, domain experts, technologists and market strategists to participate in a comprehensive global research initiative studying the “Thin Films” markets. The study will examine key drivers and trends impacting the market such as growing interest in understanding atomistic properties of materials to discover newer ways to improve material performance; developments in thin film deposition technologies; innovation in material synthesis, processing, and computation; ever increasing performance requirements of optoelectronic components, semiconductor circuits, electric contacts, and coatings and the ensuing increased focus on advanced material research and nanotechnology; and expanding application areas such as in photovoltaics.

Defined as microscopic layers of material deposited onto metal, ceramic or plastic substrates, Thin Films are expected to witness strong demand in the integrated circuit industry. A technologically effervescent area of physics, thin films represents a branch of material science that marks the convergence of physics, electronic engineering, material science and metallurgy. Measuring less than one micron thick, thin films play an important role in the development of next generation semiconductor devices. Key application areas of thin films include communication, coating, microelectronics, optical electronics, and renewable energy generation systems, among others. The market is expected to benefit from the ever growing demand for smaller, miniaturized electronic devices with energy efficient high-speed computing performance. In this regard, thin film materials with new elemental composition, superconductivity, superior mechanical and dielectric strength, are poised to score the highest gains.

The growing focus on renewable energy against a backdrop of depleting fossil fuels and global warming, is forecast to drive demand for thin-film solar cell (TFSC), in turn benefitting the market for thin films. The continuous need to enhance the performance of medical devices will additionally generate demand for thin film coatings for medical equipment. The market is also forecast to witness the evolution of the new concept of growing thin films onto substrates as against the conventional deposition techniques. The trend of growing thin films is forecast to open up new growth avenues. Research is currently underway to explore methods to grow thin films of germanium crystals, the fruition of which can result in thin films replacing silicon in semiconductors. In the medium term however, growth in the market will largely benefit from advancements in deposition processes, improvements in surface characterization, and developments in nanomaterials, optical materials, organic thin films, magnetic thin films, and nano-metal oxide thin films, among others.

The study estimates Thin Films to be a multi-million dollar market worldwide, while more precise market-size and growth projections for a 14-year period will be made available during the 2nd stage of report preparation, and data analysis.

The research and analyses will be released shortly in the form of a comprehensive research report. The report by design, will attempt to provide exhaustive analysis, data, trends, market share, market size, statistics, forecasts and competitive intelligence. The report is modeled to offer precise and unbiased, actionable market insights including in-depth segmentation of market sub-sectors, demand estimates and projections and analysis of trends in each of the sectors, identification of leading players, and the competitive structure, among others.

Developed for Chip Designers, Fabricators, Manufacturers, Strategic Planners, Business Development Executives, Management Consultants, Investment Bankers, Consulting Firms, Marketing & Sales Executives, C-Level Decision Makers, Market Strategists and Technology Domain Experts, the report helps identify the biggest opportunities in this space and offers accurate latent demand forecasting that empowers quantitative decision making among existing market players and new entrants.

Total worldwide production value of electronic systems is projected to increase 4 percent in 2013 to $1.41 trillion and climb to about $1.74 trillion in 2017, which represents a compound annual growth rate (CAGR) of 5.0% from $1.36 billion in 2012, according to IC Insights’ new 2014 edition of IC Market Drivers—A Study of Emerging and Major End-Use Applications Fueling Demand for Integrated Circuits. The 475-page report shows cellphones overtaking standard personal computers (desktop and notebook PCs) as both the largest electronic systems market and the largest end-use application for ICs in 2013 for the first time ever.

Figure 1 compares the relative market sizes and projected growth rates of nine major systems segments among nearly a couple dozen end-use electronic product categories covered in the 2014 IC Market Drivers report.  These nine market categories represented an estimated two-thirds of the total production value of all electronic systems in 2013.  Cellphones will overtake standard personal computers (desktop and notebook PCs) as the largest electronic systems market for the first time in 2013.  Cellphones are expected to account for 18 percent of worldwide electronic systems sales ($247.2 billion) versus standard PCs with 15 percent ($208.3 billion) of the total in 2013.  In 2012, PCs represented 17% of systems sales while cellphones were about 16 percent of the total, based on the new report’s market analysis.

Cellphone sales are projected to rise by a CAGR of 6.3 percent in the 2012-2017 period, while standard PC revenues are expected to slump by an annual rate of -0.7 percent, partly due to the growing popularity of tablet computers and greater use of smartphones to access the Internet.

cell phone IC 1

Figure 2 shows the market sizes and projected growth rates of IC sales for 10 major end-use systems categories, based on data and five-year forecasts in the 2014 IC Market Drivers report.  After dominating IC sales for most of the last two decades, standard PCs will take a back seat to cellphones, which are projected to become the largest application for ICs in 2013.  The 2014 IC Market Drivers report estimates cellphones will account for 24 percent of IC sales in 2013 versus 22% in 2012, while PCs will represent 22% of the total in 2013 compared to 25 percent last year.  IC sales for standard PCs have stalled out while cellphone IC revenues are projected to grow by a CAGR of 12.9 percent between 2012 and 2017.

Among these 10 end-use market segments, IC sales growth is expected to be the strongest in systems for wireless networks (a CAGR of 17.9 percent) and tablet computers (a CAGR of 15.3 percent) in the five-year forecast period of the new IC Market Drivers report.  IC revenues generated by these 10 end-use systems categories will represent an estimated 77 percent of total integrated circuit sales worldwide in 2013.

cell phone IC 2

Information in this Research Bulletin comes from the 2014 edition of IC Insights’ IC Market Drivers report, which was released in November 2013.  The 475-page report includes 330 charts and figures to analyze several existing and emerging end-use applications that will drive the IC market through the year 2017.

A partnership among the University of Virginia’s (UVa) Schools of Education and Engineering and the Charlottesville Public Schools has led to the launch of Buford Engineering Design Academy, a laboratory school for advanced manufacturing. In conjunction with a ribbon-cutting ceremony on Sept. 30, National Science Foundation (NSF) leaders, UVa faculty and UVa and Buford students toured the site and saw the school’s capabilities.

nsf

The new academy is the culmination of work undertaken in a project called the FabLab Classroom, an NSF Innovative Technology Experiences for Students and Teachers (ITEST) project led by Glen Bull, professor at UVa’s Curry School of Education, and co-director of the Center for Technology and Teacher Education. The FabLab Classroom provided elementary and middle school students with fabrication technologies such as 3-D printers and computer-controlled die cutters. The students learned science through engineering design using these advanced manufacturing technologies.

Based on the promising results of the pilot, the Commonwealth of Virginia provided seed funding to design a laboratory school for advanced manufacturing. The funding provided by NSF and the Commonwealth of Virginia was matched by $1.4 million contributed by the Charlottesville Schools. The school will serve as a laboratory for integration of engineering design into science teaching while also serving as an experimental platform for preparing the next generation of science teachers to use these technologies.

“We like to see this kind of impact from a research project where NSF has made an investment,” said NSF Assistant Director Joan Ferrini-Mundy, who leads the agency’s Education and Human Resources directorate. “As there is more and more emphasis on teaching engineering concepts in K-12 classrooms, it’s crucial that we understand the most effective strategies for student learning. The resources brought together through this partnership are building on the initial project and increasing its scope and reach. That’s very exciting.”

The Buford Engineering Design Academy is the first public school to become part of the Commonwealth Engineering Design Academies, a laboratory school partnership with UVa’s Schools of Education and Engineering. The project pairs the expertise of UVa professors with Charlottesville-area public school teachers and students. As part of their professional development, middle-school teachers affiliated with the project spend a half day teaching at Buford and a half-day at UVa learning about advanced manufacturing and advanced manufacturing education.

The Buford Engineering Design Academy–to be followed by similar high-tech labs at Charlottesville High School and Albemarle County’s Jack Jouett Middle School and Albemarle High School–will be linked via video to the partner lab at UVa, enabling UVa professors and students to offer lessons and develop innovations for the participating laboratory schools.

This unique network of labs, professors, teachers, and students has already attracted a television crew from Japan; in addition, a representative from China’s National Center for Educational Technology will spend a year in Charlottesville to follow the project.

The school has opened its doors at a time when there is increased emphasis on the “engineering” part of science, technology, engineering and mathematics (STEM) education research. Not only are engineering technology and applications of science part of the Next Generation Science Standards, but technologies such as 3-D printing are increasingly available and affordable.

“The next-generation science standards call for making science and engineering equal, but there are no science teachers today trained to teach science and engineering and, even more importantly, there are no professors of science education prepared to train teachers to teach science and engineering,” says Bull. “We wanted to change this.”

To help set the stage for K-12 schools successfully adopting science and engineering teaching and technologies, Bull is working with a group of teachers assigned to NSF through the Albert Einstein Distinguished Educator Fellowship Program. Led by elementary science, engineering, mathematics and robotics teacher Kaye Ebelt, the teachers have established a lab within NSF’s Engineering directorate that parallels classroom manufacturing technologies found in the Lab School. The Einstein Fellows meet with the Lab School teachers each week to pioneer new pedagogical approaches to incorporating engineering design into science teaching. After these approaches to science teaching are piloted in the Lab School, they will be disseminated nationally.

There is more work ahead on the road to bringing this coursework to schools around the country.

“Integrating engineering design into science teaching is an important but challenging goal,” said Bull. “The engineering design academies provide a test bed for developing effective practices.”

University of Illinois researchers have developed a way to heal gaps in wires too small for even the world’s tiniest soldering iron.

Led by electrical and computer engineering professor Joseph Lyding and graduate student Jae Won Do, the Illinois team published its results in the journal Nano Letters.

Carbon nanotubes are like tiny hollow wires of carbon just 1 atom thick – similar to graphene but cylindrical. Researchers have been exploring using them as transistors instead of traditional silicon, because carbon nanotubes are easier to transport onto alternate substrates, such as thin sheets of plastic, for low-cost flexible electronics or flat-panel displays.

Carbon nanotubes themselves are high-quality conductors, but creating single tubes suitable to serve as transistors is very difficult. Arrays of nanotubes are much easier to make, but the current has to hop through junctions from one nanotube to the next, slowing it down. In standard electrical wires, such junctions would be soldered, but how could the gaps be bridged on such a small scale?

“It occurred to me that these nanotube junctions will get hot when you pass current through them,” said Lyding, “kind of like faulty wiring in a home can create hot spots. In our case, we use these hot spots to trigger a local chemical reaction that deposits metal that nano-solders the junctions.”

Lyding’s group teamed with Eric Pop, an adjunct professor of electrical and computer engineering, and John Rogers, Swanlund professor in materials science and engineering, experts on carbon nanotube synthesis and transfer, as well as chemistry professor Greg Girolami. Girolami is an expert in a process that uses gases to deposit metals on a surface, called chemical vapor deposition (CVD).

The nano-soldering process is simple and self-regulating. A carbon nanotube array is placed in a chamber pumped full of the metal-containing gas molecules. When a current passes through the transistor, the junctions heat because of resistance as electrons flow from one nanotube to the next. The molecules react to the heat, depositing the metal at the hot spots and effectively “soldering” the junctions. Then the resistance drops, as well as the temperature, so the reaction stops. (See video for demonstration of the process.)

The nano-soldering takes only seconds and improves the device performance by an order of magnitude – almost to the level of devices made from single nanotubes, but much easier to manufacture on a large scale.

“It would be easy to insert the CVD process in existing process flows,” Lyding said. “CVD technology is commercially available off-the-shelf. People can fabricate these transistors with the ability to turn them on so that this process can be done. Then when it’s finished they can finish the wiring and connect them into the circuits. Ultimately it would be a low-cost procedure.”

Now, the group is working to refine the process.

“We think we can make it even better,” Lyding said. “This is the prelude, we hope, but it’s actually quite significant.”

The National Science Foundation and the Office of Naval Research supported this work.  Lyding and Rogers also are affiliated with the Beckman Institute for Advanced Science and Technology at the U. of I.

Slide 8

Delft University of Technology researchers will describe a novel low-temperature method for fabricating solution-processed polysilicon thin-film transistors (TFTs) for use with a wide range of arbitrary large-area substrates, including paper. The TFTs had electron mobilities of 23.5 and 21.0 cm2/Vs (for PMOS and NMOS, respectively).

Although other solution-processed polysilicon and single-grain silicon TFTs have higher electron mobilities, they require high-temperature annealing which rules out low-cost plastic or paper substrates. Meanwhile, other TFTs made at low temperatures but from organic or metal-oxide materials have poor mobilities, only half as much as the Delft devices at best, meaning their performance is limited.

The Delft team made the devices by casting a quantity of liquid polysilane onto a substrate, and forming a thin film from it by “doctor-blading,” or skimming it with a blade. High-performance polysilicon channel regions then were formed by laser annealing, using short pulses of coherent light to selectively crystallize the disordered film. The maximum temperature required was only 150ºC, making the TFTs suitable for paper and plastic substrates such as PET and PEN.

(Paper #26.5, “Solution-Processed Poly-Si TFTs Fabricated at a Maximum Temperature of 150°C,” M. Trifunovic et al, Delft University of Technology) 

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SEMI announced today that the deadline for presenters to submit an abstract for the 25th annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) is extended to November 28.  ASMC, which takes place May 19-21, 2014 in Saratoga Springs, New York, will feature technical presentations of more than 80 peer-reviewed manuscripts covering critical process technologies and fab productivity. This year’s event features a panel discussion on “25 Years of Semiconductor Manufacturing,” moderated by Paul Werbaneth, 3D InCites,  technical sessions on advanced semiconductor manufacturing,   a keynote by TSMC, and tutorials on Silicon Photonics offered by Intel and Directed Self Assembly by IBM.

ASMC, celebrating 25 years of excellence, continues to fill a critical need in our industry and provides a venue for industry professionals to network, learn and share knowledge on new and best-method semiconductor manufacturing practices and concepts.  Selected speakers have the opportunity to present in front of IC Manufacturers, Equipment Manufacturers, Materials Suppliers, Chief Technology Officers, Operations Managers, Process Engineers, Product Managers and Academia. Technical abstracts are due November 28, 2013.

SEMI is soliciting technical abstracts in key technology areas:

  •          Advanced Metrology
  •          Advanced Equipment Processes and Materials
  •          Advanced Patterning / Design for Manufacturability
  •          Advanced Process Control
  •          Contamination Free Manufacturing
  •          Data Management and Data Mining Tools
  •          Defect Inspection and Reduction
  •          Discrete and Power Devices
  •          Enabling Technologies and Innovative Devices
  •          Equipment Reliability and Productivity Enhancements
  •          Factory Automation
  •          Green Factory
  •          Industrial Engineering
  •          Lean Manufacturing
  •          Packaging and Through Silicon Via
  •          Yield Enhancement/Learning
  •          Yield Methodologies

Complete descriptions of each topic and author kit can accessed at www.semi.org/en/node/asmc2014.  If you would like to learn more about the conference and the selection process, please contact Margaret Kindling at [email protected] or call 1.202.393.5552.