Category Archives: LED Manufacturing

North America-based manufacturers of semiconductor equipment posted $1.57 billion in orders worldwide in April 2015 (three-month average basis) and a book-to-bill ratio of 1.04, according to the April EMDS Book-to-Bill Report published today by SEMI.   A book-to-bill of 1.04 means that $104 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in April 2015 was $1.57 billion. The bookings figure is 12.9 percent higher than the final March 2015 level of $1.39 billion, and is 9.0 percent higher than the April 2014 order level of $1.44 billion.

The three-month average of worldwide billings in April 2015 was $1.51 billion. The billings figure is 19.3 percent higher than the final March 2015 level of $1.27 billion, and is 7.6 percent higher than the April 2014 billings level of $1.40 billion.

“Both bookings and billings trends have improved, with the ratio remaining above parity over the past four months,” said Denny McGuirk, president and CEO of SEMI.  “Orders are higher than last year’s numbers, and current spending is on target with 2015 capex plans.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

 

Billings
(3-mo. avg)

Bookings
(3-mo. avg)

Book-to-Bill
November 2014 

$1,189.4

$1,216.8

1.02
December 2014 

$1,395.9

$1,381.5

0.99
January 2015 

$1,279.1

$1,325.6

1.04
February 2015 

$1,280.1

$1,313.7

1.03
March 2015 (final)

$1,265.6

$1,392.7

1.10
April 2015 (prelim)

$1,510.3

$1,572.2

1.04

Source: SEMI (www.semi.org), May 2015

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that its NILPhotonics Competence Center—established to assist customers in enabling new and enhanced products and applications in the field of photonics—has generated strong interest from customers and resulted in multiple system orders since its launch in December 2014. New system orders have included the company’s EVG700/7000 Series UV-NIL (UV nanoimprint lithography) systems with SmartNIL technology to support high-volume manufacturing applications, including displays, light emitting diodes (LEDs) and wafer-level optics.

EV Group wafer

Since its initial launch, the NILPhotonics Competence Center has also expanded the products and applications it is supporting. These include photonic and microfluidic devices for bio-medical applications that pave the way for faster and more accurate diagnosis of diseases, as well as plasmonic structures that simultaneously carry optical and electrical signals and can be scaled to the smallest dimensions to enable new chip designs as well as better-performing devices, such as waveguides and sensors.

“The prevailing perception has been that despite the potential benefits of NIL technology, the barrier to entry for integrating it into high-volume manufacturing (HVM) is high. That simply isn’t the case. EV Group has invested significant resources over many years in developing NIL technology as an HVM-capable solution for a number of applications,” stated Markus Wimplinger, corporate technology development and IP director at EV Group. “Today, we have the world’s largest installed base ofmore than 200 systems at customer facilities around the globe supporting volume-manufacturing of LEDs, MEMS, optics, photovoltaics and other devices. Our NILPhotonics Competence Center allows us to more easily bring all of our process and product capabilities and expertise to bear in helping our customers enable new photonic products and applications.”

EVG’s NILPhotonics Competence Center leverages EVG’s process and equipment know-how in NIL and other process areas such as wafer bonding to support emerging photonic applications and significantly shorten time to market through fast process implementation and optimization, as well as through customized equipment design. In addition, EVG has a global partner network to draw from to support its customers’ process integration and optimization efforts across the NIL infrastructure, including template manufacturing, resist materials and supporting equipment. As a result, EVG is able to provide consultation and support across all phases of the product lifecycle—from design for manufacturing and prototyping through process development, qualification runs, pilot manufacturing and process transfer.

“More than a decade ago, EV Group launched the NILCom Consortium with support from companies representing key aspects of the NIL supply chain in order to speed commercialization of NIL technology. Through the dedicated efforts of all of our members, we are pleased to announce that the NILCom Consortium has successfully completed its charter and will end formal operations. That said, we will continue to collaborate with companies across the NIL supply chain including our former members as needed to ensure that NIL technology continues to address future customer roadmap requirements,” added Wimplinger.

Cambridge Nanotherm today announced that Howard Ford has joined the board as chairman. Ford brings unrivalled experience operating at the highest level in both start-up and global technology companies. His knowledge and experience of transforming companies into global brands will help to ensure Cambridge Nanotherm continues its rapid growth.

Sales of Cambridge Nanotherm’s thermal management solutions for LEDs have exploded in 2015 and Ford will help continue the drive for expansion into key markets in Asia and the US.

“Howard has an outstanding track record in companies large and small. Both our employees and investors are delighted that he has agreed to join as we expand our product offering, customer base and geographical presence and continue to aggressively grow global sales,” commented Ralph Weir, CEO. “Howard’s experience, both at the helm of multinational organisations and moulding tech start-ups into global players makes him the perfect fit for Cambridge Nanotherm as we reinforce our strategic direction and cement our position as one of the market leaders for LED thermal management.”

“Cambridge Nanotherm is transforming the landscape of thermal management,” added Ford. “I’m relishing the opportunity to bring my experience to bear on a company that is making such big waves in the LED market.”

Ford has worked for a wide variety of high-profile technology companies in his career. Significant roles include chief executive of BT Cellnet and general manager of IBM’s European PC business; Ford was also managing director of Equant Network Services before it was acquired by France Telecom in 2005. In addition to Cambridge Nanotherm, Howard currently holds the position of chairman with Display Data, Pyreos, Light Blue Optics and Filtronic plc.

Cambridge Nanotherm’s innovative nanoceramic thermal management solutions have seen unprecedented market demand. Ford’s commercial expertise and strategic vision will help the board and management team build on this foundation. Cambridge Nanotherm’s move to strengthen the board with this appointment follows on from the appointment of Ewald Braith as non-executive director in April.

BY GREG SHUTTLEWORTH, Global Product Manager at LINDE ELECTRONICS

The market expectations of modern electronics technology are changing the landscape in terms of performance and, in particular, power consumption, and new innovations are putting unprecedented demands on semiconductor devices. Internet of Things devices, for example, largely depend on a range of different sensors, and will require new architectures to handle the unprecedented levels of data and operations running through their slight form factors.

The continued shrinkage of semiconductor dimensions and the matching decreases in microchip size have corresponded to the principles of Moore’s Law with an uncanny reliability since the idea’s coining in 1965. However, the curtain is now closing on the era of predictable / conventional size reduction due to physical and material limitations.

Thus, in order to continue to deliver increased performance at lower costs and with a smaller footprint, different approaches are being explored. Companies can already combine multiple functions on a single chip–memory and logic devices, for example–or an Internet of Things device running multiple types of sensor through a single chip.

We have always known that we’d reach a point where conventional shrinking of semiconductor dimensions would begin to lose its effect, but now we are starting to tackle it head on. A leading U.S. semiconductor manufacturer got the ball rolling with their FinFET (or tri–gate) design in 2012 with its 3D transistors allowing designs that minimize current leakage; other companies look set to bring their own 3D chips to market.

At the same time, there’s a great deal of experimentation with a range of other approaches to semiconductor redesign. Memory device manufacturers, for instance, are looking to stack memory cells vertically on top of each other in order to make the most of a microchip’s limited space. Others, meanwhile, are examining the materials in the hope of using new, more efficient silicon–like materials in their chips.

Regardless of the approach taken, however, this step change in microchip creation means new material demands from chip makers and new manufacturing techniques to go with them.

The semiconductor industry has traditionally had to add new materials and process techniques to enhance the performance of the basic silicon building blocks with tungsten plugs, copper wiring / CMP, high–k metal gates, for example. Now, however, it is beginning to become impossible to extend conventional materials to meet the performance requirements. Germanium is already added to Si to introduce strain, but its high electron mobility means Germanium is also likely to become the material of the Fin itself and will be complemented by a corresponding Fin made of III–V material, in effect integrating three semiconductor materials into a single device.

Further innovation is required in the areas of lithography and etch. This is due to the delay in production suitability of the EUV lithography system proposed to print the very fine structures required for future technology nodes. Complex multi-patterning schemes using conventional lithography are already underway to compensate for this technology delay, requiring the use of carbon hard masks and the introduction of gases such as acetylene, propylene and carbonyl sulphide to the semiconductor fab. Printing the features is only half of the challenge; the structures also need to be etched. The introduction of new materials always presents some etch challenges as all materials etch at slightly different rates and the move to 3D structures, where very deep and narrow features need to be defined through a stack of different materials, will be a particularly difficult challenge to meet.

The microchip industry has continuously evolved to deliver amazing technological advances, but we are now seeing the start of a revolution in microchip design and manufacturing. The revolution will be slow but steady. Such is the pattern of the microchip industry, but it will need a succession of new materials at the ready, and, at Linde, we’re prepared to make sure the innovators have everything they need.

Quantum dots are finally ready for prime time and will exceed traditional phosphor revenue by 2020 by allowing LCD to compete with OLED in the race for the next display generation.
Yole Développement (Yole), the “More than Moore” market research and strategy consulting company releases a LED downconverters technology & market report, entitled “Phosphors & Quantum Dots 2015: LED Downconverters for Lighting & Displays”. Under this new report, the company proposes a deep review of the industry, especially the impact of the quantum dots development on the display and traditional phosphors industry. Are the quantum dots a real competitor of OLEDs technology?

After the lukewarm reception of 3D and 4K, the display industry needs a new and disruptive experience improvement to bring consumers back to the store. Image quality perception increases significantly when color gamut and dynamic contrast ratio are improved. Leading movie studios, content providers, distributors and display makers gathered and formed the “UHD Alliance” to promote those features.

“OLED was believed to be the technology of choice for this next generation of displays. But production challenges have delayed the availability of affordable OLED TVs. LCD TVs with LED backlights based on quantum dots downconverters can deliver performance close to, or even better than OLED in some respects, and at a lower cost,” said Dr. Eric Virey, Senior Analyst, LEDs at Yole.

Until OLEDs are ready, QD-LCD have a unique window of opportunity to try to close enough of the performance gap that the majority of the consumers won’t perceive the difference between the two technologies and price would become the driving factor in the purchasing decision. Under this scenario, QD-LCD could establish itself as the dominant technology while OLED would be cornered into the high end of the market. OLED potentially offers more opportunities for differentiation but proponents need to invest massively and still have to resolve manufacturing yield issues. For tier-2 LCD panel makers who can’t invest in OLED, QDs offer an opportunity to boost LCD performance without additional CAPEX on their fabs. At the 2015 CES, 7 leading TV OEMs including Samsung and LG showed QD-LCD TVs.

With tunable and narrowband emissions, QDs offer unique design flexibility. But more is needed to enable massive adoption, including the development of further improved Cd-free compositions.

And traditional phosphors haven’t said their last word. If PFS could further improve in term of stability and decay time and a narrow-band green composition was to emerge, traditional phosphors could also be part of the battle against OLED.

“… LCD TVs with LED backlights based on quantum dots downconverters can deliver performance close to, or even better than OLED in some respects, and at a lower cost.” said Dr. E. Virey, Yole.

Yole’s analysis, “Phosphors & Quantum Dots 2015: LED Downconverters for Lighting & Displays”, presents an overview of the quantum dot LED market for display and lighting applications including quantum dot manufacturing, benefits and drawbacks, quantum dots LCD versus OLED and detailed market forecast.

Researchers at the University of Rochester have shown that defects on an atomically thin semiconductor can produce light-emitting quantum dots. The quantum dots serve as a source of single photons and could be useful for the integration of quantum photonics with solid-state electronics – a combination known as integrated photonics.

Scientists have become interested in integrated solid-state devices for quantum information processing uses. Quantum dots in atomically thin semiconductors could not only provide a framework to explore the fundamental physics of how they interact, but also enable nanophotonics applications, the researchers say.

Quantum dots are often referred to as artificial atoms. They are artificially engineered or naturally occurring defects in solids that are being studied for a wide range of applications. Nick Vamivakas, assistant professor of optics at the University of Rochester and senior author on the paper, adds that atomically thin, 2D materials, such as graphene, have also generated interest among scientists who want to explore their potential for optoelectronics. However, until now, optically active quantum dots have not been observed in 2D materials.

In a paper published in Nature Nanotechnology this week, the Rochester researchers show how tungsten diselenide (WSe2) can be fashioned into an atomically thin semiconductor that serves as a platform for solid-state quantum dots. Perhaps most importantly the defects that create the dots do not inhibit the electrical or optical performance of the semiconductor and they can be controlled by applying electric and magnetic fields.

Vamivakas explains that the brightness of the quantum dot emission can be controlled by applying the voltage. He adds that the next step is to use voltage to “tune the color” of the emitted photons, which can make it possible to integrate these quantum dots with nanophotonic devices.

A key advantage is how much easier it is to create quantum dots in atomically thin tungsten diselenide compared to producing quantum dots in more traditional materials like indium arsenide.

“We start with a black crystal and then we peel layers of it off until we have an extremely thin later left, an atomically thin sheet of tungsten diselenide,” said Vamivakas.

The researchers take two of these atomically thin sheets and lay one over the other one. At the point where they overlap, a quantum dot is created. The overlap creates a defect in the otherwise smooth 2D sheet of semiconductor material. The extremely thin semiconductors are much easier to integrate with other electronics.

The quantum dots in tungsten diselenide also possess an intrinsic quantum degree of freedom – the electron spin. This is a desirable property as the spin can both act as a store of quantum information as well as provide a probe of the local quantum dot environment.

“What makes tungsten diselenide extremely versatile is that the color of the single photons emitted by the quantum dots is correlated with the quantum dot spin,” said first author Chitraleema Chakraborty. Chakraborty added that the ease with which the spins and photons interact with one another should make these systems ideal for quantum information applications as well as nanoscale metrology.

While volumes are expected to more than double between 2015 and 2020, LED phosphor prices have declined dramatically, leading to a flat revenue outlook. Low technology barriers of entrance on the most mature compositions have prompted companies to procure turnkey manufacturing equipment and enter the market. With little to no quality control and R&D expenses, some have achieved low cost comparable to that of the tri-phosphors used in fluorescent lamps. In a bid to capture market shares, they triggered an intense price war. But is the situation so critical for the LED downconverters players?

Indeed the analysis cannot be stopped at this point. And Yole Développement (Yole), the “More than Moore” market research and strategy consulting company, proposes today a deep analysis of the market challenges and technology trends with its LED downconverters technology & market report, entitled “Phosphors & Quantum Dots 2015: LED Downconverters for Lighting & Displays”. Under this report, Yole’s team proposes a comprehensive review of the LED downconverters market and competitive landscape. This analysis presents the requirements for lighting and displays; configurations and dispensing methods; trends in phosphor compositions …

“With major YAG IP expiring from 2017, leading Chinese LED makers will have easier access to overseas markets, and domestic Phosphor suppliers such as Yuji, Grirem, YT Shield, Illuma or Sunfor will expand their markets, further increasing YAG commoditization,” explained Dr. Eric Virey, Senior Analyst, LEDs at Yole. And he adds: “Phosphor makers are therefore shifting their efforts toward higher added value materials such as nitrides, which, while prices have also decreased significantly during the period, have maintained better margins.”

But both emerging and established vendors such as Intematix will face Mitsubishi’s will to enforce its IP and maintain leadership on this segment.

Despite a difficult environment, some companies will strive. As illustrated by very wide price ranges, despite commoditization on the low end, LED phosphors remain a specialty market on the high end. Leading suppliers still commend significant price premiums and will strive to create value to maintain margins. This can be achieved through improved performance and consistency, customization, and innovative products. Solid IP shielding their customers from the risk of a patent lawsuit is also a strong element of differentiation. The LED phosphor market will remains technology and IP driven. While China-based suppliers are winning the price war, they now need to fight the patent war.

Moreover, in its LED downconverters’ technology & market analysis, Yole announces: “Garnets will keep dominating the market in volume but innovation will pay off and new compositions will capture most of the revenue.”

Indeed, YAG remains the best broadband yellow phosphor for generating white light. But its use is restricted by strong IP owned by Nichia. Silicates are the best substitute, although still lagging slightly in term of cost and performance. With critical IP to start expiring from 1997 and prices now significantly lower than any alternative, Yole expects YAG to become the ubiquitous yellow phosphor by the end of the decade while silicate essentially disappear. For green phosphors, LuAG, silicates and the emerging, cost-efficient GaYAG are the best broadband emitters for high CRI lighting. For high color gamut displays, β-SiAlON is favored due to its high stability and narrow band emission.
Over the last 3 years, nitrides prices have decreased 3x to 10x and the composition family has risen to become the dominant red phosphors for high CRI lighting and wide color gamut displays. Suppliers have proliferated despite IP restrictions. But a new material, Mn4+ doped PFS (potassium fluorosilicate) developed by GE and already manufactured by Denka, Nichia and GE could challenge the nitride dominance in display applications thanks to its extremely narrow band and despite its low absorption. Many other phosphor manufacturers such as Intematix are developing PFS and Yole’s team expects the competition to intensify. However, GE holds strong patents and it remains to be seen how much leverage this will provide the conglomerate in controlling this emerging segment.

San’an Optoelectronics Co., Ltd. today announced that it has licensed the United States patents of an LED patent portfolio it recently acquired from a major Japanese company to its subsidiary, Luminus Devices, Inc.

The portfolio comprises over 125 issued patents, including over thirty United States patents as well as issued patents in China, Japan, Korea, Taiwan, and Germany.  The earliest patents in the portfolio have priority dates reaching back to the mid-1990s, and more recent patents are from the mid-2000s.  These patents in the acquired portfolio are directed to a range of fundamental LED chip and wafer level technology, such as p-type branch electrodes (for example U.S. Patent Nos. 6,881,985 and 6,384,430), transparent ZnO layers, and reflecting electrodes, barrier layers (U.S. Patent No. 6,265,732), spacer layers, doped active layers (U.S. Patent No. 6,081,540), optimized MQWs (U.S. Patent No. 6,501,101), direct-bonded substrates, and GaInP current spreading layers.

According to San’an President Zhiqiang Lin, “We were quite pleased to acquire this well-respected LED patent portfolio as it complements the San’an patent portfolio nicely in time and subject matter and increases the San’an patent holdings to over 280 issued patents and published applications.  San’an recognizes the importance of a strong patent portfolio in the LED industry and we are committed to growing our patent base organically and by strategic acquisition.”

The license of the United States patents to Luminus Devices is exclusive, subject to prior issued licenses, with the right to enforce.  “The addition of the licensed patents to our existing patent portfolio further reinforces the position of Luminus Devices in the LED market,” said Decai Sun, the chief executive officer of Luminus Devices.  Luminus Devices has over eighty patents worldwide including fifty United States patents and is the exclusive licensee of key patents related to laser lift-off and patterned sapphire substrates.

Common pulsed measurement challenges are defined.

In case you missed it, Part 1 is available here.

BY DAVID WYBAN, Keithley Instruments, a Tektronix Company, Solon, Ohio

For SMU and PMU users, an issue that sometimes arises when making transient pulse measurements is the presence of “humps” (FIGURE 1) in the captured current waveform at the rising and falling edges of the voltage pulse. These humps are caused by capacitances in the system originating from the cabling, the test fixture, the instrument, and even the device itself. When the voltage being output is changed, the stray capacitances in the system must be either charged or discharged and the charge current for this either flows out of or back into the instrument. SMUs and PMUs measure current at the instrument, not at the DUT, so the instrument measures these current flows while a scope probe at the device does not.

FIGURE 1. Humps in the captured current (red) waveform at the rising and falling edges of the voltage pulse.

FIGURE 1. Humps in the captured current (red) waveform at the rising and falling edges of the voltage pulse.

This phenomenon is seen most often when the change in voltage is large or happens rapidly and the current through the device itself is low. The higher the voltage of the pulse or the faster the rising and falling edges, the larger the current humps will be. For SMUs with rise times in the tens of microseconds, these humps are usually only seen when the voltages are hundreds or even thousands of volts and the current through the device is only tens of microamps or less. However, for PMUs where the rise times are often less than 1μs, these humps can become noticeable on pulses of only a couple of volts, even when the current through the device is as high as several milliamps.
Although these humps in the current waveform may seem like a big problem, they are easy to eliminate. The humps are the result of the current being measured at the high side of the device where the voltage is changing. Adding a second SMU or PMU at the low side of the device to measure current will make these humps go away because at the low side of the device the voltage does not change so there’s no charge or discharge currents flowing and the current measured at the instrument will match the current at the device. If this isn’t an option, this problem can be minimized by reducing the stray capacitance in the system by reducing the length of the cables. Shorter cables equal less stray capacitance, which reduces the size of the humps in the current waveform.

The next common pulse measurement issue is test lead resistance. As test currents get higher, the impact of this resistance becomes increasingly significant. FIGURE 2 shows an SMU that is performing a pulse I-V measurement at 2V across a 50mΩ load. Based on Ohm’s Law, one might expect to measure a current through the device of 40A, but when the test is actually performed, the level of current measured is only 20A. That “missing” 20A is the result of test lead resis- tance. In fact, we were not pulsing 2V into 50mΩ but into 100mΩ instead, with 25mΩper test lead. With 50mΩ of lead resistance, half of the output voltage sourced was dropped in the test leads and only half of it ever reached the device.

FIGURE 2. Impact of test lead resistance.

FIGURE 2. Impact of test lead resistance.

To characterize the device correctly, it’s essential to know not only the current through the device but the actual voltage at the device. On SMUs this is done by using remote voltage sensing. Using a second set of test leads allows the instrument to sense the voltage directly at the device; because almost no current flows through these leads, the voltage fed back to the instrument will match the voltage at the device. Also, because these leads feed the voltage at the device directly back into the SMU’s feedback loop, the SMU can compensate for the voltage drop across the test leads by outputting a higher voltage at its output terminals.

Although SMUs can use remote sensing to compensate for voltage drops in the test leads, there is a limit to how much drop it can compensate for. For most SMUs, this maximum drop is about 3V/lead. If the voltage drop per lead reaches or exceeds this limit, strange things can start happening. The first thing is that the rise and fall times of the voltage pulse slow down, significantly increasing the time required to make a settled measurement. Given enough time for the pulse to settle, the voltage measurements may come back as the expected value, but the measured current will be lower than expected because the SMU is actually sourcing a lower voltage at the DUT than the level that it is programmed to source.

If you exceed the source-sense lead drop while sourcing current, a slightly different set of strange behaviors may occur. The current measurement will come back as the expected value and will be correct because current is measured internally and this measurement is not affected by lead drop, but the voltage reading will be higher than expected. In transient pulse measurements, you may even see the point at which the source-sense lead drop limit was exceeded as the measured voltage suddenly starts increasing again after it appeared to be settling.

These strange behaviors can be difficult to detect in the measured data if you do not know what voltage to expect from your device. Therefore, inspecting your pulse waveforms fully when validating your test system is essential.

Minimizing test lead resistance is essential to ensuring quality pulse measurements. There are two ways to do this:

Minimize the length of the test leads. Wire resistance increases at a rate that’s directly proportional to the length of the wire. Doubling the wire’s length doubles the resis- tance. Keeping leads lengths no greater than 3 meters is highly recommended for high current pulse applications.

Use wire of the appropriate diameter or gauge for the current being delivered. The resistance of a wire is also directly proportional to the cross sectional area of the wire. Increasing the diameter, or reducing the gauge, of the wire increases this area and reduces the resistance. For pulse applications up to 50A, a wire gauge of no greater than 12 AWG is recommended; for applications up to 100A, it’s best to use no greater than 10 gauge.

Excessive test lead inductance is another common issue. In DC measurements, test lead inductance is rarely considered because it has little effect on the measurements. However, in pulse measurements, lead inductance has a huge effect and can play havoc with a system’s ability to take quality measurements.

FIGURE 3. Humps in the voltage waveform of transient pulse measurements due to test system inductance.

FIGURE 3. Humps in the voltage waveform of transient pulse measurements due to test system inductance.

Humps in the voltage waveform of transient pulse measurements (FIGURE 3) are a common problem when generating current pulses. Just as with humps in the current waveforms, these humps can be seen in the data from the instrument but are nowhere to be seen when measured at the device with an oscilloscope. These humps are the result of the additional voltage seen at the instrument due to inductance in the cabling between the instrument and th

Equation 1

Equation 1

Equation 1 describes the relation between inductance and voltage. With this equation, we can see that for a given change in current over change in time (di over dt), the larger the inductance L is, the larger the resulting voltage will be. This equation also tells us that for a fixed inductance L, the larger the change in current or the smaller the change in time, the larger the resulting voltage will be. This means that the larger the pulse and or the faster the rise and falls times, the bigger the voltage humps will be.

To remedy this problem, instruments like SMUs offer remote voltage sensing, allowing them to measure around this lead inductance and measure the voltage directly at the device. However, as with excessive lead resistance, excessive lead inductance can also cause a problem for SMUs. If the inductance is large enough and causes the source-sense lead drop to exceed the SMU’s limit, transient pulse measurement data will have voltage measurement errors on the rising and falling edges similar to the ones seen when lead resistance is too large. Pulse I-V measurements are generally unaffected by lead inductance because the measurements are taken during the flat portion of the pulse where the current is not changing. However, excessive lead inductance will slow the rising and falling edges of voltage pulses and may cause ringing on current pulses, thereby requiring larger pulse widths to make a good settled pulse I-V measurement.

The Anatomy of a Pulse The amplitude and base describe the height of the pulse in the pulse waveform. Base describes the DC offset of the waveform from 0. This is the level the waveform will be both before and after the pulse. Amplitude is the level of the waveform relative to the base level and has an absolute value that is equal to the base plus amplitude. For example, a pulse waveform with a base of 1Vand an amplitude of 2V would have a low level of 1V and a high level of 3V. Pulse width is the time that the pulse signal is applied. It is commonly defined as the width in time of the pulse at half maximum also known as Full Width at Half Maximum (FWHM). This industry standard definition means the pulse width is measured where the pulse height is 50% of the amplitude. Pulse period is the length in time of the entire pulse waveform before it is repeated and can easily be measured by measuring the time from the start of one pulse to the next. The ratio of pulse width over pulse period is the duty cycle of the pulse waveform. A pulse’s rise time and fall time are the times it takes for the waveform to transition from the low level to the high level and from the high level back down to the low level. The industry standard way to measure the rise time is to measure the time it takes the pulse waveform to go from 10% amplitude to 90% amplitude on the rising edge. Fall time is defined as the time it takes for the waveform to go from 90% amplitude to 10% amplitude on the falling edge.

The Anatomy of a Pulse
The amplitude and base describe the height of the pulse in the pulse waveform. Base describes the DC offset of the waveform from 0. This is the level the waveform will be both before and after the pulse. Amplitude is the level of the waveform relative to the base level and has an absolute value that is equal to the base plus amplitude. For example, a pulse waveform with a base of 1Vand an amplitude of 2V would have a low level of 1V and a high level of 3V.
Pulse width is the time that the pulse signal is applied. It is commonly defined as the width in time of the pulse at half maximum also known as Full Width at Half Maximum (FWHM). This industry standard definition means the pulse width is measured where the pulse height is 50% of the amplitude.
Pulse period is the length in time of the entire pulse waveform before it is repeated and can easily be measured by measuring the time from the start of one pulse to the next.
The ratio of pulse width over pulse period is the duty cycle of the pulse waveform.
A pulse’s rise time and fall time are the times it takes for the waveform to transition from the low level to the high level and from the high level back down to the low level. The industry standard way to measure the rise time is to measure the time it takes the pulse waveform to go from 10% amplitude to 90% amplitude on the rising edge. Fall time is defined as the time it takes for the waveform to go from 90% amplitude to 10% amplitude on the falling edge.

Although SMUs are able to compensate for some lead inductance, PMUs have no compensation features, so the effects of inductance must be dealt with directly, such as by:

  • Reducing the size of the change in current by reducing the magnitude of the pulse.
  • Increasing the length of the transition times by increasing the rise and fall times.
  • Reducing the inductance in the test leads

Depending on the application or even the instrument, the first two measures are usually infeasible, which leaves reducing the inductance in the test leads. The amount of inductance in a set of test leads is proportionate to the loop area between the HI and LO leads. So, in order to reduce the inductance in the leads and therefore reduce the size of the humps, we must reduce the loop area, which is easily done by simply twisting the leads together to create a twisted pair or by using coaxial cable. Loop area can be reduced further by simply reducing the length of the cable.

LED Taiwan, opening today at TWTC Nangang Exhibition Hall in Taipei, is Taiwan’s only LED manufacturing-focused exposition. LED Taiwan (March 25-28) showcases LED production equipment and materials, epi wafers, crystals, packaging, modules, etc., as well as related technologies and manufacturing solutions. Organized by SEMI and TAITRA, LED Taiwan is the country’s most influential LED exhibition where manufacturers unveil their products, technologies, and solutions. The Taiwan International Lighting Show (TILS) and Taiwan Solid State Lighting (TSSL) are co-located at LED Taiwan. This combination exhibition platform provides both attendees and exhibitors the world’s most comprehensive view of solid state lighting technology and products, from manufacturing to applications.

As countries across the globe embrace the use of LED lighting, renewed capital spending and capacity increases are foreseen for both 2015 and 2016.  According to the quarterly SEMI Opto/LED Fab Forecast on HB-LED front-end fabs, 2015 LED wafer fab equipment spending will rise approximately 24 percent to nearly US$1.5 billion in 2015, which will boost epitaxy capacity this year. Investment momentum is expected to continue in 2016 with $1 billion spending in front-end LED epitaxy and chip facilities.

Attendees at LED Taiwan 2015 will find solutions and technologies — from hardware, materials, parts, manufacturing, and inspection to test for component manufacturing and encapsulation and thermal dissipation. With a combined 337 exhibitors showcasing their latest developments in LED component technologies, LED manufacturing processes and display lighting applications in 898 booths, the three-in-one, industry-specific event is expected to attract over  20,000 visitors from across the world for the four-day event.

At the LED Executive Summit today (March 25), themed “What’s Next for LED?,” presenters from Cree, EPISTAR, OSRAM Opto, Philips Lumileds, with special video greetings from Dr. Shuji Nakamura, Nobel Prize in Physics Winner 2014. They will share their perspectives on the challenges and opportunities in the LED industry.

The LED Taiwan TechXPOT sessions include:

  • March 25: “Manufacturing Equipment and Materials” track includes speakers from: Advanced International Multitech, Aixtron, DISCO, Dow Corning, Shanghai Micro Electronics Equipment (AMEC), SEMI, Alinc Taiwan, and Sil-More Industrial.
  • March 26: “Sapphire and PSS” track features presenters from Advanced System Technology, EVG, Galaxy Technology Development, Meyer Burger, Monocrystal, Rigidtech, Sandvik Hyperion, Smooth & Sharp, and Yole.
  • March 27: “LED Advanced Technologies” track includes speakers from: Advanced Optoelectronic Technology, ASM, Beijing NMC, Epistar, Everlight, Lextar, PlayNitride, and Yole.
  • March 28: “Smart Lighting and Automobile Lighting” track with presenters from Cree, Infineon Technologies Taiwan, and TSLC.

For more information on LED Taiwan, please visit: www.ledtaiwan.org (Chinese) or www.ledtaiwan.org/en (English).