August 19 — IBM researchers and collaborator Paul W.K. Rothemund, of the California Institute of Technology (CalTech) , have made an advancement in combining lithographic patterning with self assembly
Category Archives: Materials and Equipment
(August 18, 2009) ENDICOTT, NY — Congressman Maurice Hinchey (D-NY) joined Endicott Interconnect Technologies (EI) officials to announce that he’s secured a $6 million federal investment for the company to develop state-of-the-art microelectronic chips for the U.S. military that will safeguard against foreign tampering of weapons.
“As the tactics of U.S. enemies become more sophisticated, it’s imperative that we stay ahead of the curve and develop technology for our military that will be tamperproof and prevent any intentional malfunctioning of U.S. weapon systems,” Hinchey said. “Endicott Interconnect Technologies is going to use this federal funding to develop a state-of-the-art microelectronic chip that will help ensure the integrity of the weapons our forces are using so they cannot be electronically manipulated to work against them. By investing this money now, we are helping to protect American forces while also creating and saving jobs in the Southern Tier and promoting economic growth.”
EI expects to create or save more than 80 jobs as a result of the new funding and the subsequent military contracts it anticipates receiving. The company will develop a microelectronic chip that would enable the military to ensure that no foreign government or hostile organization has tampered with U.S. weapons. The microchips are expected to be used for unmanned ground and aerial vehicles, artillery shells, robots, satellites, and other military equipment.The company will develop the design structures for the anti-tampering detection technology into EI circuit boards that will be manufactured and placed into various military weapons and equipment. The microchips will be fully integrated into the weapons’ circuit boards in order to avoid an enemy’s ability to tamper with just one section of a circuit board. EI will also develop equipment that will be used to test the circuit board microelectronic systems in the various military weapons.
These tests will be conducted over the life time of the system to ensure it hasn’t been altered or tampered at any point over its lifespan. Over the last two decades, a larger percentage of the U.S.-based circuit board microelectronics industry has moved overseas. In addition the negative impact on the U.S. economy, this migration presents a national security risk. The Pentagon now has to ensure and certify that advanced microelectronic components (circuit boards) used in U.S. weapon systems are manufactured within the United States instead of nations and foreign organizations that could have an interest in tampering with microelectronic equipment to harm U.S. forces.
This certification must be conducted because the U.S. military cannot trust the reliability of specific foreign made microelectronics components technology in sensitive weapon systems. Foreign-made parts from nations that are potential adversaries to the United States can be specifically manufactured to fail to work when they are most needed. Tampered foreign made microelectronic parts can be designed to “turn off” or fail to operate at any time during the 30 year life cycle of the microelectronic package that is placed into a U.S. weapon system. EI equipment would ensure that U.S. military microelectronic components are certified “tamperproof” before they are placed into weapon systems on which they lives of U.S. forces depend.
“We have an obligation to protect our troops from their own weapons being used against them as the result of equipment being sabotaged by foreign entities,” Hinchey said. “The technology that Endicott Interconnect Technologies will develop will enable the military to follow the development of these weapons and to know that they will work the way they were designed and have not fallen into the wrong hands. I am very pleased that work on such an important initiative is being done right here in the Southern Tier.”
The implementation of the research and development program with the funds Hinchey secured will create at least 10 new EI jobs and retain 7 other positions. After research and development work is completed, EI estimates that 17 new jobs will be created for continued tamperproof packaging development and implementation. The company expects that 50 or more manufacturing positions will be retained to support production needs. EI will partner with the U.S. Army Research, Development and Engineering Command’s (RDECOM) Armament Research, Development and Engineering Center (ARDEC). ARDEC is the Army’s principal researcher, developer and sustainer of current and future armament and munitions systems.
EI also expects the equipment will be used for non-military purposes, including for laptops, personal computers, BlackBerries, and other personal and business electronic gear. Such manufacturing needs could generate even more jobs at the company.
The $6 million that Hinchey secured is included in the fiscal year 2010 Defense Appropriations bill that the House approved on July 30. The Senate is expected to approve its own version of the bill next month.
August 17, 2009 – Researchers at IBM and the California Institute of Technology say they have come up with a “breakthrough” to solve various problems looming for future semiconductor manufacturing beyond the 22nm node: a combination of lithographic patterning and self-assembly that arranges DNA structures on surfaces compatible with current manufacturing equipment.
DNA origami, they explain, involves folding a long single strand of viral DNA using shorter, synthetic “staple” strands, which they claim display 6nm-resolution patterns, and could “in principle” be used to arrange carbon nanotubes, silicon nanowires, or quantum dots. Making the starting structures, though, depends on an “uncontrolled deposition” which “results in random arrangements” whose properties are difficult to measure, and to integrate with microcircuitry.
Their approach, detailed in the September issue of the journal Nature Nanotechnology, is to use e-beam lithography and dry oxidative etch to create DNA origami-shaped binding sites on certain materials such as SiO2 and “diamond-like” carbon. Caltech’s techniques for preparing the DNA origami structure cause single DNA molecules to self-assemble via a reaction between the long viral DNA strand and shorter synthetic oligonucleotide strands, which fold the viral DNA strand into 2D shapes; these can be modified to be attached by nanoscale components. They tout the ability to create squares, triangles, and stars with 100-150nm dimensions on an edge, and thickness as wide as a DNA double helix. Processing work at IBM used either e-beam or optical lithography to create arrays of the “binding sites” to match those of individual origami structures; key was discovering template material and optimal deposition conditions so that the origami structures bound only to patterns of “stick patches.”
Low concentrations of triangular DNA origami are binding to wide lines on a lithographically patterned surface. (Source: IBM)
Results, from the journal paper abstract:
In buffer with approx. 100 mM MgCl2, DNA origami bind with high selectivity and good orientation: 70%-95% of sites have individual origami aligned with an angular dispersion (±1 s.d.) as low as ±10° (on diamond-like carbon) or ±20° (on SiO2).
High concentrations of triangular DNA origami binding to wide lines on a lithographically patterned surface. Inset shows individual origami structures at high resolution. (Source: IBM)
Essentially, the researchers explain, the DNA molecules act as “scaffolding,” onto which deposited carbon nanotubes would be stuck and self-assembled, at smaller dimensions than conventional semiconductor manufacturing capabilities. “The combination of this directed self-assembly with today’s fabrication technology eventually could lead to substantial savings in the most expensive and challenging part of the chip-making process,” said Spike Narayan, manager of science & technology at IBM’s Almaden (CA) research center, in a statement.
Individual triangular DNA origami are adhering to a template with properly sized triangular features. (Source: IBM)
August 17, 2009: Researchers at IBM and the California Institute of Technology say they have come up with a “breakthrough” to solve various problems looming for future semiconductor manufacturing beyond the 22nm node: a combination of lithographic patterning and self-assembly that arranges DNA structures on surfaces compatible with current manufacturing equipment.
DNA origami, they explain, involves folding a long single strand of viral DNA using shorter, synthetic “staple” strands, which they claim display 6nm-resolution patterns, and could “in principle” be used to arrange carbon nanotubes, silicon nanowires, or quantum dots. Making the starting structures, though, depends on an “uncontrolled deposition” which “results in random arrangements” whose properties are difficult to measure, and to integrate with microcircuitry.
Their approach, detailed in the September issue of the journal Nature Nanotechnology, is to use e-beam lithography and dry oxidative etch to create DNA origami-shaped binding sites on certain materials such as SiO2 and “diamond-like” carbon. Caltech’s techniques for preparing the DNA origami structure cause single DNA molecules to self-assemble via a reaction between the long viral DNA strand and shorter synthetic oligonucleotide strands, which fold the viral DNA strand into 2D shapes; these can be modified to be attached by nanoscale components. They tout the ability to create squares, triangles, and stars with 100-150nm dimensions on an edge, and thickness as wide as a DNA double helix. Processing work at IBM used either e-beam or optical lithography to create arrays of the “binding sites” to match those of individual origami structures; key was discovering template material and optimal deposition conditions so that the origami structures bound only to patterns of “stick patches.”
Low concentrations of triangular DNA origami are binding to wide lines on a lithographically patterned surface. (Source: IBM)
Results, from the journal paper abstract:
In buffer with approx. 100 mM MgCl2, DNA origami bind with high selectivity and good orientation: 70%-95% of sites have individual origami aligned with an angular dispersion (±1 s.d.) as low as ±10° (on diamond-like carbon) or ±20° (on SiO2).
High concentrations of triangular DNA origami binding to wide lines on a lithographically patterned surface. Inset shows individual origami structures at high resolution. (Source: IBM)
Essentially, the researchers explain, the DNA molecules act as “scaffolding,” onto which deposited carbon nanotubes would be stuck and self-assembled, at smaller dimensions than conventional semiconductor manufacturing capabilities. “The combination of this directed self-assembly with today’s fabrication technology eventually could lead to substantial savings in the most expensive and challenging part of the chip-making process,” said Spike Narayan, manager of science & technology at IBM’s Almaden (CA) research center, in a statement.
Individual triangular DNA origami are adhering to a template with properly sized triangular features. (Source: IBM)
Scientists at IBM Research and the California Institute of Technology announced a method for structuring DNA shapes to help build miniaturized computer chips well beyond 22-nm processes. The research claims that chips will be more energy efficient and suited to mass production.
The article abstract in Nature Nanotechnology states that “artificial DNA nanostructures show promise for the organization of functional materials to create nanoelectronic or nano-optical devices. DNA origami, in which a long single strand of DNA is folded into a shape using shorter ‘staple strands’, can display 6-nm-resolution patterns of binding sites, in principle allowing complex arrangements of carbon nanotubes, silicon nanowires, or quantum dots. However, DNA origami are synthesized in solution and uncontrolled deposition results in random arrangements; this makes it difficult to measure the properties of attached nanodevices or to integrate them with conventionally fabricated microcircuitry.”
The authors describe the use of electron-beam lithography and dry oxidative etching to create DNA origami-shaped binding sites on technologically useful materials, such as SiO2 and diamond-like carbon. “In buffer with ~100 mM MgCl2, DNA origami bind with high selectivity and good orientation: 70–95% of sites have individual origami aligned with an angular dispersion (±1 s.d.) as low as ±10° (on diamond-like carbon) or ±20° (on SiO2). BBC News reports that the origami can be designed to serve as a scaffold for electronic components just six billionths of a meter apart, substantially increasing assembly density.
Ryan J. Kershner, Luisa D. Bozano, Christine M. Micheel, Albert M. Hung, Ann R. Fornof, Jennifer N. Cha, Charles T. Rettner, Marco Bersani, Jane Frommer, Paul W. K. Rothemund & Gregory M. Wallraff authored the study.
Photo courtesy BBC News; news.bbc.co.uk.
August 12, 2009: With economic pressure on so many firms, and a not insignificant number folding in various industries, here’s some rare positive news: Arrowhead Research Corp., a firm with subsidiaries involved in carbon nanotubes and bioscience/medicine, has regained compliance with NASDAQ regulations requiring at least $2.5M in equity.
Key to the bounceback was a recent partnership for subsidiary Calando Pharmaceuticals, which applies self-assembling nanoparticles to therapeutic use of RNA interference, in addition to revised cost-controlled operations, noted Arrowhead president/CEO Christopher Anzalone, in a statement.
by Thomas Werner, Johann Steinmetz, Michael Kiene, Björn Eggenstein, Frank Richter, Frank Kahlenberg, GLOBALFOUNDRIES; Simon Heghoyan, Darron Jurajda, Daniel Sullivan, Brewer Science
EXECUTIVE OVERVIEW
As features sizes continue to scale according to the ITRS, Cu wiring based on dual damascene is beginning to hit fundamental limits of current via-first, trench-last (VFTL) integration. To accommodate feature-dependent variations, the thicknesses of the various films comprising the lithography stack for trench patterning are not able to scale as rapidly. This article outlines a novel approach for eliminating these variations using existing processes and equipment, in turn enabling potential benefits to each of the process units involved.
Planarity is increasingly a limiting factor in printing structures in the 32nm technology node and beyond. In addition to non-planarity caused by CMP variations, further loss of planarization arises during the via-fill process with the use of an organic planarization layer (OPL), and subsequently leads to a severe reduction of the lithography focus budget. Since the degree of planarization is compromised by the range of via size and layout within the die, the OPL is therefore coated thickly to compensate for this. The trade-off is to increase the aspect ratio when migrating to smaller dimensions, leading to OPL pattern collapse. Furthermore, feature-dependent variation of the plug height after OPL etch causes a wide distribution in the extent of profile chamfering at the trench-via interface during the ensuing dielectric etch. Such profiles negatively impact the requirements for the subsequent liner fill, which must be correspondingly optimised for a range of possible geometries.
A developer-soluble gap-fill material that uses a wet etch-back process to remove the gap-fill material back to the substrate surface has been developed by Brewer Science. A thick coating of this material, Brewer Science WGF 300, is applied to the substrate, with excess material above the vias removed using a standard photoresist developer, leaves the vias fully filled (steps 2 and 3 of the “WGF approach” in Figure 1). Using this method, it is possible to reduce the initial bias from the coating and provide a more planar surface for the ensuing lithographic and etch processes [1]. Wet etch-back processes have an advantage over dry etch-back gap-fill materials as they eliminate the need to transfer wafers between the etch and photo bays, since all the processing for a wet etch-back material can be performed with standard lithography equipment [2]. The WGF approach is compared to the process of record (POR) in Fig. 1.
Figure 1. Process flows, POR versus WGF approach. (Image courtesy of GLOBALFOUNDRIES Dresden Module One LLC & Co. KG)
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Impact on planarity
At the initial step of the investigation, the impact of WGF 300 material upon OPL planarity was measured on a 32nm test chip. WGF 300 material was applied after via etch, after which the gap-fill layer was developed-back until reaching the top of the vias. This step was followed by a second deposition of the POR OPL. Figure 2 shows a comparison of the planarization using the POR and WGF 300 approaches. Using the WGF 300 approach, it was possible to improve the feature-dependent variation in OPL height from 60nm to nearly zero. Depending on the product layout, this planarity improvement is expected to translate into improvements in the lithography process window across various via densities. The exact impact on the lithography process will be subject of a later investigation.
Due to the variations in planarity, the OPL etch time is limited by the lowest OPL plug-height found in any feature. This limitation can cause unfavourable trench profiles, especially in the transition area between trench and via. When WGF 300 material was used, it was possible to use longer OPL etch times, which leads to more chamfer in this region and consequently allows better liner coverage. This effect was found to be beneficial for the subsequent copper fill process.
Figure 2. OPL thicknesses over various features. (Image courtesy of Thomas Werner, GLOBALFOUNDRIES Dresden Module One LLC & Co. KG)
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Furthermore, the improvements in OPL planarity with the WGF approach allow thinning of the OPL layer, which could not be achieved with the POR approach. Thinner OPL allows for better CD control over various features. Additionally, the amount of OPL which needs to be stripped after the trench etch is reduced. This aspect can also help to reduce low-k/ultralow-k damage effects, such as increased capacitance and undercut below the hardmask layer.
A number of 32nm and 45nm split-lots were processed, where the WGF 300 approach was compared directly to POR. Most electrical parameters, such as line resistance and via chain yield, were comparable or slightly improved when WGF 300 was used. A remarkable improvement was achieved for some via-leakage structures. As shown in Figure 3, these structures are used to measure leakage between neighbouring vias with adjacent trenches. This result can be explained by the improved planarity over areas of dense vias, which provides relatively thicker OPL compared to the POR. This improved planarity results in more OPL remaining in these critical areas, which in turn provides better protection of the narrow isolation during trench etch.
Figure 3. Improved via leakage behaviour in critical test. (Image courtesy of GLOBALFOUNDRIES Dresden Module One LLC & Co. KG)
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The defect performance using 32nm material was slightly improved compared to the reference process. Product yield in the 45nm technology was comparable to the POR manufacturing technology.
Conclusion
Developer-soluble gap-fill materials can offer the following advantages when implemented in the via-first, trench-last (VFTL) OPL integration flow:
- Increased photolithography process window
- Improved dual damascene profiles due to wider OPL etch-process window
- Thinner OPL to allow for vertical scaling of OPL thickness.
With the introduction of developer-soluble gap-fill materials, it becomes possible to extend the current integration approach to technology nodes beyond 32nm. Implementation into an existing process flow requires two additional process steps (OPL coat and develop), which can be performed in a properly configured stand-alone coater-developer track. The material proved compatible with currently used materials and processes in the fab.
Acknowledgment
WGF 300 is a registered trademark of Brewer Science, Inc., Rolla, MO USA.
References
[1] C. Washburn, N. Brakensiek, A. Guerrero, K. Edwards, C. Stroud, N. Chapman, “Wet-recess Process Optimization of a Developer-soluble Gap-fill Material for Planarization of Trenches in Trench-first Dual Damascene Process,” Proc. of SPIE, vol. 6153, 2006, pp. 815-820.
[2] D.M. Sullivan, R. Huang, S. Brown, A. Qin, “New Developer-Soluble Gap-Fill Material,” Proc. of the 6th Inter. Conf. on Semiconductor Tech., vol. 2007-01, 2007, pp. 61-70.
Biographies
Thomas Werner received his masters in electrical engineering at Chemnitz U. (Germany) and is senior member of the technical staff at GLOBALFOUNDRIES Module One LLC & Co. KG, Wilschdorfer Landstr. 101, 01109 Dresden, Deutschland; e-mail [email protected].
Johann Steinmetz received his Dipl.-Ing (FH) in physical chemistry at the U. of Applied Sciences Munich (Germany) and is a member of the technical staff at GLOBALFOUNDRIES Dresden Module One LLC & Co. KG.
Michael Kiene received his PhD at Kiel U. (Germany) and is a member of the technical staff at GLOBALFOUNDRIES Dresden Module One LLC & Co. KG.
Björn Eggenstein received his masters in electrical engineering at the Technical U. of Berlin (Germany) and is a senior process engineer at GLOBALFOUNDRIES Dresden Module Two GmbH & Co. KG.
Frank Richter received his Dr.rer.Nat. at the U. of Regensburg in solid-state chemistry and is a process engineer at GLOBALFOUNDRIES Dresden Module One LLC & Co. KG.
Frank Kahlenberg received his diploma and doctorate degree in chemistry from the U. of Wuerzburg and is a lithography process engineer at GLOBALFOUNDRIES Dresden Module One LLC & Co. KG GLOBALFOUNDRIES, Dresden, Germany.
Simon Heghoyan received his PhD in solid-state physics from the U. of Wales, Cardiff and is an account manager at Brewer Science Ltd, Derby, England UK.
Darron Jurajda received his BS in chemical engineering from the U. of Texas at Austin and is a field applications engineer at Brewer Science, Inc., Rolla, MO USA.
August 11, 2009: Researchers at Lawrence Livermore National Laboratory have created a platform that uses lipid-coated nanowires to build prototype bionanoelectronic devices. The work shows promise for enhancing biosensing and diagnostics tools, neural prosthetics (e.g., cochlear implants), and even future computers.
Earlier research focused on integrating biological systems with microelectronics but came up short of achieving true seamless material-level integration. The LLNL team used lipid membranes, ubiquitous in biological cells, which “form a stable, self-healing, and virtually impenetrable barrier to ions and small molecules,” the researchers note in a statement. They can also house vast numbers of protein “machines” that perform various functions from recognition, transport, and signal transduction.
In their work, published online Aug. 10 by the Proceedings of the National Academy of Sciences, the team led by Aleksandr Noy incorporated lipid bilayer membranes into silicon nanowire transistors by covering the nanowire with a continuous lipid bilayer shell, which acted as a barrier. With the “shielded wire,” membrane pores were “the only pathway for the ions to reach the nanowire,” Noy said, enabling the nanowire device “to monitor specific transport and also to control the membrane protein.” The membrane pore could be opened and closed by changing the gate voltage of the device.
An artist’s representation of a nanobioelectronic device incorporating alamethycin biological pore. In the core of the device is a silicon nanowire (grey), covered with a lipid bilayer (blue). The bilayer incorporates bundles of alamethicin molecules (purple) that form pore channels in the membrane. Transport of protons though these pore channels changes the current through the nanowire. (Image by Scott Dougherty, LLNL)
From the abstract:
We present a versatile hybrid platform for such integration that uses shielded nanowires (NWs) that are coated with a continuous lipid bilayer. We show that when shielded silicon NW transistors incorporate transmembrane peptide pores gramicidin A and alamethicin in the lipid bilayer they can achieve ionic to electronic signal transduction by using voltage-gated or chemically gated ion transport through the membrane pores.
The work is in the early stages, the researchers note, but Noy points out that with “the creation of even smaller nanomaterials that are comparable to the size of biological molecules, we can integrate the systems at an even more localized level.”
August 10, 2009: Researchers at Brown U. are offering more evidence about the hazards involved with carbon nanotubes, showing how exposure to them might be fatal to fruit flies.
In their work, published online August 10 by the journal Environmental Science & Technology, a team immersed adult Drosophila melanogaster in various carbon nanoparticles (carbon black, C60 “buckyballs,” single-walled carbon nanotubes, and multiwalled carbon nanotubes). The flies in test tube with no nanoparticles ,C60, and MWNTs climbed out “with few or no difficulties” — but the others in carbon black and SWNTs couldn’t, and died “within six to 10 hours.” Postmortem analysis revealed they were smeared with the particles “from wings to legs” (suggesting impaired movement), which clogged breathing holes (possibly causingsuffocation ) and coated their compound eyes (possibly causing blindness, so they couldn’t see the way out). “They just can’t move. It’s like a dinosaur falling into a tar pit,” Rand added.
Microscopy shows a clean foot and leg of a fruit fly (left), and a foot and leg covered with carbon nanostructures (arrows). Adhering nanostructures may have impeded movement, respiration and vision in adult flies but did not appear toxic to fly larvae that ingested it. (Source: Brown U.)
The scientists stop short, though, of saying the particles actually directly caused the flies’ deaths. This is probably partly because it may not simply the nanoparticle itself that is hazardous, but maybe its form is the key, Rand explained. Meanwhile, separate tests on Drosophila melanogaster larvae “showed no physical or reproductive effects” from eating food contaminated by the same nanoparticles. “These same compounds that were not toxic to the (fruit fly) larvae were toxic to the adults in some cases, so there may be analogies to other toxic effects from fine particles,” noted biology prof. David Rand, in a statement. He drew an analogy to the effects of working in a coal mine: “You get sick more from the effects of dust particles than from specific toxins in the dust.” The lack of impact on larvae also suggests that nanoparticles were seen stored in the flies’ tissue The work also suggests that it is not simply the nanoparticle itself that is hazardous, but maybe its form is the key, he added.
The work also shows potential environmental impact of exposure to nanoparticles. The adult flies were shown to transport and deposit carbon nanoparticles during grooming, suggesting contamination can be spread. And though two generations of the fruit fly larvae showed no ill effects from ingesting the nanoparticles, they did store some in their tissue, indicating they can be passed through the food chain.
While fly larvae appear to have ingested carbon nanostructures without harm, the nanostructures remained in their bodies through adulthood, raising questions about accumulation in the food chain. (Source: Brown U.)
Overall, the work indicates that different types of the same material (carbon) can have different effects. Future work will investigate why the flies died after exposure to varieties of carbon nanoparticles (but not others), and also test the flies’ response to nanosilver and other nanomaterials.
The research was funded by the National Science Foundation, the National Institute of Environmental Health Sciences, the Superfund Research Program Grant, and the Research Seed Fund Program of Brown’s Office of Vice President for Research.
Building on its Galaxy imaging platform, DEK has used the foundation of the technology’s supreme accuracy and precision to develop a system specifically for processing thinned silicon wafers. The new Galaxy Thin Wafer System offers exceptional stability, enhanced process capability of Cp>2 @ +/- 12.5µm and advanced speed and acceleration control to ensure robust processing of today’s delicate wafer products.
Central to the outstanding process capability of the Galaxy Thin Wafer System is an expertly engineered wafer pallet that delivers the support and stability required to properly secure wafers as thin as 75µm during transport and processing. Approximately 400mm square, the DEK wafer pallet is flat to less than 10µm and can accommodate wafers as large as 300mm. The careful selection and use of porous materials ensures that thinned wafers can be held securely while being successfully processed with any one of today’s most sophisticated packaging techniques, including DirEKt Ball Placement™, DirEKt Coat™ wafer backside coating, protective coating imaging, thermal interface materials deposition, wafer bumping and encapsulation. The new pallet technology also delivers versatility, as it is capable of supporting wafers of varying sizes and thicknesses.
With a robust rail system and precision transport technology, the Galaxy Thin Wafer System provides the support and movement control required to accommodate transfer of the wafer-loaded pallet into and out of the mass imaging platform. The system’s toothed, flat belts are driven by a servo motor and supply the large contact area critical for support and stability of the wafer pallet, offering unmatched control of its speed, acceleration and positioning.
On board the Galaxy Thin Wafer System, DEK’s award-winning DirEKt Coat™ process for deposition of 25µm thick die attach adhesives and other coatings now boasts a process capability of Cp>2 @ +/- 12.5µm and a Total Thickness Variation (TTV) as low as 7µm on 150µm thin wafers as large as 200mm in diameter. Additional process extension afforded by the new system includes high first pass yield ball placement of 200µm spheres at 3000µm pitch, precision thermal interface materials deposition and wafer bumping, among others.
“The next-generation Galaxy Thin Wafer System provides a high-speed, high-accuracy alternative to traditional thinned wafer materials deposition methods,” explains David Foggie, DEK Semiconductor and Alternative Applications Manager. “With the ability to host a variety of processes from wafer coatings to ball placement through to encapsulation