Category Archives: Materials and Equipment

May 29, 2008 – A paper published last week on the U.K.’s Nature Nanotechnology site (see a summary of the pay-to-read report, “Carbon nanotubes introduced into the abdominal cavity of mice show asbestos-like pathogenicity in a pilot study”), tells of research findings that long carbon nanotubes injected into mice can form lesions that may lead to cancer. News of the report showed up in media outlets all around the world, even — thanks to syndication — small town newspapers. These news articles carry alarmist titles, such as “Nanotubes found to pose same danger as asbestos” (which appeared in New Hampshire’s Concord Monitor).

Because the news reports focus on “long” nanotubes, I was curious to hear from Nanocomp Technologies (also based in Concord, NH), which is known for continuous production of long, highly pure carbon nanotubes. In an exclusive interview, Nanocomp CEO Peter Antoinette told Small Times that even if the report is highly suspect (and he noted that Nanocomp’s staff scientists are annoyed by its “bad science”), “we treat this issue with respect and don’t cut corners.” And, he points out, this has been the company’s modus operandi since the beginning.

Nanocomp’s “growth area,” the negative-pressure room where the company grows sheets of nano “fabric,” is a cleanroom of sorts, and the staff dons protective bunny suits, eyewear, gloves, and masks. The company follows a regular routine of stringent monitoring — and verifying the efficacy of the monitoring, with Dr. Michael Ellenbecker of UMass Lowell’s School of Health & Environment. Not surprisingly, given the investment Antoinette described for filtration equipment in the nanomanufacturing room, the monitoring has revealed the presence of far more particulates in the warehouse and office areas than in the growth area.

Antoinette explained his company’s full disclosure of information to Nanocomp’s employees (who are trained, tested, empowered to “stop the assembly line,” and given access to a full range of articles and studies), landlord, neighbors and other stakeholders. And while he’s clearly serious about mitigating any detrimental effects of nanotubes, he notes that he’s even more concerned about other, more “mundane” worker hazards such as chemicals and mechanical equipment.

Incidentally, while the Nature Nanotechnology paper defines “long” nanotubes as those of more than 20 microns, the longest tubes used in the experiment were 56 microns — and Nanocomp’s are millimeter-long nanotubes. The company is working on application of nanotechnologies to dramatically increase the efficiency of solar power conversion and other uses.

May 28, 2008 – Qcept Technologies and European R&D organization CEA-Leti have inked a deal to investigate techniques for characterizing leading-edge semiconductor materials and processes, including high-/low-k dielectrics, atomic layer deposition (ALD), fully silicided (FUSI) metal gates, and advanced cleaning technologies. Under the deal, Qcept’s ChemetriQ non-visual defect inspection has been installed at CEA-Leti’s facility in Grenoble, France, to augment existing process characterization capabilities.

“Advanced materials and processes, such as high-k dielectrics and metal gates, have the potential to significantly enhance the performance of future generations of semiconductor devices. However, their complexity can give rise to new and unique yield problems, which require innovative inspection methods,” said Adrien Danel, lead research engineer at CEA-Leti, in a statement. “This partnership with Qcept can help us to better understand the yield issues surrounding these materials and processes in order to speed their development and integration into full-scale manufacturing.”

“Working with CEA-Leti will provide us with a unique opportunity to have early access to these advanced technologies — allowing us to qualify our ChemetriQ solution for some of the industry’s most cutting-edge applications,” added Ralph Spicer, VP of marketing for Qcept.

In March of this year, Atlanta, GA-based Qcept raised another $9.5M in a Series C round of funding, bringing the overall total financing raised to roughly $25M.

May 23, 2008 – Researchers at the U. of California/San Diego say they have created solar cells “spiked” with nanowires that could show the way to improved efficiency in thin-flim solar cells. The “proof-of-concept” project, published earlier this year in Nano Letters, describes the device as a “photodiode” rather than a “photovoltaic” since they did not measure how efficiently the device converted sunlight to electricity.

The paper describes a carrier transport polymer hybrid system with indium phosphide (InP) nanowires grown directly onto a metal oxide — without using a special substrate, e.g. gold nanodrops — and enveloped with a conjugated polymer, poly(3-hexylthiophene) (P3HT). “In this paper we used ITO, but you can use other metals, including aluminum,” said Paul Yu, a professor of electrical engineering at UCSD’s Jacobs School of Engineering, in a statement.

Figure 1:Schematic of the nanowire-polymer hybrid device. Top yellow layer is the gold electrode that attracts the holes; blue gradient is the P3HT polymer material that absorbs the sunlight; the yellow InP nanowires are grown directly on the green metal substrate (ITO). (Source: UCSD)

Including nanowires in the experimental solar cell increased the forward bias current (a measure of electrical current) by six to seven orders of magnitude vs. a polymer-only control device, the engineers found. And providing a pathway for electrons to the electrode can reduce inefficiencies seen in polymer-mixtures with current solar cells, noted Clint Novotny, author of the paper (now at BAE Systems), in the statement. Growing the nanowires directly on the electrode will “improve device performance, reduce the problem of reproducibility of contacts to nanowires, and provide a method of nanowire growth that does not use expensive substrates such as Si or InP,” they say in the paper.

Figure 2:SEM of n-type InP nanowire growth on ITO taken at a 45&deg. Scale bar is 500nm. (Source: UCSD)

The team notes that the nanowires provide “a very large number of junctions throughout the entire polymer matrix,” which enhances the likelihood of exciton disassociation. Carriers created in the nanowires also can go directly to the electrode without carrier hopping, creating “a more efficient and defined pathway for carrier collection.”

“In effect, we used nanowires to extend an electrode into the polymer material,” said co-author Edward Yu, a professor of electrical engineering at UCSD’s Jacobs School of Engineering.

Photon-absorbing electrons in the polymer material split apart from the holes at the interface of the polymer and the nanowire (the p-n junction). The electrons and holes travel along opposite directions in the nanowires, until the holes hit the end and travel through a thin polymer layer to the electrode. There are other experimental PV designs being examined that include nanowires or carbon nanotubes, the UCSD scientists note in the statement, but not electrically connected to an electrode, and thus do not minimize electron-hole recombination by providing a direct path from the p-n junction to the electrode.

Having a more efficient method for getting electrons to their electrode means that researchers can make thin-film polymer solar cells that are a little bit thicker, and this could increase the amount of sunlight that the devices absorb.

Future work would be needed to improve performance (overcome loss mechanisms, e.g. limited efficiency due to low-value short circuit current), and improving the polymer deposition technique to allow for more uniform layers (drop-casting resulted in a large gap between the nanowire tips and gold electrode; dip-coating or dry etching may offer improvements). Further experiments also will look at improving the interface between the nanowires and polymer (a leakage source), and overall charge transfer between the materials.

Novotny noted work can look ahead to eventually “incorporating millions or billions of nanowires in a single device,” but noted such technology is “at least a decade away” from becoming mainstream.

(May 23, 2008) San Jose, CA&#151 The conservative mood of the industry and impending fab projects that were put on hold unitl early 2009 resulted in a book-to-bill ratio of .81 for April 2008, according to Stan Myers, CEO of SEMI. This reflects an 8% drop in bookings and 2% drop in billings since March for North America-based manufacturers of semiconductor equipment. A book-to-bill of 0.81 means that $81 worth of orders were received for every $100 of product billed for the month.

The three-month average of worldwide bookings in April 2008 was $1.07 billion. The bookings figure is about eight percent less than the final March 2008 level of $1.17 billion, and almost 32 percent less than the $1.57 billion in orders posted in April 2007.

The three-month average of worldwide billings in April 2008 was $1.32 billion. The billings figure is about two percent less than the final March 2008 level of $1.34 billion, and about 17 percent less than the April 2007 billings level of $1.59 billion.

“Relatively flat bookings and billings for North American semiconductor equipment reflect the continued conservative mood of the industry,” said Myers, “A number of fab projects have been put on-hold or delayed until 2009, and the current 2008 equipment data reflect this trend.”

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.

by James Montgomery, News Editor, Solid State Technology

May 22, 2008 – A new report published in the journal Nature Nanotechnologies is raising alarms about apparent health risks associated with carbon nanotubes (CNT), similar to those seen with asbestos. But efforts are already underway to look more closely at potential issues, according to Walt Trybula, former SEMATECH immersion lithography guru and now at Texas State, in an email exchange with WaferNEWS.

The Nature Nanotechnology report concludes that the needle-like fiber shape of CNTs resembles that of asbestos, and researchers in the UK cited their work showing that exposing the mesothelial lining of a mouse to long multiwalled CNTs “results in asbestos-like, length-dependent, pathogenic behavior,” including formation of lesions. The scientists claim that the results cast doubt whether CNTs are “no more hazardous than graphite,” and urge for more research “and great caution before introducing such products into the market.”

The International Council on Nanotechnology (ICON) released a statement commenting on the study (and a previous one published in the Journal of Toxicological Sciences), noting that the work doesn’t address whether humans can be exposed to the CNTs in a way to cause mesothelioma. Questions remain, said ICON: what are the correlative factors to humans vs. mice — e.g., in terms of CNT exposure/dosage, if the CNTs stay in the body long enough to have the same impact, whether there’s a difference between long and short-length CNTs or if nonfibrous tangled CNTs have the same effect, whether iron in the samples was in fact the agent responsible, etc.

Trybula told WaferNEWS that among the various types of asbestos, Crocidolite is the most dangerous, with a shape consisting of straight needle-like fibers. However, he pointed out, some experts suggest only lengths of >5μm are of concern, and in these experiments bundles of 20μm CNTs were the culprit. And, he said, some reports have noted the CNT doses in the UK study “were extremely high” — and he added that massive amounts of ordinary drinking water, too, can be fatal.

But the issue of widening the known health/safety impact of CNTs and other new nanotechnologies is a real one. “We know there are potential issues,” said Trybula. “We need to understand and address the problems.” He noted that there have been some cases where people showed or exposed problems with nanotechnology and didn’t follow up to help with answers or suggestions. “We need to have people that will fix the problem.”

Trybula, now director of the Nanomaterials Application Center (NAC) at Texas State University-San Marcos, is working to help create a “Nano-Safety” program, which has a white paper about this issue that he said had been distributed to members of Congress. (Note: the group’s branding is to capitalize the name as NANO-SAFETY, “because there is nothing small” about the issue). NAC also is working with local firm nanoTox, which he says is working on nanotoxicological tests and safety screening technology.

The NAC currently is participating in a joint “nano-safety” education effort with Sam Houston State U., with another joint effort launching later this year with Sul Ross State U. “We are pushing this effort to educate people and train them in handling the developing nanotechnology products,” he said. “This needs to be a systematic solution.” — J.M.

(May 22, 2008) SINGAPORE &#151 STAT ChipPAC hosted its inaugural Supplier Day, honoring eleven materials and equipment suppliers for outstanding contribution as key suppliers. The awards ceremony, held on May 13 in Singapore, recognized supplier achievements in 3 categories: outstanding overall performance, outstanding service, and special site outstanding service.

Award recipients were selected based on exemplary service and performance to STATS ChipPAC and its customers by demonstrating excellence in quality, on-time delivery, technology, service, flexibility and cost competitiveness.

The winners by category are:

Outstanding Overall Performance Award
Nan Ya Printed Circuit Board Corporation
Heraeus Oriental HiTec Co. Ltd.
Tanaka Kikinzoku International K.K.
Senju Metal Industry Co., Ltd.
Verigy Ltd.
Tokyo Seimitsu Co., Ltd.

Outstanding Service Award
Shinkawa Ltd.
Phoenix Precision Technology Corp.
MK Electron Co., Ltd.

Special Site – Outstanding Service Award
Eastern Co., Ltd.
Sumiko Electronics Suzhou Co., Ltd.

“These honored suppliers are essential to our success,” said Wan Choong Hoe, Executive VP and COO of STATS ChipPAC. “We congratulate the award winners on their accomplishments and appreciate their exemplary and continuing support to our efforts to provide supply chain excellence to our customers.”

May 21, 2008 – SEMI touched up its March figures for chip equipment demand, resulting in a little better picture for that month — but the view on April figures is weak.

April orders from North America-based manufacturers of semiconductor equipment totaled $1.07M, about 11% lower than March and nearly 25% lower than a year ago. Sales actually rose 0.6% M-M to $1.32B, though down -8.2% from a year ago.

SEMI’s new tally for March figures adds about $51M to billings and ~$8M to bookings. The net result is a swing to positive M-M sales growth (first such stretch in a year), and a minor improvement in bookings growth, and so the B:B dropped a couple of points to 0.87.

The good news: chip sales growth has risen three straight months now (ok, 0-2.6%, but still…), and that hasn’t happened in a year.

The bad news: chip orders took a big step back in April, sinking -11% M-M (biggest drop since last July) and more than -24% Y-Y (biggest drop since Sept. ’07).

And the B:B ratio, which had been steadily climbing, fell to a seven-month low of 0.81, meaning $89 worth of orders were received for every $100 worth of product billed for the month.

In a statement, SEMI president/CEO Stanley Myers pointed to the familiar “conservative mood of the industry” that continues to be reflected in sluggish equipment demand. In fact, he said, “a umber of fab projects have been put on-hold or delayed until 2009.”

by Pete Singer, Editor-in-Chief, Solid State Technology

May 20, 2008 – Applied Materials is urging the semiconductor industry to rethink how it defines productivity. Taking a page out of the Toyota playbook, AMAT’s Iddo Hadar said the focus should not be on improving productivity but eliminating waste, including what he calls “redistributed” waste. Hadar, the company’s CTO, CMO, and strategy officer for foundation engineering at the silicon systems group, spoke this morning at The ConFab conference in Las Vegas.

The industry is well known for its use of scaling to effectively increase the functionality of a square area of silicon. Geometries have shrunk, yield has been improved, and more functions have been integrated into a single chip. “Productivity in the way an economist would look at it would be to take all the things that go into production compared to the output — that’s the productivity,” Hadar said. “In our industry, just like in other industries, there’s the pressure between maximizing the output and minimizing the waste in what it takes to produce it. Historically, we’ve working a lot on maximizing the output. The model seems to have been working very well. We were driving scaling, making sure we were getting as many transistors per piece of silicon as we could, we were trying to make sure we crank out as much silicon per hour as we could, we push those transistors to work fast and improve the yield.”

From a waste perspective, this all means the waste of silicon has been greatly reduced. But the problem, said Hadar, is that this has been achieved by redistributing waste into other areas. “The two areas where the industry has generated a lot of waste was in the area of cycle time as well in the use of natural resources,” Hadar said. “We feel that these are the two main levers that the next generation factory needs to focus on to see that the waste is being controlled and managed. The idea is we look at the waste that is being generated in this area and find the best way to eradicate this waste.”

Ways to reduce such waste, he said, is eliminating several factors: time wafers spend waiting without action, time wafers spend waiting for other wafers to finish processing, processes that are added and then subsequently removed, and inconsistent wafer-to-wafer process results. “A wafer spends most of the time in the fab sitting and waiting. No process, no metrology, no motion.. just sitting and waiting. There are elements of this that are driven by equipment variability, significant elements driven by the impact of batch processing throughout the process flow, and there’s a significant impact of large lot sizes,” Hadar said.

In terms of process equipment, waste can be reduced by eliminating equipment idle time, equipment variability, and the gap between facilities/consumables needed for wafer processing and actual resources.

Hadar also touched on the need for sustainability, which he equated to energy waste. Contributors to energy waste include sub-optimized tools, inefficient fab architectures and the use of fossil fuel. “Theoretically, the carbon footprint of a fab could be an order of magnitude smaller than it is today,” he said.

Eliminating waste will require a coordinated industry effort, including a roadmap and prioritizing agility and sustainability, “just like scaling,” Hadar said. Agility will come in the form of small lot manufacturing, better equipment predictability (i.e., low variability) and universal single-wafer processing.

Right now the industry is being held hostage by “mental models,” when what we need to do is redefine productivity and recognize that extrapolating past methods won’t help tackle future challenges. Multiple sources of waste in the fab are beyond the classical focus on scale-down and scale-up, Hadar noted, whereas a coordinated move along all of them could eradicate waste in the next generation fab. “The first step we need to take is realizing that we need to align our definitions, we need to align our definition of success in the metrics that we use to articulate and that would help us focus our resources and investments into the areas that we have left behind — the areas of waste generation and waste redistribution where we believe there are significant improvements to be realized,” Hadar said.

He called for development of a common roadmap to tackle the key sources of waste in the fab, similar to how the ITRS has been used to tackle scaling challenges: Such a roadmap would:

– Leverage solid economic rationale, technical knowledge, and operational insights to evaluate and prioritize potential initiatives; set common vision and clear goals;
– Recognize and capture the value of agility — cycle time reduction — to expand the value of the 300mm fab investment; and
– Pursue sustainability and dramatic reduction in environmental impact

Hadar presented a perspective on waste (previously presented at ISSM in Tokyo last October), broken into four quadrants representing the factory, unit, wafer and equipment view (see figure). The goal in each area is to drive the waste to zero.

The focus in Quadrant 1 (lower left) is eliminating waste of silicon. Productivity solutions in this quadrant are well understood, and the waste perspective provides little new information, he said.

In Quadrant 2 (lower right), the waste perspective means reducing the input required to achieve the desired function. In this light, Hadar said equipment suppliers’ focus on outsourcing, consolidation, and streamlined operations clearly benefits industry productivity, as do the more traditional equipment design improvements.

Analysis of Quadrant 3 (upper left) from the waste perspective reveals fundamental manufacturing inefficiencies related to waiting time of wafers in the factory.

Waste in Quadrant 4 (upper right) stems from inefficient use of factory resources. In many fabs, production equipment often remains idle — even when WIP is available for processing. Furthermore, equipment variability causes unpredictable frequency and duration of maintenance events, resulting in transient queues in different areas of the fab. Many factories are forced to purchase additional equipment capacity to combat the effects of variability.

The semiconductor industry has systematically pushed waste into Quadrants 3-4, while making improvements in Quadrants 1-2, Hadar noted.

The 300mm Prime program represents an opportunity to create step-change improvements in 300mm fab productivity, Hadar said. If the semiconductor industry focuses its combined resources on these initiatives, with an unrelenting commitment to pushing process technology forward, he asserted, fab productivity can be driven for many years to come. — P.S.

by Debra Vogler, senior technical editor, Solid State Technology

May 20, 2008 – The rapid rise in the cost of advanced processing equipment has outpaced the cost of building fabs in the last few years. While facility costs have started to increase again, those increases are in line with the consumer price index, according to ConFab presenter Rick Whitney, COO of US operations at M+W Zander.

Whitney told SST that two factors point to the relative decreasing costs of building factories: 1) less of a need to build sub-class 1 clean rooms, and 2) a slowdown in the evolutionary design of facilities. Additionally, as the industry is moving from 300mm to “300mm Prime” and 450mm wafer manufacturing, more effort has been going into designing energy efficient facilities.

The phrase “slow down” seldom evokes a positive response when applied to business, however, when it comes to the evolution of wafer fab facility design, it’s a good thing. Whitney pointed out that in the 1980s and 1990s, facility designs progressed very rapidly from one type of facility to another, from single level, to two levels, and then three levels. Now, however, fab designs are going back to being two-level facilities.

“In the mid-90s, we went to three levels because support equipment was larger than tools and there was a desire to get hi-vacuum pump systems out of the cleanroom,” said Whitney. The main reason for the scaling back to two levels is that the size of the support equipment has not increased as fast as the size of the mainframe tools being supported. As an example, Whitney noted that the support equipment underneath an EUV tool married up to a track is much smaller in footprint than the main equipment (the EUV + track) taken together. “And we’ve gotten more creative in how we use vertical space in the sub-fab,” said Whitney. “We can stack systems.”

While fab designs were scaling the walls in the mid-90s, the class of cleanrooms being built went from class 10, to class 1, to sub-class 1. “Fab design continued to be driven by cleanliness requirements sometimes referred to as the Ohmi era, which was fanatical about cleanliness — everything had to be stainless or have a skin,” explained Whitney. “Now, with closed process chambers, FOUPs and automation, the product is not open to the environment,” so fabs can now work with a less-stringent class 100 turbulent environment. Moreover, what used to be 100% filter coverage is now down to 20%-25% filter coverage, Whitney said. “This is a significant cost reduction since it ripples through the design from air movement to chilled water capacity to electrical equipment and power consumption.”

Another change in fab design is that filter coverage for heat removal and air circulation are as important a consideration as filter coverage for cleanliness. “It used to be that filter coverage for cleanliness was the primary driver to achieve sub-class 1, and it was automatically designed in at 100%,” said Whitney. “Heat removal/air circulation was a secondary effect of that design. Today, we have to balance the requirements for cleanliness and filter coverage with the calculations required to move enough air for heat removal.” Whitney also told SST that in the past, filter coverage at 100% was substantially more expensive than the current 20%-25% levels. “This is a first cost savings for FFUs (fan filter units) and/or air handlers, chiller, cooling towers, pumps, piping and electrical equipment,” he said. “Then it is also a savings from an operational perspective, since you are not powering all those systems just to clean the air.” — D.V.