By Dr. Phil Garrou, Contributing Editor
Dr. Dongkai Shangguan is currently the Chief Marketing Officer of STATS ChipPAC. Previously, Dongkai served as the founding CEO of the National Center for Advanced Packaging Co., Ltd. (“NCAP China”), worked for 10 years at Ford Motor Company in various technical and management functions, and for 11 years at Flextronics as Corporate Vice President of Global Advanced Technology.
SST: In 2015, STATS ChipPAC was acquired by JCET (Jiangsu Changjiang Electronics Technology Co., Ltd.) and organized as a business unit. Can you describe some of the personnel changes that have taken place?
DS: Following the acquisition, STATS ChipPAC became a business unit under the JCET Group with the same organizational structure as what we had prior to the completion of the deal. Dr. Han Byung Joon (BJ) was appointed to be Co-President and Chief Executive Officer with Tan Lay Koon. Dr. Han had served as our Chief Technology Officer since 1999. He and Lay Koon had worked very closely over the years and together led the company through the first three months following the acquisition. After the initial transition period, Dr. Han became the President and CEO for the company. Reporting directly to JCET Group Chairman Wang XinChao, Dr. Han has full responsibility for the business results of STATS ChipPAC. He also serves as Chairman of the Technology Strategy Council for the JCET Group.
In August of last year, there were two additional executive appointments. Woo Kwek Kiong (KK) was appointed Senior Vice President and Chief Financial Officer for the Company. Prior to joining us, KK was Chief Financial Officer at Advanpack Solutions Pte Ltd and ASTI Holdings Limited. Il Kwon (IK) Shim was promoted to Senior Vice President and Chief Technology Officer. IK has been with STATS ChipPAC since 2000 and prior to his promotion served as Head of Research and Development.
In December, Cindy Palar was appointed as Managing Director of STATS ChipPAC Singapore (SCS), where our FlexLineTM manufacturing is located. Cindy has been with the Company since 1999 and has held a number of senior management positions in Strategic Marketing, Pricing, Product Line Management and Demand/Capacity Planning.
JCET chose a light integration strategy for the acquisition in order to keep the focus on our customers and minimize any disruptions with our service and support. The organizational structure and operating systems for STATS ChipPAC have remained the same as before the acquisition, providing a smooth transition following the deal completion.
SST: We know that JCET is the largest semiconductor packaging and test provider in China through JCAP (Jiangyin Changdian Advanced Packaging Co., Ltd. ) a subsidiary of JCET which provides wafer bump (solder bump, gold bump, pillar bump), Wafer Level Chip Scale Packaging, assembly and test. Can you differentiate between what JCET SCP and JCET JCAP will offer the customer as divisions of JCET?
DS: JCET has extremely solid credentials in turnkey wirebond packaging, servicing a broad range of applications with very good relationship with a large number of customers, particularly in China. JCET focuses primarily on leaded wirebond and flip chip packaging including assembly of discrete packages.
JCAP provides turnkey services including wafer bump, probe and assembly. JCAP is a leader in advanced wafer bump technology (solder bump, gold bump, copper pillar bump) and Wafer Level Chip Scale Packaging (WLCSP).
STATS ChipPAC, with the strongest IP portfolio in the OSAT industry for many years, clearly brings very strong advanced packaging technologies to the JCET Group, particularly in Fan-out Wafer Level Packaging (FOWLP), laminate-based Flip Chip, package-on-package (PoP), and System-in-Package (SiP) capabilities. STATS ChipPAC will continue to be the FOWLP and SiP center of competency for the JCET Group, and all laminate based flip chip activities are being consolidated into STATS ChipPAC factories.
As a combined Group, the JCET Group is now able to address a much broader total available market (TAM). While each JCET Business Unit has its area of expertise, we are already seeing benefits of cross-selling services to our customers, particularly in China.
SST:. Will the SCP product focus change any in the coming years? Can you share any packaging roadmaps?
DS: No, the merger does not change STATS ChipPAC’s focus or roadmap at all. Our focus for the coming years continues to be on expanding our SiP and FOWLP business, in addition to our core turnkey wirebond, flip chip and PoP packaging business areas. STATS ChipPAC is firmly committed to our industry leading eWLB technology as supported by our eWLB line expansion occurring throughout this year. While we will continue to develop advanced 2.5D and 3D FOWLP package designs, we will be implementing further process optimizations, such as panel manufacturing, which will drive significantly better capital intensity and a lower unit cost for larger body sizes.
SST: Have/will SCP manufacturing facilities in Singapore moved/move to China?
DS: There is currently no plan for any relocation. Our STATS ChipPAC Singapore (SCS) facility remains the hub of the JCET Group’s effort in FOWLP as well as being our largest Test site. SCS is an important location for several Tier 1 customers who prefer having Singapore as part of their supply chain for regional diversity and other commercial reasons.
SST: What is JCET relationship to SMIC? We noticed with interest that SMIC recently increased its ownership position to 14.25% making it the single largest owner of JCET.
DS: JCET has entered into asset purchase transaction whereby it will acquire the remaining shareholding in STATS ChipPAC from the National Integrated Circuit Fund and SMIC. Concurrent to the asset purchase transaction, JCET has entered into a subscription agreement with SMIC whereby SMIC will subscribe for approximately 150 million JCET shares for a consideration of about US$400 million. After the proposed transaction, SMIC will have a 14.25% stake in JCET Group, resulting in JCET owning 100% of STATS ChipPAC. This transaction will strengthen the equity base of JCET with stronger shareholders, and create better operational synergies. These transactions have no significant impact to STATS ChipPAC’s organizational structure or management team, and will not impact our service to our customers.
SST: China’s government policy “National Guidelines for Development and Promotion of the IC Industry,” which was released in June of 2014 calls for expansion and vertical integration of the domestic semiconductor value chain with domestic sales revenue targets of $56B by 2020. How does packaging fit into these overall goals?
DS: The Chinese government correctly identifies packaging and test as critical parts of the overall semiconductor ecosystem and, therefore, packaging is an integral part of these goals. As the largest OSAT in China, the JCET Group is uniquely positioned to participate in and capitalize on the emergence and growth of the Chinese semiconductor ecosystem. With the addition of the advanced packaging technologies from STATS ChipPAC, the JCET Group is well positioned to help enable this growth.
SST: What new products or technologies would you like to share with our readers?
DS: We are very proud to have passed a significant milestone for 1B units shipped for our industry leading eWLB FOWLP product. The eWLB platform has an incredible amount of traction now and the technology roadmap around this platform is resonating with an increasingly diverse range of customers, from its traditional base in mobile communications into areas such as Advanced Driver Assistance Systems (ADAS) in automobiles and bio-processors in the wearables market. Furthermore, as a platform for system integration, enabled by finer L/S and multiple RDL’s, eWLB SiP in various configurations (such as multi-die with passives, PoP, 2.5D, etc) has a tremendous future.
SiP capabilities are incredibly important to those customers driving miniaturization as well as integration and modularization of functionality. This represents a major new source of TAM for the OSAT industry. We feel we are extremely well positioned in this area, as we have developed comprehensive capabilities, including design and simulation, advanced packaging technologies, high density SMT component placement, advanced molding for complex topographies, conformal shielding, and system level test, for a wide variety of SiPs/modules in multiple market segments. Depending on the application requirements and product complexity, we have developed various SiP configurations ranging from conventional 2D modules with multiple active and passive components, interconnected through flip chip, wire bonding, and SMT, to more complex modules such as Package-in-Package (PiP), eWLB Package-on-Package (eWLB PoP), 2.5D and 3D solutions.
We anticipate that our strength in these areas coupled with our unique position in the highest growth region, China, will propel our growth well beyond the industry average going forward.