Category Archives: Materials and Equipment

July 20, 2012 — IPC — Association Connecting Electronics Industries and JPCA (Japan Electronics Packaging and Circuits Association) released their first operational-level standard for the printed electronics industry, IPC/JPCA-4921, Requirements for Printed Electronics Base Materials (Substrates). The standard defines terms and establishes basic requirements for substrate materials used in printed electronics: ceramic, organic, metal, glass and other.

Printed electronics is still in its infancy, with commercialization spurts and lacking standard manufacturing practices. Printed electronics are generally made with long-established technologies combined with recent innovations, IPC and JPCA point out. Electronics can be printed on diverse materials, which both opens new opportunities and limits growth/targeted development programs. “It’s difficult to grasp the breadth of opportunities when a range of materials can be printed onto various substrates to produce from very simple electronic circuits to the highly complex,” said IPC Director of Technology Transfer Marc Carter.

For this technology to become a stand-alone industry, it must have some commonalities that help build a structure, said Carter. The standard aims to provide a common language for designers, equipment makers and manufacturers.

Individuals who have worked with flexible circuits are most likely to feel the most familiar with details in IPC/JPCA-4921, but they will also find a number of significant differences. “Some of the materials are similar or the same, but people are leveraging different intrinsic materials attributes to enable novel applications,” adds Carter.

Printed electronics are being developed for different tasks: the inner layers of a circuit board, printed electronic active components, advanced automotive applications, and low-cost displays for portable computing and mobile applications, among other applications.

IPC/JPCA-4921 provides a starting point for IPC’s Printed Electronics Initiative to establish a critical segment of the infrastructure that will help the industry expand more quickly. This initiative includes a dedicated management council for companies to discuss issues and to help develop tools and studies; a printed electronics conference track and exhibition area at IPC APEX EXPO 2013; and more industry standards, in continued partnership with JPCA.

Because the printed electronics industry is growing and evolving rapidly, IPC/JPCA-4921 may have to be updated at a more frequent pace than other industry standards.

IPC members may request a single-user download of IPC/JPCA-4921 by sending an e-mail to [email protected], free when requested within 90 days of the document’s publication. For more information, visit www.ipc.org/4921.

IPC is a global industry association dedicated to the competitive excellence and financial success of member companies which represent all facets of the electronics industry, including design, printed board manufacturing, electronics assembly and test. Learn more at www.IPC.org.

JPCA is a Tokyo-based trade association serving about 400 member companies in the electronic circuits industries. JPCA supports the industries through global trade shows, including JPCA Show, Large Electronics Show, Microelectronics Show and JISSO PROTEC; industry standards; management programs; market/statistics/technology research; and environment/ foreign trade/government relations programs. JPCA works cooperatively with other organizations of the World Electronic Circuits Council (WECC), including more than 40 years of friendship with IPC; Japan-China Relationship Council under JPCA/CPCA; MOU of JPCA/KPCA and JPCA/TPCA. Internet: www.jpca.org.

Visit our new Displays Manufacturing Channel on Solid State Technology and subscribe to our Displays Digest e-newsletter!

July 20, 2012 — North America-based manufacturers of semiconductor equipment posted $1.46 billion in orders, $1.55 billion in bookings, and a book-to-bill ratio of 0.94 worldwide in June 2012 (three-month average basis), reported SEMI. This is the first time the book-to-bill has dropped below parity (1.00) since January 2012.

The three-month average of worldwide bookings in June 2012 was $1.46 billion. The bookings figure is 9.8 percent lower than the final May 2012 level of $1.61 billion, and is 5.5 percent lower than the June 2011 order level of $1.54 billion.

The three-month average of worldwide billings in June 2012 was $1.55 billion. The billings figure is 1.0 percent more than the final May 2012 level of $1.54 billion, and is 5.2 percent less than the June 2011 billings level of $1.64 billion.

"Following seven months of increases, the three-month average bookings declined in June and likely reflects some slowing in investment plans attributed to weaknesses in the broader economy," said Denny McGuirk, president and CEO of SEMI.  "While order activity may slow, equipment spending this year will continue to be directed towards advanced technologies in wafer processing and packaging assembly."

The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars. A book-to-bill of 0.94 means that $94 worth of orders were received for every $100 of product billed for the month.

 

Billings
(3-mo. 

avg)

Bookings
(3-mo.

avg)

Book-to-

Bill

 

 

 

 

Jan 2012

1,239.9

1,187.5

0.96

Feb 2012

1,322.8

1,336.9

1.01

March 2012

1,287.6

1,445.7

1.12

April 2012

1,458.7

1,602.8

1.10

May 2012 (final)

1,539.3

1,613.7

1.05

June 2012 (prelim)

1,554.9

1,455.6

0.94

Source: SEMI July 2012

The data contained in this release were compiled by David Powell, Inc., an independent financial services firm, without audit, from data submitted directly by the participants. SEMI and David Powell, Inc. assume no responsibility for the accuracy of the underlying data.

The data are contained in a monthly Book-to-Bill Report published by SEMI. The report tracks billings and bookings worldwide of North American-headquartered manufacturers of equipment used to manufacture semiconductor devices, not billings and bookings of the chips themselves. The Book-to-Bill report is one of three reports included with the Equipment Market Data Subscription (EMDS). SEMI is a global industry association serving the nano- and micro-electronic manufacturing supply chains. For more information, visit www.semi.org.

Visit the Semiconductors Channel of Solid State Technology!

July 18, 2012 – BUSINESS WIRE — Kyocera Industrial Ceramics Corporation, Chemical Sales Division introduced the environmentally friendly XKE-G5633 Epoxy Molding Compound (EMC).

The room-temperature product encapsulates ball-grid array (BGA) and land-grid array (LGA) semiconductor packages, with encapsulation quality and connectivity to match compounds that must be stored in a frozen state.

The room-temperature state of Kyocera

July 18, 2012 — Semiconductor packaging company STATS ChipPAC Ltd. (SGX-ST:STATSChP) presented its annual Supplier Awards to its top supplier partners for their excellent performance and outstanding support in 2011. Supplier partners are scored on technology, quality, delivery, responsiveness, service, and cost competiveness criteria.

More supplier awards from 2011:

Texas Instruments (TI, TXN) names top suppliers

Intel awards 9 elite suppliers in 2011

Intel

July 18, 2012 — IC Insights’ latest survey and ranking of the major semiconductor capital spenders shows that only 6 of the 35 major semiconductor suppliers — Intel, Samsung, Hynix, TSMC, UMC, and Rohm — with significant capital expenditure budgets are expected to spend more in 2012 than they did in 2011. 

Though only six companies are expected to increase their capital spending this year, the total semiconductor capital spending forecast figure for 2012 was raised to $63.3 billion from an earlier estimate of $60.7 billion; total 2012 semiconductor industry capital expenditures are now forecast to decline only 3% this year as compared to the previous expectations of an 8% decline.

Table 1. Major capital spenders planning 2012 increases in capex. SOURCE: IC Insights, company reports.

2012F

Company

2011 ($M)

2012F ($M)

12/11 change (%)

1

Intel

10,764

12,500

16

2

Samsung

11,755

13,100

11

3

TSMC

7,333

8,250

13

4

Hynix

3,165

3,680

16

5

UMC

1,585

2,000

26

6

Rohm

385

685

78

—

Total

34,987

40,215

15

—

Others

30,568

23,055

-25

—

WW Total

65,555

63,270

-3

The six major companies that plan to increase semiconductor capital spending this year are expected to collectively spend about $5.2 billion more in 2012 than in 2011.  In contrast, the total of the remaining capital spending outlays are forecast to decline by about $7.5 billion this year.

With an increase of $1.7 billion, Intel is expected to post the biggest dollar increase in capex spending for 2012, though it is likely to trail Samsung in overall capex spending for the year.

A few of the major outsourced semiconductor assembly and test (OSAT) companies also plan to significantly increase capital spending this year. IC Insights believes that these increased spending budgets by some of the major OSAT companies indicates their belief that semiconductor unit volume shipments will be on the rebound this year.

Table 2. Major capital spenders in the OSAT sector planning 2012 capex increases. SOURCE: IC Insights, company reports.

Company

2011 ($M)

2012F ($M)

12/11 change (%)

Amkor

493

550

12

SPIL

376

585

56

STATS ChipPAC

304

400

32

Total

1,173

1,535

31

IC Insights will examine and provide further details on semiconductor capital spending in its 250+ page Mid-Year Update to The McClean Report, scheduled for release at the end of July. To review additional information about IC Insights’ new and existing market research products and services, visit: www.icinsights.com.

Visit the Semiconductors Channel of Solid State Technology!

July 17, 2012 — Ziptronix Inc., which develops direct bonding technology for advanced semiconductor applications, has licensed its technology for a high-volume cellular handset application.

The high-volume consumer application will benefit from cost savings and efficiency of Ziptronix DBI wafer stacking, the company says. The wafer bonding technology can offer smaller pitch, increased functionality, increased density and scalability, along with lower-cost manufacturing, for future generations of 3D integrated devices.

The technology saw its initial adoption in image sensor manufacturing, and is now being applied in 3D memory stacking and other applications, said Daniel Donabedian, CEO of Ziptronix. Additional licensing discussions are underway with companies targeting 3D integration, he added. Ziptronix licenses its technology throughout the semiconductor supply chain, including OEMs, IDMs and some fabrication and assembly facilities

Ziptronix develops low-temperature direct bond technology for various semiconductor applications, including backside-illuminated (BSI) sensors, RF front-ends, pico projectors, memories and 3D ICs. Ziptronix

July 16, 2012 — 3D IC and stacked die semiconductor packaging configurations are often difficult to image with an acoustic microscope because the multiple internal surfaces send back abundant echoes and re-echoes from the ultrasound pulsed into the stack.

Now, Sonoscan introduced a simulator software, SonoSimulator, that enables stacked die makers to check nondestructively for delaminations between layers. SonoSimulator software is now a standard feature on the Gen6 C-SAM acoustic microscope.

Also read: Multi depth imaging system shows defect progress

The SonoSimulator determines optimal gate positions and other parameters with far less effort than is possible with the physical stacked parts alone. It also results in higher quality acoustic images.

Operators create a virtual die stack that matches the characteristics of the physical 3D IC or die stack to be inspected, including defects at specified layers. The virtual defects help determine the optimum placement of gates to image specific levels in the stack.

Imaging parameters are easily transferred to the Gen6 Sonolytics software for imaging the physical 3D IC or die stack.

Sonoscan reports that the simulation software reduces the imaging time for 3D ICs and stacked die packages, and allows less-experienced operators to do the inspection effectively.

Sonoscan is the leading developer and manufacturer of acoustic microscopes and sophisticated acoustic micro imaging systems, widely used for nondestructive analysis of defects in industrial products and semiconductor devices. Internet: www.sonoscan.com.

Visit the Advanced Packaging Channel of Solid State Technology, and sign up for our Advanced Packaging News e-newsletter!