Category Archives: Materials and Equipment

August 26, 2011 — Attend the Nanomanufacturing Summit 2011 keynote address, Tuesday, September 27, 10:00-10:30AM, to hear Dave Arthur, CEO of SouthWest NanoTechnologies Inc. (SWeNT), discuss carbon nanotube (CNT) commercialization, as well as the roles of nano inks and coatings in broad applications.

The Nanomanufacturing Summit 2011 & 10th Annual NanoBusiness Conference are held September 25-27 in Boston at the Seaport Convention Center. To attend, visit http://www.internano.org/nms2011/

SWeNT produces conductive and semiconducting CNT inks based on V2V technology. They can be deposited using commercial, high-volume printing methods and equipment. Additive printing eliminates the waste and additional process steps of subtractive patterning, Arthur explains. He adds that the printed nano coatings no dispersants or viscosity modifiers that could degrade performance.

SWeNT also tailors CNT materials for different applications via its CoMoCAT process. Applications include energy-efficient lighting, affordable photovoltaics, improved energy storage, and printed electronics. The Summit and co-located conference highlight nanotechnology and nanoscience applications that are commercially viable in the near term.

SouthWest NanoTechnologies Inc. (SWeNT) is a specialty chemical company that manufactures high quality single-wall and Specialty Multi-Wall (SMW) carbon nanotubes, printable inks and CNT-coated fabrics. SWeNT was created in 2001 to spin off nanotube research developed at the University of Oklahoma. For more information, visit www.swentnano.com

August 24, 2011 — The SMTA will host sessions and courses with Amkor, Research in Motion, and TechLead Corporation on package-on-package (PoP) 3D stacking at SMTA International (SMTAI), October 16-20 in Fort Worth, TX.

Lee Smith, Amkor Technology, will present "Package on Package (PoP): Past, Present and Future" during the opening session on October 18. Assemblers have integrated PoP surface mount stacking increasingly over the last 5 years, notes Smith. Smartphones and tablet computers rely on PoP for signal processing and memory architectures. Over 11 million packages are surface-mount-stacked each week, he adds. The session is open to all attendees.

Also plan to attend "Assembly Solutions for Next-generation Package on Package (PoP) Requirements and Process" and "Reliability Characterization of PoP Materials and SMT Processes," chaired by Lee Smith of Amkor Technology and "Process and Reliability Characterization of PoP Materials and SMT Processes," chaired by Sheldon Schwandt of Research In Motion.

"Assembly Solutions for Next Generation Package on Package (PoP) Requirements and Process" and "Reliability Characterization of PoP Materials and SMT Processes" will feature Intel Corporation, Qualcomm, and Rambus Inc. speakers.

"Process and Reliability Characterization of PoP Materials and SMT Processes" speakeres include Amkor Technology, Flextronics, and Universal Instruments Corporation.

Charles Bauer, Ph.D., TechLead Corporation, will instruct a half-day tutorial, "3D Assembly…CSP to PoP to Board," covering fundamental to advanced technologies for stacked chip packaging and assembly, as well as stackable packages. Topics include the challenges of die thinning and thin die attach, mixed technology die attachment and bonding, flip chip, multi-level wire bonding, TAB and TSV technologies.  

Details about SMTA International can be found online at http://smta.org/smtai.

The SMTA membership is an international network of professionals in microsystems, emerging technologies, and related electronic assembly business operations.

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August 23, 2011 — The U.S. Court of Appeals for the Federal Circuit, which hears all patent appeals from U.S. federal courts nationwide, issued an opinion yesterday vacating the adverse judgment against Camtek in a patent infringement case brought against it by August Technology Corp. (now Rudolph Technologies, Inc.) in the Federal District Court for the District of Minnesota, reports Camtek Ltd. (Nasdaq, TASE: CAMT).

Six years ago, August sued Camtek for infringement of its patent no. 6,826,298 on high-speed semiconductor wafer inspection technology, originally filed in April 2000. August claimed the Camtek Falcon wafer inspection systems used its technology. The District Court, following a jury decision, had entered a judgment of infringement, a permanent injunction against Camtek and an award of $8.7 million in damages plus interest. The Federal Circuit found that the District Court erred in the construction of a key claim term and vacated the finding of infringement, the damages award and the permanent injunction. The Court of Appeals remanded the case to the District Court for a limited trial based on the corrected claim construction, which significantly narrows the scope of August’s patent.

Kramer Levin Naftalis & Frankel LLP argued the successful appeal on behalf of Camtek.

Camtek Ltd provides automated test tools for semiconductor, printed circuit board (PCB) and IC substrate manufacturing. Learn more at www.camtek.co.il.

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August 18, 2011 — The US Department of Energy’s (DOE) Argonne National Laboratory Center for Nanoscale Materials and Energy Systems Division, led by Seth Darling, is using sequential infiltration synthesis (SIS) to transfer patterns more deeply into materials via e-beam lithography. With SIS, scientists grow inorganic materials within polymer films, contructing materials with unique properties or complex 3D geometries.

The method avoids e-beam lithography’s hard mask application, which can blur patterns, create rough edges, and add costs. SIS makes the traditionally thin, delicate resist film robust by infiltrating it with inorganic material, Darling said. SIS-assisted lithography can pattern narrow features >1

August 19, 2011 — North America-based manufacturers of semiconductor equipment posted $1.30 billion in orders in July 2011 (three-month avg) and a book-to-bill ratio of 0.86, according to the July Book-to-Bill Report published by SEMI. The book-to-bill ratio for the Japanese chipmaking equipment sector dropped 0.12 points from June to 0.84 in July, the Semiconductor Equipment Association of Japan reported to Nikkei.

The three-month average of worldwide bookings for North American semiconductor tool makers in July 2011 was $1.30 billion. Bookings were 15.7% less than the final June 2011 level of $1.54 billion, and 29.3% below the $1.84 billion in orders posted in July 2010. Japan’s July orders for chipmaking equipment were down 8.1% from June at 91.7 billion yen (US$1.19 billion), posting a sharp decline for the second month in a row.

The three-month average of worldwide billings in July 2011 was $1.52 billion for North American companies, 7.6% below the previous month and 1.4% above July 2010. Shipments were up 5.3% at 109.8 billion yen for Japan’s chip tool makers.

"Temporary softening" in end-market demand is to blame for the sudden orders drop-off, says Stanley T. Myers, president and CEO of SEMI. Myers and his Japan-based counterparts noted capex hesitation from memory makers in particular. Foundry utilization is also lower, show both groups.

North America data only Billings
(3-mo.   
avg)
Bookings
(3-mo.
avg)
Book-to-
Bill
February 2011   1,839.3 1,595.5 0.87
March 2011 1,657.5 1,580.8 0.95
April 2011 1,635.4 1,602.4 0.98
May 2011 1,669.2 1,623.0 0.97
June 2011 (final) 1,640.2 1,540.4 0.94
July 2011 (prelim) 1,516.2 1,298.1 0.86
Source: SEMI August 2011

A book-to-bill of 0.86 means that $86 worth of orders were received for every $100 of product billed for the month. The SEMI book-to-bill is a ratio of three-month moving averages of worldwide bookings and billings for North American-based semiconductor equipment manufacturers. Billings and bookings figures are in millions of U.S. dollars.  

The North American semiconductor tool data were compiled by David Powell, Inc., an independent financial services firm, without audit, from data submitted directly by the participants. SEMI and David Powell, Inc. assume no responsibility for the accuracy of the underlying data. The data are contained in a monthly Book-to-Bill Report published by SEMI. SEMI is a global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. For more information, visit www.semi.org.

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August 19, 2011 – Heavy demand for tablets and smartphones will require more chipmaking capacity over the next three years, roughly the equivalent of two new fabs a year and $10B in annual capex, says a Wall Street analyst.

Citi’s Tim Arcuri bases his conclusion on a number of calculations:

Smartphone units will double by 2013 to ~1B annual shipments; tablets will triple to 100M. Assuming a 25% CAGR in handset unit growth from 2011-2013, and smartphone shipments doubling during the same period, that means a lot more chips to support mobile information consumption: mobile CPUs, memory (NAND and DRAM), and wireless chips. For tablets, even if Apple’s complete domination weakens a bit, Citi sees it still accounting for more than half the market in 2013; if Apple doubles its iPad shipments, then that’s a safe number to assign for the entire sector.

Bigger demand means more advanced technology. Ever-improving performance (graphics, speed, more memory) while being mindful of power/heat constraints, means "aggressively adopting leading-edge nodes" even while pushing die sizes, Arcuri points out. Apple’s A5, used in the iPad 2 and iPhone 5, is double the die size of the A3 in the iPhone 3GS, even though it’s made with 45nm process technologies vs. 65nm, he noted. Look for ARM-based graphic CPUs (e.g. Nvidia’s Tegra) to follow a similar path. For memory, NAND will continue to make big gains, not just from smartphones/tablets but also solid-state drives; mobile DRAM bit growth will be ~50%, offset by PC cannibalization, with needs largely met simply by node-shrinks and not new capacity.

Lots of chipmakers are jockeying for the business. With Apple reportedly sniffing around new manufacturing partners, the big players (e.g. Intel, TSMC, Samsung, and Globalfoundries) especially want to get into the game, and will keep racing ahead "for at least 1-2 years until clear winners/losers are defined," Arcuri writes. With everyone pushing to add capacity to get a piece of this market, they’ll mostly likely blow past actual demand (~60k WSPM, roughly an extra fab or two per firm), "which will lead to eventual over-capacity in the space," he warns.

Capacity expansions mean investments. Driven largely by tablet/smartphone demand, Arcuri sees "healthy capex spending" for the next several years (minus macroeconomic drags), at "$30B-plus" wafer-fab equipment runrate "in 2012 and beyond." ($14B of annual capex alone will support NAND needs, vs. $11B in 2011). For the near-term, though, he’s sticking with the popular opinion of a brief trough, as the current (3Q11) WFE runrate of $21B (orders) and $26B (shipments) "clearly looks unsustainable."

Projections for NAND capacity (in K WSPM) and capex (in US $M). Assumes $35M capex per 1K WSPM added, 20% of new capex is for shrink/maintenance, and $7M in NAND maintenance per technology capex. (Source: Gartner, Citi Investment Research and Analysis)

August 18, 2011 — An IDM recently performed side-by-side comparisons of a Multitest Mercury test contactor and an "established contactor of an incumbent Asian competitor" during high-volume production package testing.

The Multitest Mercury contactor improved the IDM’s first pass yield (FPY) in semiconductor test on average by two to six percentage points. The IDM will deploy the Mercury for this testing application on multiple set ups.

Mercury uses flat probe technology for cost-effective test, a barrel-less probe design with dual fork redundant bias, and is qualified at several top 20 IDMs and fabless semiconductor companies. It offers typical test contactor probe life of 500k to 700k insertions (More than 1.5m insertions in wafer-level applications).

Multitest manufactures test equipment for semiconductors, including test handlers, contactors, and ATE printed circuit boards. The Mercury  is a product of Multitest’s Contactors Division. For more information, visit www.multitest.com/Mercury

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August 17, 2011 — The annual Known Good Die (KGD) conference will address semiconductor die testing, assembly, manufacturing, and business challenges, with the tagline "KGD in an Era of Multi-Die Packaging and 3D Integration." The KGD Conference takes place November 10 in Santa Clara, CA.

The event is co-located with another MEPTEC event, "2.5D, 3D and Beyond: Bringing 3D Integration to the Packaging Mainstream," set for November 9.

"Multi-function 3D, vertically stacked or multichip packages" are increasingly incorporated into mobile consumer products, such as tablets and smartphones, notes Jonathan Davis, president of the Semiconductor Business Unit at SEMI, which co-presents KGD with MEPTEC. Complex package configurations rely heavily on KGD to meet functionality, time-to-market, and cost goals.

For 18 years, the KGD conference has marshaled technical experts, managers and business development professionals from around the world for an interactive exchange on the latest developments in the die product industry.

The KGD conference sessions will cover such topics as KGD test, handling, delivery, standards, current methods, options and infrastructure.

For more information on the Known Good Die conference, visit: http://meptec.org/meptecknowngoodd.html.

SEMI is a global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. For more information, visit http://www.semi.org.

MEPTEC provides a forum for semiconductor packaging and test professionals to learn and exchange ideas that relate to assembly, test and handling. For more information, visit http://meptec.org/.

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August 16, 2011 — The 2011 iNEMI Roadmap, published by the International Electronics Manufacturing Initiative (iNEMI), includes a new chapter on micro electro mechanical systems (MEMS) and sensors, and an expanded chapter on packaging to include substrates discussions.

This issue also includes more input from international (outside of North America) participants than in prior years.

MEMS devices are expected to see exponential growth, expanding into sensors, fluidics, RF components, expanded gyroscope capabilities for motion-gesture sensors, and more applications. This variety is impeding standardization in the MEMS sector. Different functionality needs push MEMS devices into customization more than standardization. Scalable manufacturing processes, packaging technologies, cost-effective and non-destructive test technologies are needed, as well as a better basic understanding of MEMS failure mechanisms. Resonator performance must also be improved.

3D packaging affects a broad range of electronics manufacturing operations, and is discussed in many areas of the Roadmap. Increased momentum in the move toward 3D packaging — through-silicon vias (TSV), thinner die, high-density interconnect (HDI), die shrinkage, embedded actives and passives — creates issues up and down the supply chain, affecting assembly processes and equipment, design and simulation tools, reliability methodologies, thermal management strategies and cooling technologies, and test and inspection strategies.

The Roadmap also acknowledges ongoing challenges for R&D funding, resulting partially from an electronics industry move from vertically integrated OEMs to a multi-firm, globally distributed supply chain. IC assembly, passive components, and electronics manufacturing services have "critical need" for research and development. Industry collaboration is gaining traction in university R&D centers, industry consortia, ad-hoc cross-company development teams, and other areas. Government, academia and industry consortia will need to formulate ways to adopt and develop emerging technologies within the global outsourcing environment.

The more than 575 individuals who contributed to the 2011 Roadmap represent over 310 corporations, consortia/associations, government agencies and universities, located in 18 countries.  The 2011 Roadmap is free for iNEMI members and is for sale to non-members, with special discounted pricing available for universities, research institutions, government agencies and non-profit organizations. For the first time, individual chapters are available for sale and can be purchased on, and downloaded from, the iNEMI website. The 1800-page document features 27 chapters that provide in-depth discussion of six product sectors and 21 different manufacturing, component/subsystem, business process and design technologies. For information about purchasing options and pricing, go to http://www.inemi.org/node/1863/buy  

The International Electronics Manufacturing Initiative