Category Archives: Materials and Equipment

Leti today announced that the European FP7 project PLAT4M has now been completed with results that exceeded expectations.

Si photonics has long been expected to bring substantial breakthroughs in very high speed data communications, telecommunications and supercomputing. In addition, it is one of the most promising industrial-production candidates because of its potential for large-scale and low-cost production capability in existing CMOS foundries.

The European Commission launched the 15-member PLAT4M project in 2012 to build a Si photonics supply chain in Europe that would speed industrialization of the technology by enabling its seamless transition to commercial production.

The main objective of PLAT4M was to advance existing silicon photonics research foundries and seamlessly transition to pilot line operation and industrial manufacturing of products based on silicon photonics. The supply chain is based on three different but complementary technology platforms of Leti, STMicroelectronics and imec.

Leti Platform

Leti’s 8,500m2 cleanroom facility includes a 200mm pilot line that enables fabrication of passives, detectors, modulators and integrated lasers with a focus on high-bandwidth devices. The project team developed a new Si-photonic platform based on a 310nm silicon film on top of an 800nm buried oxide (BOX) on a high-resistivity silicon substrate. Since the targeted applications for the project were O-band transceivers and receivers, most of the developed devices are suitable for 1310nm operations.

CEA-LETI has developed 3 PDKs which are dedicated to Multi Project Wafers (MPW) runs on this silicon photonics technology which is now offered via the brokers CMP and Europractice. Moreover, III-V Lab has designed and co-fabricated a state-of-the-art integrated hybrid III-V/Si transmitter using a wafer bonding technique on this platform.

STMicroelectronics Platform 

STMicroelectronics, the first 300mm wafer silicon photonics device manufacturer, is a key solution provider for 100 Gbps transceiver products since 2016. In parallel to its industrial activity, during the PLAT4M project ST developed another silicon photonics technology aimed at generating and nurturing further application specific industrial nodes. This technology platform creates an advanced photonic nanoscale environment, and combines state-of-the-art CMOS foundry tools with the flexibility necessary to support R&D efforts. Strong collaboration with research partners such as CEA LETI and University Paris Sud have been devoted to advanced studies in power consumption management, optical excess loss reduction and higher data-rate transmissions using complex modulation formats, signal multiplexing and higher Baud-rate devices. With R&D exploration that goes as far as core-to-core optical interposers, ST has also evaluated notions of device and circuit footprints toward Large System Integration (LSI).

In the context of PLAT4M, the participants chose a 4×25G transceiver as a Wavelength Division Multiplexing (WDM) data-communication demonstrator to validate both LETI and ST R&D platforms. The device functionalities were evaluated for compatibility with the 100GBase-LR4 standard, implying a signal transmission over 4 channels, spaced by 800 GHz around 1310 nm window, one fiber out and one fiber in.

imec Platform

In the course of the PLAT4M project imec has consolidated and further developed its silicon photonics technology platform ISIPP25G using its 200mm pilot line facilities located in Leuven to support industrial prototyping for various applications and markets. The imec platform component portfolio has been expanded to specific devices for sensing and high power free space applications. Furthermore, imec’s technology is supporting state-of-the-art modulation and detection at 50Gb/s and beyond with a variety of modulator options (GeSi EAM, Si MZM, Si MRM) now offered under its ISIPP50G technology along with both edge and surface fiber coupling technology and a library of O-Band and C-Band high quality passive components.

The technology is accessible through imec’s PDK, which is supported by software tools from several vendors including project partner PhoeniX Software. In collaboration with Mentor, a Siemens business, imec has also explored LVS verifications to reduce design errors and performed litho-friendly design analysis to improve the patterning predictability. Using the imec technology with new processing steps, TNO has demonstrated a multi-channel ring resonator based sensor system. Polytec demonstrated the operation of Multichannel Laser Doppler Vibrometer. THALES has demonstrated an integrated FMCW LiDAR system with 8 switchable output channels, enabling to scanning directions as well as a coherent beam combiner with 16 beams with linear operation up to a maximum input power of 26dBm. The thermal phase-shifter elements achieved a power efficiency of 10mW for a p-phase shift.

Finally, imec has demonstrated new advances in its technology such as a very low loss silicon waveguide technology (~0.6dB/cm for a 220nmx450nm waveguide) applying leading edge CMOS patterning technology developed in its 300mm pilot line with immersion lithography. It has also demonstrated a further reduction of thermal phase-shifter elements down to 4mW for a p-phase shift.

In an Unified Design Environment

The PLAT4M project has led to a qualitative leap of the design flow for silicon photonics, allowing the photonics community to design more complex and more robust circuits. Mentor and PhoeniX Software have worked closely together on an integrated electronics/photonics co-design workflow. This has been accomplished by building on existing tool-sets wherever possible and developing new technologies when required.

The supply chain includes EDA solutions such as Mentor’s Pyxis™ and Calibre®, which were extended to “understand” photonics. Interfaces were developed between these tools and Photonic IC design solution OptoDesigner from PhoeniX Software to create integrated design flows using the best practices from both photonics and electronics design. In addition, process design kit elements were developed for Mentor’s Calibre DRC, Calibre LVS, and Pyxis tools, incorporating new components, added models and fabrication information.

Producing a Packaging toolkit 

Packaging played a key role in the development of the project demonstrators. The skills and processes developed by Aifotec and Tyndall, advanced the development of the Silicon Photonic packaging toolkit. This toolkit establishes standardised packaging processes for optical fibres, active devices, electronic components and thermo-mechanical systems to ensure that PICs can be more easily packaged in a timely and cost-effective way. A design rule document was made available through EuroPractice by Tyndall and also implemented into PDKs for OptoDesigner.

Perspectives 

“The consortium developed advanced technologies and tools by building a coherent design flow, demonstrating manufacturability of elementary devices and process integration, and developing a packaging toolkit,” said Jean-Marc Fedeli, coordinator of the PLAT4M project. “The high level of maturity of the technology offered by these platforms makes them readily accessible to a broad circle of users in a fabless model.”

By Michaël Tchagaspanian, Vice President of Sales and Marketing, Leti

Digital disruption begets innovation. Challenges equal opportunities. Those were clear messages during Leti Innovation Days recently in Grenoble, France. Over two days at the annual event, which this year coincided with Leti’s 50th anniversary, speakers and exhibitions highlighted challenges of the digital revolution and presented specific current-and-anticipated solutions for industry, healthcare and energy and the environment.

Coinciding with the launch of the administration of French President Emmanuel Macron, who has already talked of France becoming “a start-up nation”, Leti also noted the importance of creating and supporting startups that will help consumers, companies and countries address the challenges and opportunities of the digital revolution.

Citing challenges in the energy sector, Thierry Lepercq, executive vice president of research, technology and innovation at the international French energy company ENGIE, warned of potential energy blackouts and financial problems for traditional energy providers due to the growing penetration of alternative energy sources, the switch from fossil fuels – and energy sharing by households.

These developments, which ENGIE calls “Full 3D” – decarbonization, decentralization and digitalization – have destabilized traditional power systems and providers.

For example, a German residential battery-storage supplier allows residents to store energy at home and swap it on the grid, cutting out traditional electricity providers. Lepercq also noted that the rapid growth in the use of electric vehicles can load the grid with demand that was not anticipated even a few years ago. But the digital revolution also has prompted entrepreneurial responses. EV-Box, the Dutch company that has deployed more than 40,000 vehicle-charging stations in 20 countries, is gathering usage data, which will help officials understand the vehicles’ demands on the grid.

ENGIE acquired EV-Box this year as a strategic step towards operating in a completely new global energy paradigm.

Driving toward a new economy

Last month, Intel released a study that predicted autonomous vehicles will create a “Passenger Economy” – with mobility-as-a-service – that could grow to $800 billion in 2035 and to $7 trillion by 2050.

With autonomous vehicles, the car will no longer be a “stand-alone vehicle”, but “something that reacts with the environment”, said Mike Mayberry, corporate vice president and managing director of Intel Labs. Intel has opened advanced vehicle labs in the U.S. and Germany to explore the various requirements related to self-driving vehicles and the future of transportation. That includes sensing, in-vehicle computing, artificial intelligence, connectivity, and supporting cloud technologies and services.

When a panel discussion on driverless cars was asked when these vehicles will be in general use, Jean-François Tarabbia, CTO of Valeo, the automotive supplier to automakers worldwide, said “the better question is ‘why’”. And that depends in part on the industry’s ability to demonstrate vehicle safety. He said that traffic jams could be reduced by 30 percent with autonomous cars. Still, the cars will require a driver inside who will do something other than driving until he or she is needed to operate the vehicle.

Pierrick Cornet, brand incubator at Renault Nissan, said autonomous cars also will have to accommodate owners who occasionally want to drive their vehicles. For carmakers like Renault Nissan, the challenges are managing the cost and weight of the vehicles, which are loaded with batteries, as well as computing and sensing gear – and making them able to charge quickly.

Fabio Marchiò, automotive digital general manager at STMicroelectronics, noted that cars are the least-used appliance/machine in the household. He agreed with Tarabbia that safety and consumer resistance are primary roadblocks for the vehicles, but added that government regulations could slow down their widespread use.

Moore’s Law obtains

Outlining some of Intel’s R&D programs, Mayberry brushed aside frequent predictions that Moore’s Law has run its course. He said Intel expects Moore’s Law to be in effect at least through the next decade, because of the industry’s continued evolution to smaller technology nodes with new IC technologies.

In addition to focusing on enabling Moore’s Law going forward, Intel’s research on components and hardware includes developing novel integration techniques. But Intel Labs also is focused on enabling future product capabilities and “imagining what’s next”.

As part of that effort, Intel Labs has partnered with Princeton University to decode digital brain data, which is scanned using functional magnetic resonance imaging (fMRI). The goal is to reveal how neural activity gives rise to learning, memory and other cognitive functions such as human attention, control and decision-making.

Leti and Intel agreed last year to collaborate on strategic research programs, including the Internet of Things, high-speed wireless communication, security technologies and 3D displays.

Quantum computing

Also peering into the more-distant future, Leti CEO Marie Semeria noted development of Leti’s Si-CMOS quantum-technology platform.

“The quantum topic has recently become central, thanks to the huge advances made in solid-state implementation, both in superconducting systems and in silicon technologies,” she said. “Interest in silicon-based technologies is huge because of their reliability and their capability to reproduce industrial standards along with the low-noise characteristics and low variability of CMOS devices.”

Noting that the University of New South Wales recently demonstrated a promising two-qubit logic gate based on the silicon-28 isotope, Semeria said Leti had demonstrated the compatibility of such circuits with state-of-the-art CMOS processes.

“From an architectural point of view, it is clear that the future quantum computer will be hybrid. It will combine a quantum engine with a classical digital computer,” she explained. “The program that will run on such a machine will need to combine at least two computing models: a classical part, to prepare data and process results, and a quantum one. A tight connection between the two programming models will be necessary.”

With its history of pioneering in technology and its culture of spinning out new companies to further develop and commercialize innovative technologies, Leti is poised to help France achieve Macron’s goal: “I want France to be a ‘start-up nation’, meaning both a nation that works with and for the start-ups, but also a nation that thinks and moves like a start-up.”

Leti has launched 64 startups, including 13 in the past four years.

Digital innovations in healthcare

Jai Hakhu, president & CEO of HORIBA International Corporation (U.S.), explained how the digital revolution is creating in vitro diagnostics business potential by enabling delivery of preventive healthcare services in even remote regions of the world. In one of HORIBA and Leti’s joint projects, they are developing a hematology, microfluidics-based, lensfree, point-of-care and home-testing system that can be used in underdeveloped countries.

The collaboration is helping realize HORIBA’s vision of providing preventive self-testing anywhere in the world.

Leti’s start-up Avalun has developed a portable medical device for multiple-measurement capabilities using point-of-care testing. Other recent healthcare-related startups include Diabeloop, which is in the final stages of testing an artificial pancreas, and Aryballe Technologies, which is developing olfactory and gustatory sensors.

Routes to innovation

Those new companies were among the presenters at Leti’s immersive exhibition, “Routes to Innovation”, which was the focus of day two of the event. Entrepreneurs and Leti scientists offered more than 60 demonstrations of patented technologies, to show with concrete examples how Leti’s technological know-how and industrial transfer expertise can help French and international companies innovate and become more competitive.

The three “Digital Revolution” topics included “Micro-Nano Pathfinding”, showing how the diversity of Leti’s digital technologies are available to all economic sectors; “Cyber Physical Systems”, and “Business-Model Disruption”.

The “Environmental Transition” demos covered “Sustainable Activities”, “Monitoring Our World’ and “More with Less”. The “New Frontiers for Healthcare” demos covered “Prevention, Independence, Well Being”, “New Therapies” and “Analysis & Diagnosis”. 

Collaborating for technological sovereignty

During the event, Semeria and Fraunhofer Group for Microelectronics Chairman Hubert Lakner announced a wide-ranging collaboration to develop innovative, next-generation microelectronics technologies to spur innovation in their countries and strengthen European strategic and economic sovereignty.

The two institutes will initially focus on extending CMOS and More-than-Moore technologies to enable next-generation components for applications in the Internet of Things, augmented reality, automotive, health, aeronautics and other sectors, as well as systems to support French and German industries.

‘Smart everything everywhere’

Over the two days, a record number of guests, including CEOs, CTOs, journalists and special guests and speakers heard and saw examples of Leti’s advanced technology platforms, its commitment to research excellence and its vision for applying innovative technologies to challenges of the digital era.

Max Lemke, head of the Components and Systems Unit at the European Commission, noted that Leti’s contributions extend beyond microelectronics to cyber-physical systems, 5G, the Internet of Things, photonics and post-CMOS technologies. By supporting the digital transformation of industry, Leti plays a leading role in “smart everything everywhere”, Lemke said.

“Leti is excellently positioned to continue doing forward-looking research” on components and systems to build the foundation for Europe’s future competitiveness, and to play an instrumental role in supporting French and European industry in their digital transformation, he said.

A new low-temperature solution printing technique allows fabrication of high-efficiency perovskite solar cells with large crystals intended to minimize current-robbing grain boundaries. The meniscus-assisted solution printing (MASP) technique boosts power conversion efficiencies to nearly 20 percent by controlling crystal size and orientation.

The process, which uses parallel plates to create a meniscus of ink containing the metal halide perovskite precursors, could be scaled up to rapidly generate large areas of dense crystalline film on a variety of substrates, including flexible polymers. Operating parameters for the fabrication process were chosen by using a detailed kinetics study of perovskite crystals observed throughout their formation and growth cycle.

“We used a meniscus-assisted solution printing technique at low temperature to craft high quality perovskite films with much improved optoelectronic performance,” said Zhiqun Lin, a professor in the School of Materials Science and Engineering at the Georgia Institute of Technology. “We began by developing a detailed understanding of crystal growth kinetics that allowed us to know how the preparative parameters should be tuned to optimize fabrication of the films.”

The new technique is reported July 7 in the journal Nature Communications. The research has been supported by the Air Force Office of Scientific Research (AFOSR) and the National Science Foundation (NSF).

Georgia Tech Research Scientist Ming He adjusts the equipment for the meniscus-assisted solution printing (MASP) technique used to fabricate perovskite films for solar cells. (Credit: Rob Felt, Georgia Tech)

Georgia Tech Research Scientist Ming He adjusts the equipment for the meniscus-assisted solution printing (MASP) technique used to fabricate perovskite films for solar cells. (Credit: Rob Felt, Georgia Tech)

Perovskites offer an attractive alternative to traditional materials for capturing electricity from light, but existing fabrication techniques typically produce small crystalline grains whose boundaries can trap the electrons produced when photons strike the materials. Existing production techniques for preparing large-grained perovskite films typically require higher temperatures, which is not favorable for polymer materials used as substrates – which could help lower the fabrication costs and enable flexible perovskite solar cells.

So Lin, Research Scientist Ming He and colleagues decided to try a new approach that relies on capillary action to draw perovskite ink into a meniscus formed between two nearly parallel plates approximately 300 microns apart. The bottom plate moves continuously, allowing solvent to evaporate at the meniscus edge to form crystalline perovskite. As the crystals form, fresh ink is drawn into the meniscus using the same physical process that forms a coffee ring on an absorbent surface such as paper.

“Because solvent evaporation triggers the transport of precursors from the inside to the outside, perovskite precursors accumulate at the edge of the meniscus and form a saturated phase,” Lin explained. “This saturated phase leads to the nucleation and growth of crystals. Over a large area, we see a flat and uniform film having high crystallinity and dense growth of large crystals.”

To establish the optimal rate for moving the plates, the distance between plates and the temperature applied to the lower plate, the researchers studied the growth of perovskite crystals during MASP. Using movies taken through an optical microscope to monitor the grains, they discovered that the crystals first grow at a quadratic rate, but slow to a linear rate when they began to impinge on their neighbors.

“When the crystals run into their neighbors, that affects their growth,” noted He. “We found that all of the grains we studied followed similar growth dynamics and grew into a continuous film on the substrate.”

The MASP process generates relatively large crystals – 20 to 80 microns in diameter – that cover the substrate surface. Having a dense structure with fewer crystals minimizes the gaps that can interrupt the current flow, and reduces the number of boundaries that can trap electrons and holes and allow them to recombine.

Using films produced with the MASP process, the researchers have built solar cells that have power conversion efficiencies averaging 18 percent – with some as high as 20 percent. The cells have been tested with more than 100 hours of operation without encapsulation. “The stability of our MASP film is improved because of the high quality of the crystals,” Lin said.

Doctor-blading is one of the conventional perovskite fabrication techniques in which higher temperatures are used to evaporate the solvent. Lin and his colleagues heated their substrate to only about 60 degrees Celsius, which would be potentially compatible with polymer substrate materials.

So far, the researchers have produced centimeter-scale samples, but they believe the process could be scaled up and applied to flexible substrates, potentially facilitating roll-to-roll continuous processing of the perovskite materials. That could help lower the cost of producing solar cells and other optoelectronic devices.

“The meniscus-assisted solution printing technique would have advantages for flexible solar cells and other applications requiring a low-temperature continuous fabrication process,” Lin added. “We expect the process could be scaled up to produce high throughput, large-scale perovskite films.”

Among the next steps are fabricating the films on polymer substrates, and evaluating other unique properties (e.g., thermal and piezotronic) of the material.

Twelve years of continuous operation. That amounts to over 18.9 billion rotations. In mid-January 2017, a Busch LLC COBRA BC dry screw vacuum pump passed this milestone in a semiconductor foundry in Germany.

The COBRA BC in question has been in continuous operation at the GlobalFoundries production site in Dresden, Germany, since 2005 and is the longest-operating COBRA BC at the site, which is known as Fab 1. Fab 1 in Dresden was the world’s first fab to manufacture microchips with copper wiring in industrial quantities – a technology that is now the basis for semiconductor production throughout the world.

A total of 203 COBRA BC 0100 dry screw vacuum pumps are installed at the Dresden site, which produces 300mm wafers for the semiconductor industry. 31 of these COBRA BCs have been in continuous operation for over 10 years, and 15 of the COBRA BCs have passed the milestone of 100,000 operating hours (over 11 years of operation). Generally, continuous operation over five or six years is the industry expectation in load-lock applications.

COBRA BC vacuum pumps are predominantly used in the load-lock applications of epitaxy and physical vapor deposition (PVD) processes, as well as in other contamination-free processes for wafer handling and metrics to assure the quality of the lithography process.

The COBRA BC 0100 is a dry screw vacuum pump within the proven COBRA BC series portfolio that is a compact load-lock solution with additional process capabilities for the most demanding solar, flat panel and semiconductor applications. It has excellent powder handling capabilities as a result of its unique screw pump design.

The COBRA BC series is also available in a COBRA BC Premium Efficiency class with a reduced energy footprint that results in lower electrical energy use of up to 40%. The Premium Efficiency class is based on the proven technology platform of the COBRA BC.

Busch Vacuum Pumps and Systems maintains a service team in Dresden, which consists of nine service technicians and one team leader in a 24/7 shift system, ensuring very high system availability of the nearly 900 installed Busch vacuum pumps. Furthermore, the service team maintains the waste gas abatement systems.

GlobalFoundries is among the top semiconductor companies in the world and manufactures at its Dresden fab 40nm to 22nm nodes. The Dresden fab is Europe’s largest fab for the production of microchips.

Industry experts answer questions about the new standard in a virtual roundtable.

In recent years, energy consumption has decreased due to several innovations that have helped to improve the energy efficiency of process tools and sub-fab equipment, but an increase in the number of processes and the growing complexity of processing at the current node has resulted in a spike in energy consumption in the fab. Approximately 43% of the energy consumed in the fab is due to the processing equipment and, of this, 20% is vacuum and abatement (8% overall).

A new standard from SEMI, E175, defines energy saving modes, which combined with the EtherCAT signaling standard, can help fabs save energy and other gas/utility costs when the tool is not processing and with no impact on subsequent wafer processing.

EtherCAT, based on industrial Ethernet, provides high- speed control and monitoring. It is the communication standard of choice for the latest semiconductor tool controllers to connect to sensors and actuators around the tool, including vacuum and abatement systems.

SEMI E175 defines how process tools communicate with sub-fab equipment, such as vacuum pumps and gas abatement systems, to reduce utility consumption at times when wafers are not being processed by the tool, and returning to full performance when the tool is again required to process wafers. It builds on SEMI E167, which defines communication between the fab host/ WIP controller and the process tools for the purpose of utility saving.

Collaboration between the E175 and EtherCAT groups has seen a harmonization of the communication standards to provide co-ordinated energy saving across devices in the fab.
We invited experts in this area to answer a few questions in a virtual roundtable. The participants are:

• GERALD SHELLEY, Senior Product Manager Communication and Control at Edwards, and the EtherCAT Chair Abatement / Roughing pump working groups, E175 task force.

• MIKE CZERNIAK, Environmental Solutions Business Development Manager at Edwardsm Co-Chair of SEMI International Standards E167 & E175, and campaigner for energy saving

• GINO CRISPIERI, Applied Materials – Past Co-chair of E175 (originally SEMATECH/ISMI, then independent consultant, prior to Applied Materials)

• MARTIN ROSTAN, Executive Director, EtherCAT Technology Group

Q: Please explain what drove the standards work on energy saving and the achievements to date.

SHELLEY: There is increased pressure on the industry to reduce energy and utility saving from both a cost and environmental standpoint. Subfab equipment is a major consumer of utilities, which is wasted when a tool is not in use. Different manufacturers have implemented energy saving solutions, with minimal direct connection to the tool. However, direct tool connection has emerged as the best way to maximize saving without any risk to wafer processing.

CZERNIAK: This work originated in the ISMI part of SEMATECH as a follow-on to generic work aimed at reducing the overall utilities footprint of modern fabs. In response to this and requests from customers, Edwards developed vacuum pumps and gas abatement systems that had energy-saving functionality. However, it soon became clear that the limitation to implementing such savings was the absence of standardised signalling between the process tool and sub-fab equipment.

CRISPIERI: A SEMATECH project around 2009 started to look into opportunities for saving energy in the semiconductor factories. At that time, suppliers of pumps and abatement systems already had started initiatives to provide their own solutions to the initiative. Since that time, the industry has adopted two new standards: SEMI E167 Specification for Equipment Energy Saving Mode Communication (between factory and semicon- ductor equipment) and SEMI E175 Specification for Subsystem Energy Saving Mode Communication (between semiconductor equipment and subsystems).

Q: Please describe how the energy saving task force was born and why you decided to get involved.

CRISPIERI: Back in 2009 while working for SEMATECH in Austin, Texas, prior to SEMATECH’s move the New York, Thomas Huang an assignee for GlobalFoundries to the EHS Program approached and asked me if I would be interested in helping him drive a standard for equipment suppliers to enable their equipment to save energy during idle times. Because of my previous experience working with equipment suppliers and developing standards for equipment and factory communication, I accepted to chair a task force to drive the equipment supplier’s new capability requirement into a standard. At first, we thought it would be an easy task and that everyone would jump to help create and approve the standard in a short amount of time because of its benefits. A two phase approach was defined to drive the standardization process and engage semiconductor and sub-fab equipment suppliers accordingly. It took almost three years to complete the Phase I (2013) and another three to complete the Phase II (2016) standards.

SHELLEY: The task force was an extension of E167 which previously defined the communication into the tool from the supervisory systems, however to achieve maximum benefit signalling to tool subsystems was key and the E175 task force was the result.

CZERNIAK: Following-on from the above, the ISMI working group became a SEMI Standards Task Force and began work at developing a standard, initially for Host to process tool (E167) and then from tool to sub-fab (E175), which I was co-chair for to ensure continuity and clear the signalling “roadblock”.

Q: How have suppliers collaborated on E175?

CRISPIERI: Compared with the suppliers who partic- ipated in SEMI E167 development, the suppliers involved in the development and approval of SEMI E175 were more committed to make it happen and helped drive the standardization process to conclusion much more efficiently. Edwards, AMAT, TEL, Hitachi- Kokusai and DAS-Europe regularly participated and provided inputs to standardize behavior and require- ments for their own equipment. We run into some difficulty getting aligned with other standard activities that were driven by SEMI’s EHS Committee because their changes affected our standardization process. I must note that the overall participation was excellent in particular from Edwards Vacuum and AMAT.

ROSTAN: Within the ETG Semiconductor Technical Working Group individual task groups already had multiple suppliers collaborating on the detail of the EtherCAT profiles for all devices, with technical support from the EtherCAT Technical Group. We were fortunate to have a delegate from Edwards in both the Semi E175 Task Force and key EtherCAT Task Groups to informally broker agreement between the teams.

SHELLEY: The suppliers were able to use their collective experience to work through a number of options to find the optimum way of controlling subfab equipment, tackling variability in wakeup time and control architec- tures between device types and equipment technology.

CZERNIAK: Suppliers, automation providers, tool OEMs and end-users have all collaborated to help develop a standard that works for everyone and aligns with earlier standards like S23.

Q: How was the EtherCAT collaboration beneficial to E175?

SHELLEY: By sharing information and understanding in real time we demonstrated the E175 concept is achievable using the favored protocol for new tool platforms and defined how it would be implemented. We co-operated to take both these standards to alignment in one simul- taneous step, saving considerable committee time on both sides that would have been necessary to resolve any divergence of the detail.

ROSTAN: By devising the implementation of E175 in parallel the EtherCAT Task Groups involved were able to feedback detailed technical proposals and show the E175 standard could be implemented relatively easily within the existing EtherCAT standards.

CRISPIERI: Participation and collaboration from the EtherCAT Working Group was critical to accelerate the implementation and adoption of the standard. Dry Contacts and EtherCAT communication protocol messages were added to two Related Information sections and included in the SEMI E175 standard at the time of its publication.

CZERNIAK: This enables a “richer” signalling environment than simple dry contacts (which are also supported) that enables even greater utility savings to be made.

Q: How has EtherCAT been able to support the require- ments of the tool and Semi E175?

CZERNIACK: By providing timing information; the longer the time the tool is inactive, the greater the savings possible.

ROSTAN: As the control network of choice for the latest semiconductor tools, EtherCAT has been ideally placed to support enhancements, such as the energy saving connectivity increasingly being requested by the fabs. In particular, it was good to see the Pump and Abatement Task Groups of the existing Semiconductor Technical Working Group formulate an E175 compliant solution within the timescales of the second release of the EtherCAT semiconductor device profiles. The EtherCAT Technology Group was also more than happy to support the publication of extracts of the EtherCAT standards being used as protocol examples in the Imple- mentation guidelines of the Semi E175 document.

SHELLEY: EtherCAT has the fast / deterministic connec- tivity and proven integration with tool controllers that allows E175 functionality to be easily added without any loss of performance. By including the requirements of Semi E175 in the EtherCAT standards, both equipment suppliers and tool vendors can establish energy saving communication quickly and easily.

CRISPIERI: The coordination between EtherCAT Working Group and the SEMI ESEC task force group was conducted by Mr. Gerald Shelley from Edwards Vacuum. With his help and leadership, we reached effortlessly agreement and acceptance for the required messages, parameters and values into the EtherCAT respective Pump and Abatement Profile documents. Havingworking usage scenarios and support from the EtherCAT Working Group has been invaluable.

Q: Why is energy saving important to the industry?

ROSTAN: In the industrial world, EtherCAT users are increasingly using our communication and control technologies to drive down energy consumption. The semiconductor industry operates in parts of the world where energy is a limited and expensive resource, whilst the latest wafer processing requires more power. The manufacturers are therefore in great need for energy saving opportunities, such as when the tool subsystems are not in use.

SHELLEY: The fabs are being squeezed by an increase in the complexity and number of processes involved in manufacturing a wafer, driving consumption up and increasing scarcity of energy supply. This is further compli- cated with associated cost and government pressure to “keep the lights on”.

CRISPIERI: It is not hard to see why is so important for device makers or the semiconductor manufacturing industry to adopt and require energy conservation capabilities in their factories. Energy consumed by many equipment components and support systems, such as pumps and abatement systems, never stop from running even when the equipment is idle and waiting for product to be delivered for processing. These components and support systems can save millions of dollars each year if their power consumption is reduced. This energy consumption reduction extends their life cycle thus reducing costs of maintenance and parts replacement. Any effort to reduce energy consumption helps lower costs and adds gains to not only the manufacturer but to those who have to generate the energy for consumption.

CZERNIACK: Cost reduction is always important, but electrical supply is limited in some areas.

With the increasing sophistication of future vehicles, new and more advanced semiconductor technologies will be used and vehicles will become technology centers.

BY DR. JEAN-CHARLES CIGAL and GREG SHUTTLEWORTH, Linde Electronics, Taipei, Taiwan

Large efforts are being deployed in the car industry to transform the driving experience. Electrical vehicles are in vogue and governments are encouraging this market with tax incentives. Cars are becoming smarter, capable of self-diagnostics, and in the near future will be able to connect with each other. Most importantly, the implementation of safety features has greatly reduced the number of accidents and fatal- ities on the roads in the last few decades. Thanks to extensive computing power, vehicles are now nearing autonomous driving capability. This is only possible with a dramatic increase in the amount of electronic devices in new vehicles.

Recent announcements regarding acquisitions of automotive electronics specialists by semiconductor giants and strategic plans from foundries highlight the appetite from a larger spectrum of semiconductor manufacturers for this particular market. Automotive electronics has become a major player in an industrial transformation.

Automotive electronics is, however, very different from the consumer electronics market. The foremost focus is on product quality, and the highest standards are used to ensure the reliability of electronics components in vehicles. This has also an impact on the quality and supply chain of materials such as gases and chemicals used in the manufacturing of these electronics devices.

Automotive electronics market: size and trends

When you include integrated circuits, optoelectronics, sensors, and discrete devices, the automotive electronics market reached around USD 34 billion in 2016 (FIGURE 1). While this represents less than 10% of the total semiconductor market, it is predicted to be one of the fastest growing markets over the next 5 years.

Screen Shot 2017-06-16 at 12.34.08 PM

There are several explanations for such growth potential:

• The vehicle market itself is predicted to steadily grow on an average 3% in the coming 10 years and will be especially driven by China and India, although other developed countries will still experience an increase in sales.
• The semiconductor content in each car is steadily increasing and it is expected that the share of electronic systems in the vehicle cost could reach 50% of the total car cost by 2030 (FIGURE 2).

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While it is clearly challenging to describe what the driving experience will be in 10 to 15 years, some clear trends can be identified:

• Safety: The implementation of integrated vision systems, in connection with dozens of sensors and radars, will allow thorough diagnoses of surrounding areas of the vehicles. Cars will progressively be able to offer, and even take decisions, to prevent accidents.
• Fuel efficiency: The share of vehicles equipped with (hybrid) electrical engines is expected to steadily grow. For such engines, the electronics content is estimated to double in value compared to that of standard combustion engines.
• Comfort and infotainment: Vehicle drivers are constantly demanding a more enhanced driving experience. The digitalization of dashboards, the sound and video capabilities, and the customization of the driving and passenger environment should heighten the pleasure of time spent in the vehicle.

In order to coordinate all these functions, communication systems (within the vehicle, between vehicles, and between vehicles and infrastructures) are critical and large computing systems will be necessary to treat large amount of data.

Quality really makes automotive electronics different

Automotive electronics cannot be defined by specific technologies or applications. They are currently characterized by a very large portfolio of products based on mature technologies, spanning from discrete, optoelectronics, MEMS and sensors, to integrated circuits and memories.

Until now, the automotive electronics market has been the preserve of specialized semiconductor manufacturers with long experience in this field. The reason for this is the specific know-how required for quality management.

A component failure that appears harmless in a consumer product could have major safety consequences for a vehicle in motion. Furthermore, operating conditions of automotive electronics components (temperature, humidity, vibration, acceleration, etc.), their lifetime, and their spare part availability are differentiators to what is common for consumer and industrial devices (FIGURE 3).

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Currently, some of the most technologically advanced vehicles integrate around 450 semiconductor devices. As they become significantly more sophisticated, the semiconductor content will drastically increase, with many components based on the most advanced semiconductor technology available. Introducing artificial intelligence will require advanced processors capable of computing massive amount of data stored in high-performance and high capacity memory devices. This implies that not only the most advanced semicon- ductor devices will be used, but that these will need to achieve the highest degree of reliability to allow a flawless operation of predictive algorithms.

It is expected that smart vehicles capable of fully autonomous driving will employ up to 7,000 chips. In this case, even a failure rate of 1ppm, already very low by any standard today, would lead to 7 out of 1,000 cars with a safety risk. This is simply unacceptable.

The automotive electronics industry has therefore introduced quality excellence programs aimed at a zero defect target. Achieving such a goal requires a lot of effort and all constituents of the supply chain must do their part.

The automotive electronics industry is one of the most conservative in terms of change management. Longestablished standards and documentation procedures ensure traceability of design and manufacturing deviations. Qualification of novel or modified products is generally costly and lengthy. This is where material suppliers can offer competence and expertise to provide material with the highest quality standards.

What does this mean for a material supplier?

As a direct contact to its customer, the material supplier is responsible for the complete supply chain from the source of the raw material to the delivery at the customer’s gate. The material supplier is also accountable for long-term supply in accordance with the customer’s objectives.
There are essentially two fields where the material supplier can support its customer: quality and supply chain (FIGURE 4).

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Given the constraints of the automotive electronics market, material qualification must follow extensive procedures. While a high degree of material purity is a prerequisite, manufacturing processes are actually much more sensitive to deviations of material quality, as they potentially lead to process recalibration. Before qualification starts, it is critical that candidate materials are comprehensively documented. This includes the manufacturing process, the transport, the storage, and, where appropriate, the purifi- cation and transfill operations. Systematic auditing must be regularly performed according to customers’ standards. As a consequence, longer qualification times are expected. Any subsequent change in the material specification, origin, and packaging must be duly documented and is likely to be subject to a requalification process.

Material quality is obviously a critical element that must be demonstrated at all times. This commands the usage of high-quality products with a proven record. Sources already qualified for similar applica- tions are preferred to mitigate risks. These sources must show long-term business continuity planning, with process improvement programs in place. Purity levels must be carefully monitored and documented in databases. State-of-the-art analysis methods must be used. When necessary, containment measures should be deployed systematically. Given the long operating lifetime of automotive electronic compo- nents, failure can be related to a quality event that occurred a long time before.

Because of the necessary long-term availability of the electronics components and the material qualification constraints, manufacturers and suppliers will generally favor a supply contract over several years. Therefore, the source availability and the supply chain must be guaranteed accordingly.

Material suppliers are implementing improved quality management systems for their products in order to fulfill the expectations of their customers, in terms of quality monitoring and trace- ability. Certificate of analysis (COA) or consistency checks are not sufficient anymore; more data is required. In case deviation is detected, the inves- tigation and response time must be drastically reduced and allow intervention before delivery to the customer. Finally, the whole supply chain must be monitored.

Several tools must be implemented in order to maintain a reliable supply chain of high-quality products (FIGURE 5): statistical process and quality controls (SPC/SQC), as well as measurement systems analysis (MSA), allow systematic and reliable measurement and information recording for traceability. Imple- menting these tools particularly at the early stages of the supply chain allows an “in-time” response and correction before the defective material reaches the customer’s premises. Furthermore, some impurities that were ignored before may become critical, even below the current detection limits. Therefore, new measurement techniques must be continuously inves- tigated in order to enhance the detection capabilities.

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Finally, a robust supply chain must be ensured. It is imperative for a material supplier to be prepared to handle critical business functions such as customer orders, overseeing production and deliveries, and other various parts of the supply chain in any situation. Business continuity planning (BCP) was introduced several years ago in order to identify and mitigate any risk of supply chain disruption.

Analyzing the risks to business operations is fundamental to maintaining business continuity. Materials suppliers must work with manufacturers to develop a business continuity plan that facilitates the ability to continue to perform critical functions and/or provide services in the event of an unexpected interruption. The goal is to identify potential risks and weakness in current sourcing strategies and supply chain footprint and then mitigate those risks.

Because of the efforts necessary to qualify materials, second sources must be available and prepared to be shipped in case of crisis. Ideally, different sources should be qualified simultaneously to avoid any further delay in case of unplanned sourcing changes. Material suppliers with global footprint and worldwide sourcing capabilities offer additional security. Multiple shipping routes must be considered and planned in order to avoid disruption in the case, for instance, of a natural disaster or geopolitical issue affecting an entire region.

Material suppliers need to be aware and monitor regulations specific to the automotive electronics industry such as ISO/TS16949 (quality management strategy for automotive industries). This standard goes above and beyond the more familiar ISO 9001 standard, but by understanding the expectations of suppliers to the automotive industry, suppliers can ensure alignment of their quality systems and the documentation requirements for new product development or investigations into non-conformance.

Future of automotive electronics

With the increasing sophistication of future vehicles, new and more advanced semiconductor technologies will be used and vehicles will become technology centers. These technologies will allow communication and guidance computing. Most of these components (logic or memory) will be built by manufacturers relatively new to the automotive electronics world— either integrated device manufacturers (IDM) or foundries.

In order to comply with the current quality standards of the automotive industry, these manufacturers will need to adhere to more stringent standards imposed by the automobile industry. They will find support from materials suppliers like Linde that are capable of deliv- ering high-quality materials associated with a solid global supply chain who have acquired global experience in automotive electronics.

For more information about this topic or Linde Electronics, visit www.linde.com/electronics or contact Francesca Brava at [email protected].

BY DR. PHIL GARROU, Contributing Editor

The need for ever more computational power continues to grow and exaflop (1018 ) capabilities may soon become necessary. A paper by AMD on “Design and Analysis of an APU for Exascale Computing” presented at the IEEE High Performance Computing Architec- tures Conference (HPCA) gave the AMD vision for an exascale node architecture for exascale computing including low-power and high-performance CPU cores, integrated energy-efficient GPU units, in-package high-bandwidth 3D memory, die-stacking and chiplet technologies, and advanced memory systems.

Two of the building blocks for this exascale node architecture are (1) it’s chiplet-based approach that decouples performance-critical processing components like CPUs and GPUs from components that do not scale well with technology (e.g., analog components), allowing fabrication in individually optimized process technologies for cost reduction and design reuse in other market segments and (2) the use of in-package 3D memory, which is stacked directly above high- bandwidth-consuming GPUs.

The exascale heterogeneous processor (Figure 1) is an accelerated processing unit (APU) consisting of CPU and GPU compute integrated with in-package 3D DRAM. The overall structure makes use of a modular “chiplet” design, with the chiplets 3D-stacked on other “active interposer” chips. “The use of advanced packaging technologies enables a large amount of computational and memory resources to be located in a single package.” The exascale targets for memory bandwidth and energy efficiency are incredibly challenging for off-package memory solutions. Thus AMD proposes to integrate 3D-stacked DRAM into the EHP package.

In the center of the EHP are two CPU clusters, each consisting of four multi-core CPU chiplets stacked on an active interposer base die. On either side of the CPU clusters are a total of four GPU clusters, each consisting of two GPU chiplets on a respective active interposer. Upon each GPU chiplet is a 3D stack of DRAM. The DRAM is directly stacked on the GPU chiplets to maximize bandwidth. The interposers underneath the chiplets provide interconnection between the chiplets along with other functions such as external I/O interfaces, power distribution and system management. Interposers maintain high-bandwidth connectivity among themselves by utilizing wide, short distance, point-to-point paths.

Chiplets

The performance requirements require a large amount of compute and memory to be integrated into a single package. Rather than build a single, monolithic system on chip (SOC), AMD proposes to leverage advanced die-stacking technologies to decompose the EHP into smaller components consisting of active interposers and chiplets. Each chiplet houses either multiple GPU compute units or CPU cores. The chiplet approach differs from conventional multi-chip module (MCM) designs in that each individual chiplet is not a complete chip. For example, the CPU chiplet contains CPU cores and caches, but lacks memory interfaces and external I/O.

A monolithic SOC imposes a single process technology choice on all components in the system. With chiplets and interposers, each discrete piece of silicon can be optimized for its own functions. It is expected that smaller chiplets will have higher yield due to their size, and when combined with KGD testing, can be assembled into larger systems at reasonable cost.

It is expected that the decomposition (or disintegration as I prefer to call it) of the EHP into smaller pieces will enable silicon-level reuse of IP (note – this is one of the main drivers of the DARPA CHIPS program)

Yole Développement (Yole) confirms the consolidation of the advanced packaging industry, that is showing a steady growth between 2016 and 2022: +7% in revenue.

“Advanced packaging is showing a total revenue CAGR higher than the total packaging industry (3-4%), semiconductor industry (4-5%) and generally the global electronics industry (3-4%)”, comments Andrej Ivankovic, Technology & Market Analyst at Yole. “Companies are today managing production costs and enlarging their portfolio. In parallel, advanced packaging players are expanding their activities toward the emerging markets thanks to mergers & acquisitions,” he adds. Therefore, the advanced packaging industry is showing drivers including IoT, automotive industry, 5G connectivity, AR/VR, AI.

advanced packaging revenue

What are the advanced packaging market drivers and latest market dynamics? What are the emerging market segments targeted by the leaders to diversify their activities? What are the technology moves? How will the advanced packaging market affect the semiconductor industry evolution? Advanced packaging solutions could enable the development of future semiconductor products and so boost the global semiconductor industry.

Yole’s advanced packaging team releases this month its Status of the Advanced Packaging Industry report. Under this 2017 edition, analysts propose an overview the industry, its disruptions and opportunities. They analyze the latest technology trends and forecasts. Yole’s team also reviews the supply chain and offers a detailed description and analysis of leading company strategies, especially the shifting business models. Yole’s report includes a technical roadmap, showing an analysis per advanced packaging platform along with an analysis of future production and developments in the timeframe 2017-2022.

Andrej Ivankovic from Yole, author of this technology & market report, will present a closer look at the ASE Tech Forum @ Nijmegen. ASE’s conference takes place on June 28, in Van der Valk Hotel, Nijmegen, The Netherlands. During one day, ASE invites you to explore key areas of its IC , SiP and MEMS packaging portfolio, developed in alignment with emerging applications. Innovative technologies, such as FO , FC and 3D, will be detailed as well as opportunities of collaboration: Full program & registration.

“We are very pleased to welcome our network at the ASE Tech Forum @ Nijmegen on June 28”, asserts Jean-Marc Yannou, Technical Director at ASE Europe. ASE is developing a unique one-day program to present our innovative portfolio and including networking times and technology demonstrations. We are looking forward to welcome the advanced packaging companies and get relevant discussions and debates”.

“The fastest growing advanced packaging platform is FO with 36% followed by 2.5D/3D TSV with 28%”,announces Andrej Ivankovic from Yole. “Therefore FO platforms and 2.5D/3D TSV solutions are expected to exceed respectively US$3 billion and US$ 1.3 billion by 2022.”

The FC platform is by far the largest, accounting for 81% of advanced packaging revenue with US$19.6 billion in 2017, however a lower 5% revenue growth indicates that penetration of primarily FO packages will decrease FC market share to 74% by 2022. The revenue forecast translates to an advanced packaging wafer forecast of 8% and a 9% unit count, CAGR during the period 2016-2022. Advanced packages will continue to dominantly address high-end logic and memory in computing and telecom, with further penetration in analog and RF in high-end consumer/mobile segments, while eyeing opportunities in growing automotive and industrial segments.

The shifts in the semiconductor supply chain are results of preparations for future uncertainty, and search for other value flows. Several mergers and acquisitions have been made in attempt to offer a more complete and diversified portfolio, while keeping control of costs and potential losses. Furthermore, in search of additional revenue, new business models are appearing or expanding.

AI is driving the development of 3D TSV and heterogeneous integration technologies. With its new 3D TSV & 2.5D business update report, Yole Développement (Yole), part of Yole Group of Companies investigates the advanced packaging industry and takes a closer look on the AI impact on this market.

“3D integration is clearly offering today unequalled performances suiting exactly the pressing needs of AI applications,” commented Emilie Jolivet, Technology & Market Analyst at Yole.

Initially developed for niche markets including MEMS devices and memories for datacenters, 3D integration is entering in a new era. The world population increase, the exploding smartphones market, the development of new functionalities such as voice/image recognition… all these parameters directly contribute to the development of AI and deep learning solutions, all based on 3D integration technologies. AI is not a concept anymore but a reality that is skyrocketing the development of disruptive advanced packaging technologies.

This year, the “More than Moore” market research and strategy consulting company is moving a step forwards the applications side. Its advanced packaging & semiconductor manufacturing team investigates the industry evolution, taking into account promising sectors such as deep learning, the end-users’ needs and required specifications for final systems. Yole’s analysts combine their advanced packaging expertise and their knowledge of the different industries to perform up-to-date and innovative reports. The 3D TSV & 2.5D business update report is a good example, with a strong focus on the high-performance sector.

Why do we need 3D TSV solutions, especially in high performance applications?

According to Yole, benefits are numerous and are part of the major issues initially identified by the industrial companies. Bandwidth, latency and power consumption are the key words of these innovations… Emilie Jolivet from Yole details some below:

  •  When two chips or more are integrated on an interposer, distance between logic and memory is shortened which enables lower latency and lower power consumption.
•  DRAM, based on a 3D TSV solution, is offering an unequalled bandwidth performance because of the ability of TSV solution to connect several layers of the device.
•  Artificial intelligence and specifically deep learning mostly intensively using memory and computing also need 3D TSV approaches. Both applications are driving the demand of interposer and 3D memory cubes.

AI and deep learning, both part of the high performance applications segment are might be the most impressive applications. However, datacenter networking, AR/VR and autonomous driving are not so far behind. Industrial companies progressively penetrate these market segments by developing dedicated approaches:

  •  Both 3D IC leaders, TSMC and Globalfoundries are involved in the development of new solutions focused on 3D SoC.
•  Samsung introduced its interposer solutions in 2017, SPIL is developing its own 2.5D solutions
•  STMicroelectronics is working on 3D interconnections and interposers for various applications including silicon photonics, data centers.

In addition, companies like Intel, Nvidia are completely re-thinking their growth strategy: “Major IC companies which missed the smartphone business clearly don’t want to miss the AI revolution,” commented Emilie Jolivet from Yole. From their side, investors are part of the playground. Therefore, they all re-align their strategy to have product portfolio for serving AI/deep learning needs. Datacenters, cloud computing, AI, autonomous driving are becoming key words for venture capitalists.

Yole’s analysts are convinced of the added value of 3D integration technologies. AI and deep learning are new applications to consider but not only. AR/VR will be also part of the 3D integration future. And the latest announcement from AMD regarding its new Radeon Pro Vega graphic card dedicated to Apple’s new iMac Pro is another step towards the computing applications™.

A detailed description of the 3D TSV and 2.5D Business Update – Market and Technology Trends 2017 is available on i-micronews.com, advanced packaging reports section.

Mentor, a Siemens business, today announced that it has launched the Mentor OSAT (outsourced assembly and test) Alliance program to help drive ecosystem capabilities in support of new high-density advanced packaging (HDAP) technologies like 2.5D IC, 3D IC and fan-out wafer-level packaging (FOWLP) for customer integrated circuit (IC) designs. By launching this program, Mentor will work with OSATs to provide fabless companies with design kits, certified tools, and best practices to aid in smoother adoption of these new packaging solutions that require a much tighter link between chip and package design. Mentor also announced Amkor Technology, Inc. as its first OSAT Alliance member.

Through the Mentor OSAT Alliance, members work with Mentor to create certified design kits to help customers speed up IC and advanced package development with Mentor’s Tanner L-Edit AMS design cockpit, Calibre IC physical verification platform, HyperLynx SI/PI and HyperLynx full-wave 3D tools, Xpedition Substrate Integrator and Xpedition Package Designer tools, and Mentor’s newly announced Xpedition HDAP flow.

“Mentor’s customers are pioneering technologies at the heart of IoT, autonomous driving and next-generation wired and wireless networks,” said Joe Sawicki, vice president and general manager of the Design to Silicon Division at Mentor. “Many of these companies are designing ICs that use advanced packaging from OSATs to achieve their design goals. Like the Mentor Foundry Alliance program did for accelerating foundry design kit creation, the Mentor OSAT Alliance program will help our mutual customers use Mentor’s world-class EDA portfolio to more easily implement ICs with advanced packaging technologies.”

Members of the Mentor OSAT Alliance will receive software, training, and reference flow best practices from Mentor, in addition to the opportunity for co-marketing mutual offerings.

“The next generation of IC packaging will require increased heterogeneous die integration, incorporating reduced size, weight, and improved performance and reliability,” said Ron Huemoeller, corporate vice president, research and development at Amkor. “Amkor’s Silicon Wafer Integrated Fan-out Technology (SWIFT™) package technology is designed to provide increased I/O and circuit density within a significantly reduced footprint and profile for single and multi-die applications. Being an integral part of the Mentor OSAT Alliance program will allow us to fast-track PDK development and delivery, and enable our customers to design more efficiently and predictably.”

With alliance programs for both foundries and OSATs, Mentor continues to enable the semiconductor ecosystem. The OSAT Alliance program will drive global design and supply chain adoption of these emerging advanced packaging technologies.