Category Archives: Metrology

pSemi Corporation today announced that its parent company and executive leadership has approved the recommendation of Chairman and Chief Executive Officer Jim Cable for an evolution of the company’s senior leadership structure.  Under the new structure, the company’s current VP of Product Marketing, Sumit Tomar, will succeed Jim as CEO, effective July 1, 2019.  Jim will continue as Chairman and Chief Technology Officer.  In addition, Jim will remain as global semiconductor R&D director for the parent company Murata Manufacturing.

“I am very proud of what we have accomplished here at pSemi Corporation.  In our over 30 years of innovation, we have consistently pushed the envelope of technology.  Now it is time to ensure we can continue to compete just as strongly in the future.  To that end, I have selected an internal candidate to succeed me as CEO,” says Jim Cable.  “I have watched Sumit in action, he knows our company and I am 100 percent committed to a successful transition for him and the company. We did an extensive external search and decided that the right choice was already here.”

Tomar is a 20-year industry veteran with a proven track record of bringing successful products to the market.  An expert in the RF ecosystem, Tomar has a solid understanding of RF products and has driven product execution from inception to production for hundreds of market-shaping products. From 2012 to 2016, Tomar served as the general manager of Qorvo’s wireless infrastructure business unit. In addition, he worked in RF product management at Texas Instruments, Sierra Monolithics and Skyworks. His product marketing experience spans 4/5G smartphone and radio access networks, automotive semiconductors, 802.11ax access points, SDN/NFV for data centers, and machine learning and artificial intelligence for mobile edge networks. In 2016, he co-founded C-RAN Inc., a startup that is developing a 5G RF system prototype. Tomar holds a Master of Science in electrical engineering and completed the StanfordExecutive Management Program. He joined pSemi Corporation in August of 2017 as the Vice President of Product Marketing.  “Sumit has been instrumental in managing our relationship with Murata to ensure that we support our parent company while continuing to innovate new products in the RF space,” continues Cable.

“Murata believes that successful succession planning requires careful consideration and attention to ensure a strong talent pipeline,” says Norio Nakajima, senior executive vice president and board member for Murata Manufacturing. “Jim’s selection of Sumit is an ideal example of outstanding succession planning.  I have had the pleasure of watching Sumit in action and I am convinced he is the right person to succeed Jim.”

GLOBALFOUNDRIES today announced that the company’s mobile-optimized 8SW RF SOI technology platform has delivered more than a billion dollars of client design win revenue since its launch in September 2017. With yields and performance exceeding client expectations, 8SW is enabling designers to develop solutions that offer extremely fast downloads, higher quality connections and reliable data connectivity for today’s 4G/LTE Advanced operating frequencies and future sub-6 GHz 5G mobile and wireless communication applications.

As the industry’s first 300mm RF SOI foundry solution, 8SW delivers significant performance, integration and area advantages, with best-in-class low-noise amplifier (LNA) and switch performance which all together improve integration solutions in the front-end module (FEM). The optimized RF FEM platform is tailored to accommodate aggressive LTE and sub-6 GHz standards for FEM applications, including 5G IoT, mobile device and wireless communications.

“At Qorvo, we continuously expand upon our industry-leading RF portfolio to support all pre-5G and 5G architectures, as such we require the best available technologies to enable us to deliver top-notch solutions with the broadest range of connectivity in sub-6 GHz and mmWave 5G,” said Todd Gillenwater, Qorvo CTO. “GF’s 8SW technology delivers a mix of performance, integration and area advantages in FEM switches and LNAs, giving us a great platform for our world-class products.”

“As new high-speed standards, including 4G LTE and 5G, continue to grow in complexity, innovation in RF Front End radio design must continue to deliver performance commensurate with growing network, data and application demands,” said Bami Bastani, senior vice president of business units at GF. “GF continuously builds on our extensive RF SOI capabilities that are providing our clients a competitive market advantage with first time design success, optimal performance, and the shortest time to market.”

According to Mobile Experts, the mobile RF front-end market is estimated to reach $22 billion in 2022, with a CAGR of 8.3 percent. With more than 40 billion RF SOI chips shipped thru 2018, GF is uniquely positioned to deliver an expanding RF portfolio for a broad range of high-growth applications such as automotive, 5G connectivity and the Internet of Things (IoT).

“Radio complexity promises to increase for both sub-6 GHz and mmWave, driving tight integration of multiple RF functions,” said Joe Madden, Principal Analyst at Mobile Experts. “The market needs RF solutions with high efficiency and linearity performance, but also using scalable processes on large wafers. GF has established an RF SOI process that will enable longer-term market expansion.”

GF combines legacy RF expertise and the industry’s most differentiated RF technology platform spanning advanced and established technology nodes, to help clients develop 5G connectivity solutions for next-generation products.

GF will present its 5G-ready RF solutions with industry experts at MWC Barcelona on February 25 at the NEXTech Labs Theater, in the Fira Gran Via Convention Center, in Barcelona Spain. For more information, go to globalfoundries.com.

A ride on the business cycle


February 19, 2019

By Walt Custer

Global growth slows in fourth quarter

World electronic industry growth moderated (or contracted) in many sectors in late 2018.  Compare Chart 1 (3Q’18 vs.3Q’17) to Chart 2 (4Q’18 vs.4Q’17). The length and color of the bars tell the story. The semiconductor industry felt more of a fourth-quarter slowdown than the end markets.  Semiconductor-related products are typically much more volatile than the electronic equipment markets they serve.

In the third quarter of 2018 SEMI equipment shipments were up 10.6 percent and semiconductors grew 15.2 percent compared to the same quarter in 2017. By comparison, in 4Q’18 SEMI capital equipment shipments declined 1.6 percent and semiconductor shipments rose only 0.6 percent. For the month of December 2018 alone the results were even more sobering – SEMI equipment down 8.9 percent and semiconductors down 9.1 percent.

Such are the business cycles in the global electronics industry!

Electronic equipment, semiconductors and SEMI equipment – Historical growth comparisons

Chart 3 compares the quarterly growth of “end market” equipment to semiconductors and SEMI capital equipment for 2013 through 2018. Notice the much higher volatility of SEMI equipment in the peaks and troughs of the business cycle.

Leading indicators

Predicting the future performance of our very volatile electronics business cycle is an important challenge. Taiwan wafer fab sales and Purchasing Manager Indices are two useful tools.

Wafer foundries

Chart 4 compares the composite monthly sales of 14 Taiwan-listed wafer fabs to global semiconductor sales. The foundry composite predicts a further decline in chip sales short term.  Taiwan-listed companies report their monthly revenues about 10 days after month-close, so they can be a very timely indicator of industry performance.

Chart 5 compares the 3/12 growth of these wafer foundries to global semiconductor and SEMI equipment shipments. The data point to further slowing ahead.

This leading indicator methodology can be useful in forecasting individual company sales. For details contact [email protected].

Walt Custer of Custer Consulting Group is an analyst focused on the global electronics industry.

Source: SEMI Blog

Scientists at the U.S. Naval Research Laboratory (NRL) and the Air Force Research Laboratory (AFRL) have developed a way to directly write quantum light sources, which emit a single photon of light at a time, into monolayer semiconductors such as tungsten diselenide (WSe2). Single photon emitters (SPEs), or quantum emitters, are key components in a wide range of nascent quantum-based technologies, including computing, secure communications, sensing and metrology.

(a) Illustration showing an AFM tip indenting the TMD/polymer structure to introduce local strain. (b) Patterned single photon emission in WSe2 induced by AFM indentation of the letters ‘NRL’ and ‘AFRL’. (c) AFM indents produce single photon emitter ‘ornaments’ on a monolayer WSe2 ‘Christmas tree.’ Credit: US Naval Research Laboratory

In contrast with conventional light emitting diodes which emit billions of photons simultaneously to form a steady stream of light, an ideal SPE generates exactly one photon on demand, with each photon indistinguishable from another. These characteristics are essential for photon-based quantum technologies under development. In addition, such capabilities should be realized in a material platform which enables precise, repeatable placement of SPEs in a fully scalable fashion compatible with existing semiconductor chip manufacturing.

NRL scientists used an atomic force microscope (AFM) to create nanoscale depressions or indents in a single monolayer of WSe2 on a polymer film substrate. A highly localized strain field is produced around the nano-indent which creates the single photon emitter state in the WSe2. Time correlated measurements performed at AFRL of this light emission confirmed the true single photon nature of these states. These emitters are bright, producing high rates of single photons, and spectrally stable, key requirements for emerging applications.

“This quantum calligraphy allows deterministic placement and real time design of arbitrary patterns of SPEs for facile coupling with photonic waveguides, cavities and plasmonic structures,” said Berend Jonker, Ph.D., senior scientist and principal investigator. “Our results also indicate that a nano-imprinting approach will be effective in creating large arrays or patterns of quantum emitters for wafer scale manufacturing of quantum photonic systems.”

Dr. Matthew Rosenberger, lead author of the study, points out the importance of this discovery stating, “In addition to enabling versatile placement of SPEs, these results present a general methodology for imparting strain into two dimensional (2D) materials with nanometer-scale precision, providing an invaluable tool for further investigations and future applications of strain engineering of 2D devices.”

The results of this study pave the way for the use of 2D materials as solid state hosts for single photon emitters in applications relevant to the Department of Defense (DoD) mission, such as secure communications, sensing and quantum computation. Such applications enable communication between distant DoD forces which is not vulnerable to eavesdropping or decryption, an essential requirement to insure the safety of the warfighter.

Quantum computation on a chip provides onboard capability to rapidly analyze very large data sets acquired by sensor arrays, so that the entire data set does not have to be transmitted, reducing bandwidth requirements. The research results are reported in the January 2019 ACS Nano (DOI: 10.1021/acsnano.8b08730).

The research team included Dr. Matthew Rosenberger, Dr. Hsun-Jen Chuang, Dr. Saujan Sivaram, Dr. Kathleen McCreary, and Dr. Berend Jonker from the NRL Materials Science and Technology Division; and Dr. Chandriker Kavir Dass and Dr. Joshua R. Hendrickson from the AFRL Sensors Directorate. Both Rosenberger and Sivaram hold National Research Council (NRC) fellowships at NRL, and Chuang holds an American Society for Engineering Education (ASEE) fellowship at NRL.

IC Insights recently released its new Global Wafer Capacity 2019-2023 report that provides in-depth detail, analyses, and forecasts for IC industry capacity by wafer size, process geometry, region, and product type through 2023.  Figure 1 shows the world’s installed monthly wafer production capacity by geographic region (or country) as of December 2018.  Each number represents the total installed monthly capacity of fabs located in that region regardless of the headquarters location of the company that own the fab(s).  For example, the wafer capacity that South Korea-based Samsung has installed in the U.S. is counted in the North America capacity total, not in the South Korea capacity total.  The ROW “region” consists primarily of Singapore, Israel, and Malaysia, but also includes countries/regions such as Russia, Belarus, and Australia.

Figure 1

As shown, Taiwan led all regions/countries in wafer capacity with 21.8% share, a slight increase from 21.3% in 2017 (Taiwan first became the global wafer capacity leader in 2015.)  Taiwan’s capacity share was only slightly ahead of South Korea, which accounted for 21.3% of global wafer capacity in 2018, according to the Global Wafer Capacity 2019-2023 report.  TSMC in Taiwan and Samsung and SK Hynix in South Korea accounted for the vast share of wafer fab capacity in each country and were the top three capacity leaders worldwide. TSMC held 67% of Taiwan’s capacity while Samsung and SK Hynix represented 94% of the installed IC wafer capacity in South Korea at the end of 2018.

Japan remained firmly in third place with just over 16.8% of global wafer fab capacity.  Micron’s purchase of Elpida several years ago and other recent major changes in manufacturing strategies of companies in Japan, including Panasonic spinning off some of its fabs into separate companies, means that the top two companies (Toshiba Memory and Renesas) accounted for 62% of that country’s wafer fab capacity.

China showed the largest increase in global wafer capacity share in 2018, rising 1.7 percentage points from a 10.8% share in 2017 to a 12.5% share in 2018.  It nearly tied North America as the fourth-largest country/region with installed capacity.  A lot of buzz circulated about China-based startups and their new wafer fabs during 2018. Meanwhile, other global companies expanded their manufacturing presence in China last year so it would be expected that the country’s capacity share would show a significant increase.  China’s percentage gain came mostly at the expense of ROW and North America.  The share of capacity in the ROW region slipped 0.8 percentage points from 9.5% in 2017 to 8.7% in 2018. North America’s share of capacity declined 0.4 percentage points in 2018.

Silicon Catalyst, the world’s only incubator focused exclusively on accelerating solutions in silicon, today announced Soitec (Euronext Paris), a designer and manufacturer of semiconductor materials, as its first European Strategic Partner. This agreement provides Soitec access to early-stage silicon technology innovation targeting consumer, IoT and automotive segments and applications.

Silicon Catalyst is a Silicon Valley-based incubator providing silicon-focused start-ups access to a world-class network of advisors, design tools, silicon devices, networking, access to funding and marketing acumen needed to successfully launch their businesses. Soitec will engage in this start-up ecosystem to gain insight into the newest technologies and applications across high-growth markets, and to guide nascent technologies to successful market penetration.

“As a Strategic Partner of Silicon Catalyst, Soitec has a unique opportunity to grow our visibility among early-stage semiconductor companies,” said Thomas Piliszczuk, Executive VP of Global Strategy for Soitec. “Engineered substrates give semiconductor related start-ups a competitive edge in developing new high-performance, energy-efficient solutions. We are looking forward to supporting emerging trends and technology advancements with Silicon Catalyst’s distinguished portfolio of semiconductor entrepreneurs.”

“We are pleased to welcome Soitec as our first European Strategic Partner. Soitec is creating technical advances that are enabling the next generation of products across many market segments. Their SOI technology is a key ingredient to meet the diverse challenges for breakthrough differentiated semiconductor products, combining ultra-low power with excellent analog / mixed-signal performance,” stated Pete Rodriguez, CEO of Silicon Catalyst. “Joining our other Strategic Partners, Texas Instruments and ON Semiconductor, Soitec will participate in the selection of applicants to our incubator and provide guidance for our Portfolio Companies, contributing to the growth of startups that are creating the next generations of semiconductor innovation.”

Soitec’s substrate solutions, most notably silicon-on-insulator (SOI), address the full range of applications for electronics. SOI substrates are designed to support ultra-low power signal processing, wireless connectivity, power, image sensors and silicon photonics applications. Radio-frequency silicon-on-insulator (RF-SOI) substrates are the foundation of the RF incumbent technology for RF Front-End modules used in all smart phones manufactured today. RF-SOI and fully depleted SOI (FD-SOI) material enable ultra-low power connectivity, mobility, distributed AI and edge computing. Adding our new compound and piezo-electric on insulator substrates, Soitec offers a wide range of engineered substrates addressing numerous and fast growing segments like automotive, AI-IoT (AIoT) and 5G.

Global electronics manufacturing pillars Smart manufacturing, IoT and workforce development will come into sharp focus at SEMICON Southeast Asia (SEA) 2019, scheduled May 7-9, at the Malaysia International Trade and Exhibition Centre (MITEC) in Kuala Lumpur. Industry experts from around the world will gather at the region’s premiere global electronics manufacturing supply chain for critical insights into the semiconductor ecosystem, new business opportunities and collaboration. SEMICON SEA 2019 registration is now open.

Themed “Think Smart, Make Smart,” SEMICON SEA will feature three themed pavilions, five global pavilions, insightful keynote presentations and a host of technology forums to address key issues in the electronics manufacturing supply chain.

The new Workforce Pavilion addresses the critical industry shortage of skilled workers by attracting the young talent critical to sustaining industry innovation and growth. College students will meet with industry experts to explore career paths in microelectronics as tutorials enhance university students’ understanding of semiconductor manufacturing and opportunities.

The World of IoT Pavilion showcases applications and technologies enabling the IoT revolution. Companies from across the region will demonstrate technologies that enable Smart lifestyles as start-ups showcase pioneering and disruptive products and applications powered by IoT.

At the Smart Manufacturing Pavilion, the Artificial Intelligence exhibition zone highlights critical capabilities including collaborative robots, automated guided vehicles, cybersecurity and manufacturing excellence systems. The Pavilion’s Supply Chain Management zone provides insights into key elements of manufacturing excellence such as automated material handling and automated storage and retrieval. The Pavilion also features an augmented reality (AR) interactive human-machine interface to give visitors an immersive experience in smarter manufacturing processes.

SEMICON SEA 2019 will also feature an exclusive Hosted Buyer Programme. Hosted by SEMI, the customised business matching platform connects buyers in the electronics manufacturing supply chain with international solution providers for collaboration and business opportunities.

SEMICON Southeast Asia 2019 sponsors include ADLINK, Applied Materials, Cimetrix®, Evatec, GLOBALFOUNDRIES, Kanken Techno Co Ltd, Kulicke & Soffa, First Derivatives, Lam Research, Tokyo Electron and UPS.

For more information about SEMICON SEA is available on the event website.

Maryam Cope joins SIA

The Semiconductor Industry Association (SIA) announced Maryam Cope has joined the association as government affairs director. In this role, Cope will help advance the U.S. semiconductor industry’s key legislative and regulatory priorities related to semiconductor research and technology, high-skilled immigration, and product security, among others. She also will serve as a senior representative of the industry before Congress, the White House, and federal agencies.

“The U.S. semiconductor industry is at the heart of the technologies driving America’s economic strength, national security, and global technology leadership,” said John Neuffer, SIA president and CEO. “Maryam Cope’s impressive skills and extensive experience in the tech policy arena make her an ideal advocate for semiconductor industry priorities in Washington. We’re excited to welcome her to the SIA team and look forward to her help advancing initiatives that promote growth and innovation in our industry and strengthen the U.S. economy.”

Cope most recently served as managing partner of GoldsteinCope Policy Solutions, a public policy consulting firm focused on technology issues. Prior to that role, she led the creation of a tech-policy practice at the American Hotel and Lodging Association, positioning the industry as a leading voice on tech policy related to consumer issues. Cope also served as director of government affairs at the Information Technology Industry Council, helping to guide the association’s advocacy efforts on cybersecurity, encryption, and supply chain security.

Cope began her career on the staff of Sen. Kay Bailey Hutchison (R-Texas) and later served as professional staff on the U.S. Senate Committee on Commerce, Science, and Transportation, serving a key role in drafting science, innovation, and cybersecurity legislation. She holds a bachelor’s degree in biology from Northwestern University and a graduate certificate from Stanford’s Graduate School of Business Executive Program for Women Leaders.

Noting the startling advances in semiconductor technology, Intel co-founder Gordon Moore proposed that the number of transistors on a chip will double each year, an observation that has been born out since he made the claim in 1965. Still, it’s unlikely Moore could have foreseen the extent of the electronics revolution currently underway.

Today, a new breed of devices, bearing unique properties, is being developed. As ultra-miniaturization continues apace, researchers have begun to explore the intersection of physical and chemical properties occurring at the molecular scale.

Advances in this fast-paced domain could improve devices for data storage and information processing and aid in the development of molecular switches, among other innovations.

Nongjian “NJ” Tao and his collaborators recently described a series of studies into electrical conductance through single molecules. Creating electronics at this infinitesimal scale presents many challenges. In the world of the ultra-tiny, the peculiar properties of the quantum world hold sway. Here, electrons flowing as current behave like waves and are subject to a phenomenon known as quantum interference. The ability to manipulate this quantum phenomenon could help open the door to new nanoelectronic devices with unusual properties.

“We are interested in not only measuring quantum phenomena in single molecules, but also controlling them. This allows us to understand the basic charge transport in molecular systems and study new device functions,” Tao says.

Tao is the director of the Biodesign Center for Bioelectronics and Biosensors. In research appearing in the journal Nature Materials, Tao and colleagues from Japan, China and the UK outline experiments in which a single organic molecule is suspended between a pair of electrodes as a current is passed through the tiny structure.

The researchers explore the charge transport properties through the molecules. They demonstrated that a ghostly wavelike property of electrons–known as quantum interference– can be precisely modulated in two different configurations of the molecule, known as Para and Meta.

It turns out that quantum interference effects can cause substantial variation in the conductance properties of molecule-scale devices. By controlling the quantum interference, the group showed that electrical conductance of a single molecule can be fine-tuned over two orders of magnitude. Precisely and continuously controlling quantum interference is seen as a key ingredient in the future development of wide-ranging molecular-scale electronics, operating at high speed and low power.

Such single-molecule devices could potentially act as transistors, wires, rectifiers, switches or logic gates and may find their way into futuristic applications including superconducting quantum interference devices (SQUID), quantum cryptography, and quantum computing.

For the current study, the molecules–ring-shaped hydrocarbons that can appear in different configurations–were used, as they are among the simplest and most versatile candidates for modeling the behavior of molecular electronics and are ideal for observing quantum interference effects at the nanoscale.

In order to probe the way charge moves through a single molecule, so-called break junction measurements were made. The tests involve the use of a scanning tunneling microscope or STM. The molecule under study is poised between a gold substrate and gold tip of the STM device. The tip of the STM is repeatedly brought in and out of contact with the molecule, breaking and reforming the junction while the current passes through each terminal.

Thousands of conductance versus distance traces were recorded, with the particular molecular properties of the two molecules used for the experiments altering the electron flow through the junction. Molecules in the ‘Para’ configuration showed higher conductance values than molecules of the ‘Meta’ form, indicating constructive vs destructive quantum interference in the molecules.

Using a technique known as electrochemical gating, the researchers were able to continuously control the conductance over two orders of magnitude. In the past, altering quantum interference properties required modifications to the charge-carrying molecule used for the device. The current study marks the first occasion of conductance regulation in a single molecule.

As the authors note, conductance at the molecular scale is sensitively affected by quantum interference involving the electron orbitals of the molecule. Specifically, interference between the highest occupied molecular orbital or HOMO and lowest unoccupied molecular orbital or LUMO appears to be the dominant determinant of conductance in single molecules. Using an electrochemical gate voltage, quantum interference in the molecules could be delicately tuned.

The researchers were able to demonstrate good agreement between theoretical calculations and experimental results, indicating that the HOMO and LUMO contributions to the conductance were additive for Para molecules, resulting in constructive interference, and subtractive for Meta, leading to destructive interference, much as waves in water can combine to form a larger wave or cancel one another out, depending on their phase.

While previous theoretical calculations of charge transport through single molecules had been carried out, experimental verification has had to wait for a number of advances in nanotechnology, scanning probe microscopy, and methods to form electrically functional connections of molecules to metal surfaces. Now, with the ability to subtly alter conductance through the manipulation of quantum interference, the field of molecular electronics is open to a broad range of innovations.

Critical subsystems for the IC equipment market continued to grow to a new record of $11 billion in 2018. While 2019 is expected to be a downturn year, the long-term outlook remains unchanged with an average growth rate of 3 percent.

Last year may have been a new high for revenues, but it will be remembered as a year of two parts: record quarterly revenues in Q1, followed by rapidly falling orders in Q3 and Q4. Normally, this would not be a problem as suppliers are used to managing volatility in their businesses. However, encouraged by solid end market drivers and optimistic customers, the timing of this downturn was particularly bad as it coincided with the addition of significant new manufacturing capacity for critical subsystems that will be needed to supply the industry into the next decade. The resulting step change in costs against the backdrop of falling revenues has put strain on the financials of these suppliers. Although current visibility is poor, the order decline appears to be stabilising and the worst is nearly over. Revenues are expected to recover in the second half of 2019 followed by a promising outlook for the following three years.

Critical Subsystems for IC equipment history and forecast to 2022. After a pause in 2019, the trend is expected to continue to reach new industry records.

Suppliers of subsystems used in vacuum process tools, such as deposition and etch, have benefited the most from critical subsystems growth since 2012. Vacuum intensity of semiconductor processing continues to grow and in 2018 the value of vacuum process tools exceeded the value of non-vacuum process tools for the first time. This trend is expected to continue with vacuum based semiconductor process equipment accounting for over 60 percent of wafer fab equipment revenues by 2023.

In summary, 2019 is expected to be down 10 percent to 20 percent as the industry digests the recent large additions to semiconductor manufacturing capacity, followed by a new cycle starting in 2020.

Julian West is a technical and marketing analyst at VLSI Research Europe.

Source: SEMI Blog