Category Archives: Metrology

The Semiconductor Industry Association (SIA), in consultation with the Semiconductor Research Corporation (SRC), today announced the winners of its 2017 University Research Award: Dr. Gabor C. Temes, professor of electrical and computer engineering at Oregon State University (OSU), and Dr. Sanjay Banerjee, professor of electrical and computer engineering and director of the Microelectronics Research Center at The University of Texas at Austin (UT Austin). Drs. Temes and Banerjee will receive the awards in conjunction with the SIA Annual Award Dinner on Nov. 14, 2017 in San Jose, Calif.

“Research is at the root of all innovation, breathing life into new technologies that have strengthened our industry, spurred economic growth, and improved people’s lives,” said John Neuffer, president and CEO of SIA, which represents U.S. leadership in semiconductor manufacturing, design, and research. “Throughout their careers, Professors Temes and Banerjee have epitomized excellence in scientific research, leading efforts to advance semiconductor technology and strengthen America’s technological leadership. We are pleased to recognize Dr. Temes and Dr. Banerjee for their groundbreaking achievements.”

Neuffer also highlighted the importance of government investments in basic research funded through agencies like the National Science Foundation (NSF) and the National Institute of Standards and Technology (NIST) and applauded recently announced public-private initiatives at the U.S. Department of Energy and the Defense Advanced Research Projects Agency (DARPA) aimed at advancing semiconductor research. He expressed SIA’s readiness to work with the Trump Administration and Congress to ensure enactment of a fiscal year 2018 budget that prioritizes investments in basic research.

“The University Research Award was established to recognize lifetime achievements in semiconductor research by university faculty,” said Ken Hansen, president & CEO of SRC. “Drs. Temes and Banerjee have repeatedly advanced the state-of-the-art semiconductor design and technology in their respective fields. These esteemed professors’ influence on their students has produced new leaders and contributors in the semiconductor industry. The research output from the cooperative universities plays an integral role in next-generation innovations. It is with great appreciation and admiration that the entire SRC team congratulates Dr. Temes and Dr. Banerjee.”

Dr. Temes will receive the honor for excellence in design research. In particular, he will be recognized for contributions in interface electronics, including analog-to-digital and digital-to-analog converters, switched-capacitor filters and amplifiers, and sensor interfaces. Before joining OSU, Dr. Temes held academic positions at the Technical University of Budapest, Stanford University, and UCLA. He also worked in industry at Northern Electric R&D Laboratories (now Bell-Northern Research), as well as at Ampex Corp. Dr. Temes received his undergraduate education at the Technical University and Eotvos University in Budapest, Hungary, and his Ph.D. in electrical engineering from University of Ottawa, Canada.

Dr. Banerjee will receive the award for excellence in technology research. Specifically, he will be honored for contributions in MOS and nanostructure device modeling, Si-Ge-C heterostructure devices, and ultra-shallow junction technology. Before joining the Cockrell School of Engineering at UT Austin, Dr. Banerjee was at Texas Instruments from 1983-1987, where he worked on polysilicon transistors and dynamic random access trench memory cells used by Texas Instruments in the world’s first 4Megabit DRAM. He received his undergraduate degree from the Indian Institute of Technology, Kharagpur, and his M.S. and Ph.D. from the University of Illinois at Urbana-Champaign, all in electrical engineering.

When it comes to defects and contamination in the semiconductor manufacturing industry, most people tend to think of small, sub-nm defects at the transistor level. As important as those are, there are plenty of things that can go wrong and be seen at the macro level. Scratches, fingerprints, hot spots, spin defects, edge chips, poly haze, missing patterns, etc. are usually visible with the naked eye, perhaps aided by a green light or a microscope.

Fabs often do manual visual inspections, but it tends to be fairly random, only sampling a few wafers at a time. “You put some wafers on the screen, and you look sporadically at five, ten points on a few of the wafers,” notes Reiner Fenske, founder, CEO and president of Microtronic (Hawthorne, NY). “If you find something, typically it’s very difficult to feed that information forward. You might take a picture, but then where does that picture go?” It’s also difficult to compare defects, such as scratches, with previously seen defects. “How many scratches did you have last week? Does that scratch look like the one that you had last night?” Reiner asks.

An automated macro inspection tool – such as the newly released Microtronic EAGLEview 5, which will be running wafers at North Hall Booth #5467 at Semicon West this week — solves those problems, without requiring any recipes and quickly scanning every wafer in the cassette, noting and logging various defects. The EAGLEview 5 represents a big upgrade over the company’s previous offering. “There’s really a dramatic difference in terms of defect detection, defect resolution, defect sensitivity, and there’s no hit to throughput, so we’re still looking at 3,000 wafers a day, which is incredibly fast,” said Mike LaTorraca, Microtronic’s Chief Marketing Officer. Errol Akomer, Applications Director at Microtronic, adds that in addition to the higher resolution, it’s a much cleaner signal. “The signal-to- noise ratio is much better — there’s a 5X improvement in that as well,” he said. Internally developed software algorithms also results in less nuisance defects and increased defect detection.

With these new capabilities, LaTorraca said they’ve created a bridge between micro and macro, and manual and automated. “We can take manual microscope images and put them into the same software that runs on EagleView. We can start to integrate defect information and the actual defect images from the manual microscope world into our tool, and that gives the fab owners a much more unified approach, a better, more comprehensive view, to make better decisions,” he said.

EAGLEview 5 is equipped with advanced imaging technology, analytical software, robotics and a 4-cassette multi-size (100mm-300mm) wafer platform. EAGLEview ProcessGuard Client Software provides defect visualization, digital guard-banding, wafer randomization/slot positional analysis, together with integration with manual microscopes for fab-wide defect tracking and reporting.

Every wafer is automatically OCR read, imaged, 100% inspected and stored for any step throughout the manufacturing process providing a comprehensive, centralized record – or ‘waferbase’ – that is also compatible with the fab’s manual microscope inspection data providing a more integrated, wholistic view of both micro and macro defects.

EAGLEview 5 acts as a hub for defect management across the fab by integrating manual microscope inspection, high resolution EAGLEview wafer images. EAGLEview 5 replaces legacy manual/micro wafer inspection by automating and standardizing wafer inspection processes. Blindly sampling 5 sites on a wafer is no longer needed. The newly developed ProcessGuard microscope interface software records micro defect classifications. This coupled with on-board commonality analysis allows root cause to be determined for micro defects and breathes new life into existing microscope inspection strategies. EAGLEview was originally designed to be comparable to naked eye 1x green light inspection.   EAGLEview 5 shifts the line between a macro green light inspection and microscope inspection.

“You can put all the micro defects into our database in the same ways you did the macro, so you classify your macro defects and you classify all your micro defects,” Fenske explained. “Now you have a record of what, where, how many, and because we collect all the history of where the lot went to, which tools it went through, we can then use that information to do commonality studies to figure out which tool caused the problem. With the microscope, there hasn’t been that type of integration, so we can now take all of those legacy things everyone needs to use and actually give them a new life.”

By Pete Singer

At a SEMICON West press conference yesterday, SEMI released its Mid-year Forecast. Worldwide sales of new semiconductor manufacturing equipment are projected to increase 19.8 percent to total $49.4 billion in 2017, marking the first time that the semiconductor equipment market has exceeded the market high of $47.7 billion set in 2000. In 2018, 7.7 percent growth is expected, resulting in another record-breaking year ─ totaling $53.2 billion for the global semiconductor equipment market.

Figure 1 copy

“It’s really an exciting time for the industry in the terms of technology, the growth in information and data and that’s all going to require semiconductors to enable that growth,” said Dan Tracy, senior director, IR&S at SEMI.

The average of various analysts forecast the semiconductor industry in general 12% growth for the year. “It’s a very good growth year for the industry,” Tracy said. “In January, the consensus was about 5% growth for the year and with the improvement in the market and the firmer pricing for memory we see an increase in the outlook for the market.”

The SEMI Mid-year Forecast predicts wafer processing equipment is anticipated to increase 21.7 percent in 2017 to total $39.8 billion. The other front-end segment, which consists of fab facilities equipment, wafer manufacturing, and mask/reticle equipment, will increase 25.6 percent to total $2.3 billion. The assembly and packaging equipment segment is projected to grow by 12.8 percent to $3.4 billion in 2017 while semiconductor test equipment is forecast to increase by 6.4 percent, to a total of $3.9 billion this year.

“Based on the May outlook, we are looking at a record year in terms of tracking equipment spending. This is for new equipment, used equipment, and spending related to the facility that installed the equipment. It will be about a $49 billion market this year. Next year, it’s going to grow to $54 billion, so we have two years in a row of back to back record spending,” Tracy said.

In 2017, South Korea will be the largest equipment market for the first time. After maintaining the top spot for five years, Taiwan will place second, while China will come in third. All regions tracked will experience growth, with the exception of Rest of World (primarily Southeast Asia). South Korea will lead in growth with 68.7 percent, followed by Europe at 58.6 percent, and North America at 16.3 percent.

SEMI forecasts that in 2018, equipment sales in China will climb the most, 61.4 percent, to a total of $11.0 billion, following 5.9 percent growth in 2017. In 2018, South Korea, Taiwan, and China are forecast to remain the top three markets, with South Korea maintaining the top spot to total $13.4 billion. China is forecasted to become the second largest market at $11.0 billion, while equipment sales to Taiwan are expected to reach $10.9 billion.

Figure 2

Worldwide industrial semiconductor revenues grew by 3.8 percent year-over-year in 2016, to $43.5 billion, according to the latest analysis from business information provider IHS Markit (Nasdaq: INFO).

Industrial electronics equipment demand was broad-based, with continued growth in commercial and military avionics, digital signage, network video surveillance, HVAC, smart meters, traction, PV inverters, LED lighting and various medical electronics such as cardiac equipment, hearing aids and imaging systems, IHS Markit said.

The U.S. economy continued to boost industrial spending while improved economic conditions in Europe and large emerging countries like China, India and Brazil toward the end of 2016 that propelled growth. These economic conditions are expected to continue thorough 2017, according to the IHS Markit analysis.

Top 20 company ranks: Global industrial semiconductor market share

Texas Instruments (TI) maintained its position as the largest industrial semiconductor supplier in 2016 followed by Intel, STMicroelectronics, Infineon Technologies and Analog Devices. Intel surged to second place, swapping spots with Infineon, which dropped to fourth. The Intel IoT group’s double-digit revenue growth is attributed to strength in factory automation, video surveillance and medical segments.

“Toshiba, ON Semiconductor and Microchip Technology climbed into the top 10 industrial semiconductor supplier ranks in 2016,” said Robbie Galoso, principal analyst, industrial semiconductors for IHS Markit. Toshiba’s industrial market share rank jumped to number six, according to survey feedback. Toshiba’s industrial electronics revenue grew from $1.1 billion in 2015 to $1.4 billion in 2016—a 30.5 percent bounce driven by discretes, microcomponent integrated circuits (ICs), memory and logic IC solutions in manufacturing and process automation, power and energy as well as security and video surveillance.

Mergers and acquisitions make an impact

The semiconductor industry had another cycle of merger and acquisition in 2016 that affected the competitive landscape. The combined ON Semiconductor – Fairchild organization generated $1.3 billion in 2016 industrial revenues, catapulting the consolidated company into seventh place. The acquisition of Fairchild allowed On Semiconductor to leapfrog to the top ranks of the power discrete market, forecast to be one of the higher growth markets over the next five years, IHS Markit said

On Semiconductor has been a relatively small player in the power discrete segment; with the Fairchild acquisition, it now has the scale and product portfolio to compete effectively with the combined Infineon International Rectifier. On Semiconductor’s 2016 revenue grew nearly 60 percent, largely driven by analog and discretes in the manufacturing and process automation and the power and energy sectors, both of which were sizeable segments for Fairchild.

The Microchip Technology – Atmel merger generated $1.2 billion in revenues in 2016, propelling the combined company into 10th place. The acquisition of leading microcontroller supplier, Atmel, positioned Microchip as the third-ranked supplier of microcomponent ICs in the industrial market, after Intel and TI. The combination of Microchip and Atmel created an MCU powerhouse, allowing it to compete effectively against the combined NXP Freescale. Microchip Technology’s 2016 revenue growth of 53 percent was driven by microcomponent ICs in manufacturing and process automation, Atmel’s bread and butter. Toshiba, Micron and ON Semiconductor displaced Nichia, Renesas and Xilinx in the top 10 rankings.

China’s massive investments in light-emitting diode (LED) manufacturing capacity propelled Chinese firm MLS into the 2016 top 20 industrial semiconductor supplier ranks, displacing Maxim. “MLS posted revenue growth of 27 percent, to $640 million, building its share against competition including top-20 firms Nichia, Osram and Cree,” added Galoso.

Strategic acquisitions will continue to play a major role in shaping the overall semiconductor market rankings in key industrial semiconductor segments. IHS Markit expects Analog Devices to increase its lead in 2017 market shares among the top semiconductor suppliers, due to an acquisition of Linear Technology. A joint Analog Devices – Linear Technology would battle for the number four spot and impressive gains in test and measurement, manufacturing and process automation as well as medical electronics.  Among the top 10 semiconductor suppliers, eight companies achieved growth in 2016, with two companies posting double-digit growth due to mergers.

industrial semi growth

Industrial semiconductor key growth drivers

Optical semiconductors delivered solid performance, driven by continued strength in the LED lighting market. IHS Markit expects the LED segment to grow from $9.4 billion in 2016 to $14.3 billion in 2021. With many countries phasing out incandescent bulbs, mass adoption of energy-efficient LED lighting solutions will continue to gain traction as prices for LED lamps fall to affordable levels for average-income households. Discrete power transistors, thyristors, rectifiers and power diodes are expected grow from $5.7 billion in 2015 to $8 billion in 2021 due to policy shifts toward energy efficiency in the factory automation market. IHS Markit projects that the microcontrollers (MCUs) segment  will grow robustly in the long term, expanding from $4.4 billion in 2016 to $7 billion in 2021, attributing this growth to both shipments and average selling price driven by system level cost savings provided by MCUs through advances in power efficiency and integration integrated features supporting connectivity, security, sensors and HMI.

By James Amano, International Standards, SEMI

At its recent Spring 2017 meeting, the North American Regional Standards Committee (NARSC) approved formation of a Taiwan chapter of the global SEMI Standards Automation Technology Committee. Taiwan joins existing Automation Technology chapters active in Japan and Europe. The Taiwan chapter will be led by K.C. Chou (ASE), C.S. Wu (MIRDC), Jen-Hui Tsai (Mechanical & Mechatronics Systems Research Laboratories, ITRI), and Gwo-Sheng Peng (Center for Measurement Standards, ITRI).

Co-Chair Chou explains the need for the Taiwan chapter:  “SEMI has a strong reputation for successful standardization, which is why the Taiwan PCB industry has selected the global SEMI Standards platform to develop consensus on equipment communication and other manufacturing areas where standards are needed to drive down cost.”

The initial focus of the Taiwan chapter will be to develop a guide for PCB equipment communication interfaces. The guide will be based on SEMI E4: SEMI Equipment Communications Standard 1 Message Transfer (SECS-I), SEMI E5: SEMI Equipment Communications Standard 2 Message Content (SECS-II), E37: High-Speed SECS Message Services (HSMS) Generic Services, E37.1: High-Speed SECS Message Services (HSMS) Generic Services, and E30: Generic Model for Communications and Control of Manufacturing Equipment (GEM).

David Lai of the Taiwan Printed Circuit Association comments: “Without automation standards, it will be difficult for the PCB industry to achieve its ambitious performance targets. In order to fulfill the goal of PCB automation, the standard will simplify the implementation of data collection & analytics, M2M communication and datamation step by step. Therefore, I am pleased that activities in the Taiwan SEMI Standards Automation Technology TC Chapter are underway.”

While the initial chapters of the Automation Technology Committee are located in Europe, Japan, and Taiwan, all interested parties, regardless of location, are invited to join in the global effort. To get involved, please contact your local SEMI Standards staff or visit: www.semi.org/standards.

 

Each year at SEMICON West, the “Best of West” awards are presented by Solid State Technology and SEMI. More than 26,000 professionals from the electronics manufacturing supply chain attend SEMICON West and the co-located Intersolar. The “Best of West” award was established to recognize new products moving the industry forward with technological developments in the electronics supply chain.

Selected from over 600 exhibitors, SEMI announced today that the following Best of West 2017 Finalists will be displaying their products on the show floor at Moscone Center from July 11-13:

  • Mentor, a Siemens Business: Tessent® Cell-Aware Diagnosis – With FinFETs in high volume, finding systematic yield issues at the transistor level is important. The Tessent Cell-Aware Diagnosis technology significantly improves diagnosis of defects beyond the inter-connect and inside the logic cells. (Process Control, Metrology and Test Category; North Hall Booth #6661)
  • Microtronic Inc.: EAGLEview 5 Macro Defect Management Platform – EagleView 5 is the new, yield-enhancing, breakthrough macro defect inspection platform that was developed – and deployed in production — through collaboration with several leading device manufacturers who wanted to standardize and unify wafer defect management throughout their fab. Innovations include: dramatically improved defect detection; level-specific sorting; and integration with manual microscopes. (Process Control, Metrology and Test Category; North Hall Booth #5467)
  • SPTS Technologies Ltd: SentinelTM End-Point Detection System for Plasma Dicing after Grind – The Sentinel™ End-Point Detection System improves the control of plasma dicing processes and protects taped wafers for improved yields.  In addition to signaling exposure of the tape, Sentinel™ also detects loss of active cooling during the process to enable intervention to prevent yield loss. (Process Control, Metrology and Test Category; West Hall Booth #7617)
  • TEL: Stratus P500 – The Stratus P500 system electroplates panel substrates with wafer level processing precision.  As redistribution layers (RDL) reduce to widths below 10 µm line/space, and package sizes increase, conventional plating systems are challenged to meet system-on-package requirements. The P500 makes panel scale fine line RDL and feature filling applications possible. (Assembly/Packaging Solutions Category; North Hall Booth #6168)

Congratulations to each of the Finalists. The Best of West Award winner will be announced during SEMICON West (www.semiconwest.org) on Wednesday, July 12, 2017.

Industry experts answer questions about the new standard in a virtual roundtable.

In recent years, energy consumption has decreased due to several innovations that have helped to improve the energy efficiency of process tools and sub-fab equipment, but an increase in the number of processes and the growing complexity of processing at the current node has resulted in a spike in energy consumption in the fab. Approximately 43% of the energy consumed in the fab is due to the processing equipment and, of this, 20% is vacuum and abatement (8% overall).

A new standard from SEMI, E175, defines energy saving modes, which combined with the EtherCAT signaling standard, can help fabs save energy and other gas/utility costs when the tool is not processing and with no impact on subsequent wafer processing.

EtherCAT, based on industrial Ethernet, provides high- speed control and monitoring. It is the communication standard of choice for the latest semiconductor tool controllers to connect to sensors and actuators around the tool, including vacuum and abatement systems.

SEMI E175 defines how process tools communicate with sub-fab equipment, such as vacuum pumps and gas abatement systems, to reduce utility consumption at times when wafers are not being processed by the tool, and returning to full performance when the tool is again required to process wafers. It builds on SEMI E167, which defines communication between the fab host/ WIP controller and the process tools for the purpose of utility saving.

Collaboration between the E175 and EtherCAT groups has seen a harmonization of the communication standards to provide co-ordinated energy saving across devices in the fab.
We invited experts in this area to answer a few questions in a virtual roundtable. The participants are:

• GERALD SHELLEY, Senior Product Manager Communication and Control at Edwards, and the EtherCAT Chair Abatement / Roughing pump working groups, E175 task force.

• MIKE CZERNIAK, Environmental Solutions Business Development Manager at Edwardsm Co-Chair of SEMI International Standards E167 & E175, and campaigner for energy saving

• GINO CRISPIERI, Applied Materials – Past Co-chair of E175 (originally SEMATECH/ISMI, then independent consultant, prior to Applied Materials)

• MARTIN ROSTAN, Executive Director, EtherCAT Technology Group

Q: Please explain what drove the standards work on energy saving and the achievements to date.

SHELLEY: There is increased pressure on the industry to reduce energy and utility saving from both a cost and environmental standpoint. Subfab equipment is a major consumer of utilities, which is wasted when a tool is not in use. Different manufacturers have implemented energy saving solutions, with minimal direct connection to the tool. However, direct tool connection has emerged as the best way to maximize saving without any risk to wafer processing.

CZERNIAK: This work originated in the ISMI part of SEMATECH as a follow-on to generic work aimed at reducing the overall utilities footprint of modern fabs. In response to this and requests from customers, Edwards developed vacuum pumps and gas abatement systems that had energy-saving functionality. However, it soon became clear that the limitation to implementing such savings was the absence of standardised signalling between the process tool and sub-fab equipment.

CRISPIERI: A SEMATECH project around 2009 started to look into opportunities for saving energy in the semiconductor factories. At that time, suppliers of pumps and abatement systems already had started initiatives to provide their own solutions to the initiative. Since that time, the industry has adopted two new standards: SEMI E167 Specification for Equipment Energy Saving Mode Communication (between factory and semicon- ductor equipment) and SEMI E175 Specification for Subsystem Energy Saving Mode Communication (between semiconductor equipment and subsystems).

Q: Please describe how the energy saving task force was born and why you decided to get involved.

CRISPIERI: Back in 2009 while working for SEMATECH in Austin, Texas, prior to SEMATECH’s move the New York, Thomas Huang an assignee for GlobalFoundries to the EHS Program approached and asked me if I would be interested in helping him drive a standard for equipment suppliers to enable their equipment to save energy during idle times. Because of my previous experience working with equipment suppliers and developing standards for equipment and factory communication, I accepted to chair a task force to drive the equipment supplier’s new capability requirement into a standard. At first, we thought it would be an easy task and that everyone would jump to help create and approve the standard in a short amount of time because of its benefits. A two phase approach was defined to drive the standardization process and engage semiconductor and sub-fab equipment suppliers accordingly. It took almost three years to complete the Phase I (2013) and another three to complete the Phase II (2016) standards.

SHELLEY: The task force was an extension of E167 which previously defined the communication into the tool from the supervisory systems, however to achieve maximum benefit signalling to tool subsystems was key and the E175 task force was the result.

CZERNIAK: Following-on from the above, the ISMI working group became a SEMI Standards Task Force and began work at developing a standard, initially for Host to process tool (E167) and then from tool to sub-fab (E175), which I was co-chair for to ensure continuity and clear the signalling “roadblock”.

Q: How have suppliers collaborated on E175?

CRISPIERI: Compared with the suppliers who partic- ipated in SEMI E167 development, the suppliers involved in the development and approval of SEMI E175 were more committed to make it happen and helped drive the standardization process to conclusion much more efficiently. Edwards, AMAT, TEL, Hitachi- Kokusai and DAS-Europe regularly participated and provided inputs to standardize behavior and require- ments for their own equipment. We run into some difficulty getting aligned with other standard activities that were driven by SEMI’s EHS Committee because their changes affected our standardization process. I must note that the overall participation was excellent in particular from Edwards Vacuum and AMAT.

ROSTAN: Within the ETG Semiconductor Technical Working Group individual task groups already had multiple suppliers collaborating on the detail of the EtherCAT profiles for all devices, with technical support from the EtherCAT Technical Group. We were fortunate to have a delegate from Edwards in both the Semi E175 Task Force and key EtherCAT Task Groups to informally broker agreement between the teams.

SHELLEY: The suppliers were able to use their collective experience to work through a number of options to find the optimum way of controlling subfab equipment, tackling variability in wakeup time and control architec- tures between device types and equipment technology.

CZERNIAK: Suppliers, automation providers, tool OEMs and end-users have all collaborated to help develop a standard that works for everyone and aligns with earlier standards like S23.

Q: How was the EtherCAT collaboration beneficial to E175?

SHELLEY: By sharing information and understanding in real time we demonstrated the E175 concept is achievable using the favored protocol for new tool platforms and defined how it would be implemented. We co-operated to take both these standards to alignment in one simul- taneous step, saving considerable committee time on both sides that would have been necessary to resolve any divergence of the detail.

ROSTAN: By devising the implementation of E175 in parallel the EtherCAT Task Groups involved were able to feedback detailed technical proposals and show the E175 standard could be implemented relatively easily within the existing EtherCAT standards.

CRISPIERI: Participation and collaboration from the EtherCAT Working Group was critical to accelerate the implementation and adoption of the standard. Dry Contacts and EtherCAT communication protocol messages were added to two Related Information sections and included in the SEMI E175 standard at the time of its publication.

CZERNIAK: This enables a “richer” signalling environment than simple dry contacts (which are also supported) that enables even greater utility savings to be made.

Q: How has EtherCAT been able to support the require- ments of the tool and Semi E175?

CZERNIACK: By providing timing information; the longer the time the tool is inactive, the greater the savings possible.

ROSTAN: As the control network of choice for the latest semiconductor tools, EtherCAT has been ideally placed to support enhancements, such as the energy saving connectivity increasingly being requested by the fabs. In particular, it was good to see the Pump and Abatement Task Groups of the existing Semiconductor Technical Working Group formulate an E175 compliant solution within the timescales of the second release of the EtherCAT semiconductor device profiles. The EtherCAT Technology Group was also more than happy to support the publication of extracts of the EtherCAT standards being used as protocol examples in the Imple- mentation guidelines of the Semi E175 document.

SHELLEY: EtherCAT has the fast / deterministic connec- tivity and proven integration with tool controllers that allows E175 functionality to be easily added without any loss of performance. By including the requirements of Semi E175 in the EtherCAT standards, both equipment suppliers and tool vendors can establish energy saving communication quickly and easily.

CRISPIERI: The coordination between EtherCAT Working Group and the SEMI ESEC task force group was conducted by Mr. Gerald Shelley from Edwards Vacuum. With his help and leadership, we reached effortlessly agreement and acceptance for the required messages, parameters and values into the EtherCAT respective Pump and Abatement Profile documents. Havingworking usage scenarios and support from the EtherCAT Working Group has been invaluable.

Q: Why is energy saving important to the industry?

ROSTAN: In the industrial world, EtherCAT users are increasingly using our communication and control technologies to drive down energy consumption. The semiconductor industry operates in parts of the world where energy is a limited and expensive resource, whilst the latest wafer processing requires more power. The manufacturers are therefore in great need for energy saving opportunities, such as when the tool subsystems are not in use.

SHELLEY: The fabs are being squeezed by an increase in the complexity and number of processes involved in manufacturing a wafer, driving consumption up and increasing scarcity of energy supply. This is further compli- cated with associated cost and government pressure to “keep the lights on”.

CRISPIERI: It is not hard to see why is so important for device makers or the semiconductor manufacturing industry to adopt and require energy conservation capabilities in their factories. Energy consumed by many equipment components and support systems, such as pumps and abatement systems, never stop from running even when the equipment is idle and waiting for product to be delivered for processing. These components and support systems can save millions of dollars each year if their power consumption is reduced. This energy consumption reduction extends their life cycle thus reducing costs of maintenance and parts replacement. Any effort to reduce energy consumption helps lower costs and adds gains to not only the manufacturer but to those who have to generate the energy for consumption.

CZERNIACK: Cost reduction is always important, but electrical supply is limited in some areas.

ULVAC Technologies, Inc. (www.ulvac.com), a supplier of production systems, instrumentation and vacuum pumps for technology industries, has opened an office in Santa Clara, California. The Silicon Valley office location gives ULVAC West Coast customers easier access to the company’s sales and service operations. It also locates company operations closer to the Japanese headquarters and various Asian markets. The new location will include a vacuum pump and leak detector repair center to serve the regional customer base.

A new product line for ULVAC Technologies, Inc. is vacuum cooling systems for use in large-scale farms to extend the product shelf life of fresh agricultural products, flowers and meats. These systems are also used in the processed foods industry as well, to extend the life of products such as airplane meals. Local demonstration capability of the new Vacuum Cooling System is planned for the Santa Clara location. “Much of the vacuum cooling market is located in California, and the new Santa Clara office puts us in close proximity to major customers,” said Wayne Anderson, President/CEO of ULVAC Technologies, Inc.

In summary, “The Santa Clara office will serve as a business development hub within a technology-rich region, enabling us to expand our market share in semiconductor, MEMS and other high-technology industries”, he added.

A new type of scattered light measurement method will be presented, capable of measuring the full wafer surface of a 300 mm wafer in less than 30 seconds. Besides the roughness, the sensor simultaneously measures warpage, waviness and defects.

BY R. BRODMANN, B. BRODMANN, K. KONOVALENKO, and C. WIEHR, OptoSurf GmbH CHING-HSIEN HUANG, YA-LENG CHEN, Amkor Technology, Inc.

The trend towards very small and high-density electronics requires advanced processes to meet the specifications of thickness and thermal properties of the devices. This means that the processed silicon wafers have to be thinned from their original thickness of more than 700 μm down to 50 μm or less. The most common and relative low cost thinning method is back grinding by means of mechanical removal of the residual silicon. The wafer is fixed on a porous vacuum chuck with the IC (integrated circuit) side down. The rotation axis of the grinding wheel is positioned off-axis to the rotation axis of the wafer (distance is the radius of the wafer). The chuck has a slightly conical shape which deforms the wafer with a very little tilt to ensure that the grinding wheel only contacts half of the wafer during the grinding process. Due to the rotation of the chuck and simultaneously rotation of the grinding wheel a typical spiral pattern of scratches on the wafer surface is generated.

Depending on the grit size of the grinding wheel and the machining parameters as rotation speed and feed rate, this mechanical impact is responsible for the roughness, stress and induced subsurface damage. Therefore, a modern wafer grinding machine begins with a coarse grinding wheel to get a fast removal of the silicon and at the end follows a fine grinding process step with small grit size grinding wheel. This final process is absolute necessary when thinning down to 50 μm in order to minimize subsurface damage and stress. The roughness of the surface should be often in the range of Ra <10 nm or even 1 nm which is a challenge for mechanical grinding machines. Is the roughness too high or not uniformly distributed on the wafer surface, the later process steps as wire bonding, flip chip assembling, molding and testing can damage the thin chip through breakage. Besides a low surface roughness, the fracture strength of the die after dicing also depends on the orientation of the grinding marks. The correlation of die strength with roughness and surface texture is described in Ref. 1 and 2.

The interaction of the grinding wheel with its large number of single cutting edges, undergoing non-uniform wear, and the silicon surface, in particular when applying the fine grinding procedure is a rather complex process. Therefore, it is not possible to predict the quality of the entire wafer surface after grinding by means of a few small area roughness measurements with an AFM, a WLI or CFM, which is the standard today. Typically, the assessed area of one single measurement is 20 μm x 20 μm in case of an AFM and 160 μm x 160 μm with a CFM or WLI. Each measurement takes about 20 s-30 s and requires anti-vibration equipment to avoid influence from environmental mechanical noise.

In order to get information of the entire wafer surface, much faster and more robust measurement techniques are necessary. Scattered light measurement is the only method which can achieve these requirements. In the present paper, results of a new measurement machine (WaferMaster 300) are discussed which uses a scattered light sensor [4] to measure the roughness of a full 300 mm wafer surface in less than 30 s. Due to a special design of the sensor the WaferMaster can measure in addition the warpage, waviness and defects.

Measurement principle and surface characterization

Using scattered light to measure surface defects and roughness is already well known for CMP polished bare wafers, pattered wafer, hard disks, mirror surfaces and high quality fine machined automotive parts. The new type of scattered light sensor to measure back- grinding wafer is shown in FIGURE 1.

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The light source (1) illuminates nearly perpendicular the wafer surface with a 670 nm red LED spot of 0.9 mm spot size (2). This is the standard modus for fast measurement with medium lateral resolution. For high lateral resolution, another spot with 0.03 mm diameter from a laser source with the same wavelength can be switched on. The optics (3) collect the scattered light in an angle range of 32° and guides it to the linear detector (4). In contrast to other scattered light sensors this sensor measures the specular light (0°-part of the surface) together with the scattered light created by the microstructures of the surface. The advantage of this set-up is the capability to use the center of gravity of the scattered light distribution (5) as signal of the local geometrical deformation of the surface. Knowing the local slope angle of the surface and measuring continuously the surface in equal distance (created by an encoder signal) the local height can be calculated and, by integration of all angles, the entire profile of the surface.

The chuck with the wafer (6) rotates continuously during the measurement and the sensor moves linearly from the wafer edge to the center. Subsequently the sensor measures the entire wafer surface and assesses on a 300 mm wafer in the standard modus (0.9 mm spot) about 60.000 single roughness measurements in 30 s. Very important is an additional rotation (7) of the sensor because the linear detector should be always orien- tated normal to the grinding marks to get the maximum roughness value. As roughness parameter, the variance of the scattered light distribution Aq is calculated (FIGURE 2). ψi are the single scattered angles, M is the center of gravity and p(ψ) is the distribution curve.

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The advantage of Aq is the close relation with the profile slope parameter Rdq which describes surface friction very well. To follow the Semi standards in which the mean roughness Ra is established as roughness value, the Aq parameter was correlated with Ra by comparison measure- ments of different wafers with a confocal micro- scope. Due to the stochastically property of the amplitude distribution of the ground surface there is a rather good correlation between Aq and Ra even when using different grit size of the grinding wheel. But it should be taken into account that Aq is a more versatile parameter, because it reacts on both the vertical and lateral structures of a profile whereas Ra only measures the mean vertical height. This property of Aq could be interesting for characterizing die strength and should be investigated in more details in the future. In FIGURE 3 the measured correlation is shown. Several wafers were in- vestigated on different areas and ground with different grit sizes from #2000 to #8000. In addition, a CMP polished wafer with a Ra value <1nm was measured to check the accuracy of the system. In order to calculate the Ra-value the fitted correlation equation is used in the WaferMaster machine.

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As already mentioned, the scattered light sensor has a second evaluation channel to measure warpage and waviness by means of slope angle analysis. As shown in Fig. 2,the measurement beam is deflected under 2x the local slope angle θ. Therefore, the scattered light distribution is shifted on the linear detector by the angle value M. θ can be measured by using the first statistical moment of the scattered light distribution curve. Knowing the step size ∆x from an encoder and the focal length of the optics, the local height ∆y can be calculated and by sum up, the height profile can be generated.

Results

In FIGURE 4 the roughness results of 3 wafers are shown, each 300 mm size. They all were ground with the same grinding wheel (grit size #4000), but using different grinding machines. In total 40.000 measurements were taken in 25s with the 0.9mm spot. Besidesthe difference in the mean roughness value, it demonstrates in particular that the machines did leave its own characteristic pattern. The interpretation might be interesting to analyze in detail the grinding parameters as feed rate, chuck geometry, rotation speed, and others.

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An example of the simultaneous measurement of roughness, form (warp) and waviness of a 200 mm back grinding wafer can be seen in FIGURE 5. Although the grinding wheel was also grit size #4000, the mean Ra value is a bit higher. From the grinding marks pattern, it can be seen that the rotation was counterclockwise which changes the orientation from left to right. The warp is rather high because no vacuum was used. The waviness was calculated by applying a 50 waves high-pass filter. The filter is working on the circumference which means that the center area is filtered strongly than at the edge and middle area. Different filter method will be used in the future. The waviness structure follows the roughness pattern, but there are also visible some superimposed weak linear stripes from left to right. These stripes are more prominent in the following measurement (FIGURE 6), which is the result of another 200 mm wafer but ground with a #2000 grit wheel. The interesting point is not the higher roughness, which is induced by the coarser grinding wheel, but that the stripes here are more prominent than the waviness pattern of the grinding marks. The peak to valley height evaluated from A to B is more than 1 μm, which is about 10 times the profile height of the grinding marks waviness.

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The linear stripes are probably caused by the previous wire sawing process, which did not vanish after the grinding process. This could happen, because the wafer is fixed by vacuum on the chuck during grinding which makes the surface temporarily flat. When the wafer is released after the grinding process the waviness structures return. This phenomenon is investigated and described by Pei et al [3]. Furthermore, if the chuck is not cleaned very well the same characteristic can create bumps and dimples. An example of dimples is shown in FIGURE 7. The waviness map of a 300 mm polished wafer is covered with 2 larger and some smaller dimples. By using the 0.03 mm sensor spot the larger dimples where measured again with higher local resolution and represented in a 3D map. The width is in the mm range whereas the depth does not exceed 1 μm.

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Another example of high resolution measurement can be seen in Fig. 8. These measurements were done with an x/y-scanning module covering an area of 40 mm x 20 mm, also by using the small spot size of 0.03 mm. The measurements represent the waviness structures (after applying a 25 waves high pass filter). The mean roughness is 5 nm Ra. Near the center of this section another dimple is visible. The selected profile (a) shows the general waviness with a peak to valley height of about 30 nm. Repeatability measurements have shown that structures of 1 nm height could be resolved.

This makes the WaferMaster moreover interesting for the assessment of nanotopography structures to measure the planarization quality after CMP processes. Also, as can be seen in the 3D graphic, the small spot is able to detect single defects (red peak at the right side) and it has to be investigated, what the limit of lowest defects is. Certainly, it cannot compete with the much more powerful scattered light systems, especially designed for small defect detection in the front-end industry, but it is sufficient to use this function in backend processes.

Summary

A new scattered light sensor technique was presented to measure wafer surfaces, particular in the field of back grinding. The sensor combines surface roughness measurement by means of evaluating the variance (Aq) of the scattered light distribution and use additionally the method of deflectometry to assess form (warpage) and waviness. The Ra evaluation is based on correlation measurements with a confocal microscope. It could be shown that the sensitivity of roughness measurements is going down to Ra = 1 nm with an accuracy of 0.1 nm. The advantage of this technique is the speed (25 s for a whole 300 mm wafer scan) and the ruggedness against environmental mechanical noise. The capability of the full area representation of roughness, warpage and waviness opens new possibilities to characterize and improve the grinding processes as well as checking the quality from the edge area to the center completely.

Depending on the packaging design and the sensitivity of the processes which follow after the back grinding, the difference of the roughness from edge to the center and along the circumference, as well as strong warpage, waviness and defects can influence the final function and performance of the singulated chips. Die breakage e.g. directly depends on the roughness and in particular on the grinding marks orientation. Therefore, a fast and continuous measurement of the back-grinding quality can help to improve the yield in the backend process.

Acknowledgement

We would like to give special thanks to Kevin Hsu from Sanpany and Ian Chen, Honjang Global Technology for their kindly support in organizing the wafer samples and to confirm our CFM measurements with an WLI microscope.

References

[1] Michael Raj Marks, Zainuriah Hassan, Kuan Yew Cheong, Ultrathin Wafer Pre-Assembly and Assembly Process Technologies; Critical Reviews in Solid State and Materials Sciences, 40:251–290, 2015, DOI: 10.1080/10408436.2014.992585
[2] Desmond Y.R. Chong, W.E. Lee, B.K. Lim, John H.L. Pang, T.H. Low, Mechanical characterization in failure, strength of silicon dice, 2004 Inter Society Conference on Thermal Phenomena, 2004 IEEE
[3] Z.J. Pei, Graham R. Fisher, J.Liu, Grinding of Silicon Wafers: A review from historical perspectives, international Journal of Machine Tools & Manufacture, 48 (2008) 1297-1307
[4] Seewig, J., Beichert, G., Brodmann, R., Bodschwinna, H., and Wendel, M. 2009. Extraction of shape and roughness using scattering light. In Proceedings of SPIE. Optical metrology, Systems for Industrial Inspection VI 7389.

With the increasing sophistication of future vehicles, new and more advanced semiconductor technologies will be used and vehicles will become technology centers.

BY DR. JEAN-CHARLES CIGAL and GREG SHUTTLEWORTH, Linde Electronics, Taipei, Taiwan

Large efforts are being deployed in the car industry to transform the driving experience. Electrical vehicles are in vogue and governments are encouraging this market with tax incentives. Cars are becoming smarter, capable of self-diagnostics, and in the near future will be able to connect with each other. Most importantly, the implementation of safety features has greatly reduced the number of accidents and fatal- ities on the roads in the last few decades. Thanks to extensive computing power, vehicles are now nearing autonomous driving capability. This is only possible with a dramatic increase in the amount of electronic devices in new vehicles.

Recent announcements regarding acquisitions of automotive electronics specialists by semiconductor giants and strategic plans from foundries highlight the appetite from a larger spectrum of semiconductor manufacturers for this particular market. Automotive electronics has become a major player in an industrial transformation.

Automotive electronics is, however, very different from the consumer electronics market. The foremost focus is on product quality, and the highest standards are used to ensure the reliability of electronics components in vehicles. This has also an impact on the quality and supply chain of materials such as gases and chemicals used in the manufacturing of these electronics devices.

Automotive electronics market: size and trends

When you include integrated circuits, optoelectronics, sensors, and discrete devices, the automotive electronics market reached around USD 34 billion in 2016 (FIGURE 1). While this represents less than 10% of the total semiconductor market, it is predicted to be one of the fastest growing markets over the next 5 years.

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There are several explanations for such growth potential:

• The vehicle market itself is predicted to steadily grow on an average 3% in the coming 10 years and will be especially driven by China and India, although other developed countries will still experience an increase in sales.
• The semiconductor content in each car is steadily increasing and it is expected that the share of electronic systems in the vehicle cost could reach 50% of the total car cost by 2030 (FIGURE 2).

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While it is clearly challenging to describe what the driving experience will be in 10 to 15 years, some clear trends can be identified:

• Safety: The implementation of integrated vision systems, in connection with dozens of sensors and radars, will allow thorough diagnoses of surrounding areas of the vehicles. Cars will progressively be able to offer, and even take decisions, to prevent accidents.
• Fuel efficiency: The share of vehicles equipped with (hybrid) electrical engines is expected to steadily grow. For such engines, the electronics content is estimated to double in value compared to that of standard combustion engines.
• Comfort and infotainment: Vehicle drivers are constantly demanding a more enhanced driving experience. The digitalization of dashboards, the sound and video capabilities, and the customization of the driving and passenger environment should heighten the pleasure of time spent in the vehicle.

In order to coordinate all these functions, communication systems (within the vehicle, between vehicles, and between vehicles and infrastructures) are critical and large computing systems will be necessary to treat large amount of data.

Quality really makes automotive electronics different

Automotive electronics cannot be defined by specific technologies or applications. They are currently characterized by a very large portfolio of products based on mature technologies, spanning from discrete, optoelectronics, MEMS and sensors, to integrated circuits and memories.

Until now, the automotive electronics market has been the preserve of specialized semiconductor manufacturers with long experience in this field. The reason for this is the specific know-how required for quality management.

A component failure that appears harmless in a consumer product could have major safety consequences for a vehicle in motion. Furthermore, operating conditions of automotive electronics components (temperature, humidity, vibration, acceleration, etc.), their lifetime, and their spare part availability are differentiators to what is common for consumer and industrial devices (FIGURE 3).

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Currently, some of the most technologically advanced vehicles integrate around 450 semiconductor devices. As they become significantly more sophisticated, the semiconductor content will drastically increase, with many components based on the most advanced semiconductor technology available. Introducing artificial intelligence will require advanced processors capable of computing massive amount of data stored in high-performance and high capacity memory devices. This implies that not only the most advanced semicon- ductor devices will be used, but that these will need to achieve the highest degree of reliability to allow a flawless operation of predictive algorithms.

It is expected that smart vehicles capable of fully autonomous driving will employ up to 7,000 chips. In this case, even a failure rate of 1ppm, already very low by any standard today, would lead to 7 out of 1,000 cars with a safety risk. This is simply unacceptable.

The automotive electronics industry has therefore introduced quality excellence programs aimed at a zero defect target. Achieving such a goal requires a lot of effort and all constituents of the supply chain must do their part.

The automotive electronics industry is one of the most conservative in terms of change management. Longestablished standards and documentation procedures ensure traceability of design and manufacturing deviations. Qualification of novel or modified products is generally costly and lengthy. This is where material suppliers can offer competence and expertise to provide material with the highest quality standards.

What does this mean for a material supplier?

As a direct contact to its customer, the material supplier is responsible for the complete supply chain from the source of the raw material to the delivery at the customer’s gate. The material supplier is also accountable for long-term supply in accordance with the customer’s objectives.
There are essentially two fields where the material supplier can support its customer: quality and supply chain (FIGURE 4).

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Given the constraints of the automotive electronics market, material qualification must follow extensive procedures. While a high degree of material purity is a prerequisite, manufacturing processes are actually much more sensitive to deviations of material quality, as they potentially lead to process recalibration. Before qualification starts, it is critical that candidate materials are comprehensively documented. This includes the manufacturing process, the transport, the storage, and, where appropriate, the purifi- cation and transfill operations. Systematic auditing must be regularly performed according to customers’ standards. As a consequence, longer qualification times are expected. Any subsequent change in the material specification, origin, and packaging must be duly documented and is likely to be subject to a requalification process.

Material quality is obviously a critical element that must be demonstrated at all times. This commands the usage of high-quality products with a proven record. Sources already qualified for similar applica- tions are preferred to mitigate risks. These sources must show long-term business continuity planning, with process improvement programs in place. Purity levels must be carefully monitored and documented in databases. State-of-the-art analysis methods must be used. When necessary, containment measures should be deployed systematically. Given the long operating lifetime of automotive electronic compo- nents, failure can be related to a quality event that occurred a long time before.

Because of the necessary long-term availability of the electronics components and the material qualification constraints, manufacturers and suppliers will generally favor a supply contract over several years. Therefore, the source availability and the supply chain must be guaranteed accordingly.

Material suppliers are implementing improved quality management systems for their products in order to fulfill the expectations of their customers, in terms of quality monitoring and trace- ability. Certificate of analysis (COA) or consistency checks are not sufficient anymore; more data is required. In case deviation is detected, the inves- tigation and response time must be drastically reduced and allow intervention before delivery to the customer. Finally, the whole supply chain must be monitored.

Several tools must be implemented in order to maintain a reliable supply chain of high-quality products (FIGURE 5): statistical process and quality controls (SPC/SQC), as well as measurement systems analysis (MSA), allow systematic and reliable measurement and information recording for traceability. Imple- menting these tools particularly at the early stages of the supply chain allows an “in-time” response and correction before the defective material reaches the customer’s premises. Furthermore, some impurities that were ignored before may become critical, even below the current detection limits. Therefore, new measurement techniques must be continuously inves- tigated in order to enhance the detection capabilities.

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Finally, a robust supply chain must be ensured. It is imperative for a material supplier to be prepared to handle critical business functions such as customer orders, overseeing production and deliveries, and other various parts of the supply chain in any situation. Business continuity planning (BCP) was introduced several years ago in order to identify and mitigate any risk of supply chain disruption.

Analyzing the risks to business operations is fundamental to maintaining business continuity. Materials suppliers must work with manufacturers to develop a business continuity plan that facilitates the ability to continue to perform critical functions and/or provide services in the event of an unexpected interruption. The goal is to identify potential risks and weakness in current sourcing strategies and supply chain footprint and then mitigate those risks.

Because of the efforts necessary to qualify materials, second sources must be available and prepared to be shipped in case of crisis. Ideally, different sources should be qualified simultaneously to avoid any further delay in case of unplanned sourcing changes. Material suppliers with global footprint and worldwide sourcing capabilities offer additional security. Multiple shipping routes must be considered and planned in order to avoid disruption in the case, for instance, of a natural disaster or geopolitical issue affecting an entire region.

Material suppliers need to be aware and monitor regulations specific to the automotive electronics industry such as ISO/TS16949 (quality management strategy for automotive industries). This standard goes above and beyond the more familiar ISO 9001 standard, but by understanding the expectations of suppliers to the automotive industry, suppliers can ensure alignment of their quality systems and the documentation requirements for new product development or investigations into non-conformance.

Future of automotive electronics

With the increasing sophistication of future vehicles, new and more advanced semiconductor technologies will be used and vehicles will become technology centers. These technologies will allow communication and guidance computing. Most of these components (logic or memory) will be built by manufacturers relatively new to the automotive electronics world— either integrated device manufacturers (IDM) or foundries.

In order to comply with the current quality standards of the automotive industry, these manufacturers will need to adhere to more stringent standards imposed by the automobile industry. They will find support from materials suppliers like Linde that are capable of deliv- ering high-quality materials associated with a solid global supply chain who have acquired global experience in automotive electronics.

For more information about this topic or Linde Electronics, visit www.linde.com/electronics or contact Francesca Brava at [email protected].