Category Archives: Metrology

Semiconductor Research Corporation (SRC), a university-research consortium for semiconductors and related technologies, presented its highest honors Sept. 12 to professors from University of California, Berkeley and University of Minnesota at SRC’s annual TECHCON conference in Austin, Texas.

Dr. Tsu-Jae King Liu, TSMC Distinguished Professor in Microelectronics in the Department of Electrical Engineering and Computer Sciences(EECS) at UC Berkeley, received this year’s SRC Aristotle Award for outstanding teaching and a deep commitment to the educational experience of his students. With SRC support, Liu’s team at UC Berkeley has made numerous research contributions to the industry in areas including nanometer-scale semiconductor devices and technology, novel non-volatile memory devices and technology and M/NEMS technology for ultra-low-power integrated circuits.

Additionally, Dr. Chris Kim, a Professor in the Department of Electrical and Computer Engineering at Minnesota, was awarded the SRC Technical Excellence Award for his respective SRC-supported research and contributions to the industry in VLSI circuit design.

Selected by SRC member companies and SRC staff, the award-winning faculty and research teams are being recognized for their exemplary impact on semiconductor productivity through cultivation of technology and talent.

“Advanced research has been instrumental in propelling the semiconductor industry forward, and we are recognizing these valuable researchers and their teams for the critical work they have performed in helping the industry achieve technological triumphs,” said Ken Hansen, SRC CEO and President.

UC Berkeley and Minnesota research helps drive technology innovation

Dr. Liu, a member of the Kavli Energy NanoSciences Institute and Associate Dean of the College of Engineering at UC Berkeley, earned B.S., M.S. and Ph.D. degrees in Electrical Engineering from Stanford University. Prior to joining UC Berkeley, she worked as a researcher at the Xerox Palo Alto Research Center. Dr. Liu’s current research activities include nanometer-scale logic and memory devices for energy-efficient electronics, and she currently leads research on millivolt nanomechanical switches under the NSF Center for Energy Efficient Electronics Science.

“I am very fortunate to have been able to work with many outstanding students during my career at UC Berkeley, and am humbled to receive this prominent recognition for our joint achievements,” said Dr. Liu. “SRC’s support has made it possible for us to make impactful contributions to society, for which I am very grateful.”

Dr. Kim, a recipient of the National Science Foundation’s CAREER award, received his B.S and M.S. degrees from Seoul National University and a Ph.D. from Purdue University. Prior to joining the University of Minnesota, he worked at Intel Corporation that also recognized him with an Intel Ph.D. Fellowship. His current research focuses on digital, mixed-signal and memory circuit design in advanced-CMOS and beyond-CMOS technologies.

“This award recognizes our group’s invention of a new class of compact on-chip sensors called “silicon odometers” that can accurately and efficiently measure circuit aging effects,” said Dr. Kim. “Over the span of several SRC projects, our team has experimentally demonstrated more than a dozen different odometer designs in technologies ranging from 130 to 32 nanometers.”

TECHCON showcases academia’s brightest

TECHCON brings together the brightest minds in microelectronics research to exchange news about the progress of research ranging from materials to architectures created by SRC’s network of more than 100 of the top engineering universities. Students and industry leaders discuss basic research that is intended to accelerate advancements for both private and public entities.

The presentation of the Aristotle and Technical Excellence awards reflects the purpose of TECHCON, which is to enable future generations of chip technology. The Aristotle Award is given to SRC-funded university faculty that have profoundly and continuously impacted their students’ professional performances in a way that provides long-term benefit to the SRC member companies. The Technical Excellence Awards recognize researchers who have made key contributions to technologies that significantly enhance the productivity of the semiconductor industry.

More than 12,000 students have been prepared by SRC programs, professors and mentors for entry into the semiconductor business. These students provide a path for technology transfer and a source of relevantly educated technical talent for the industry.

An overview of liquid-to-liquid cooling systems and their operating principles

BY MARKO NIEMANN, Regional Sales Director, Laird Engineered Thermal Systems, Cologne, Germany

Cooling and temperature control systems are used throughout semiconductor fabrication facilities. In fabrication facilities both large and small, hundreds to thousands of cooling systems are installed and operate continuously. The processes employed are usually setup as copy-exact, which means the process systems are developed and transferred from the OEM of the process tool. These crtitical production tools used in a semiconductor fabrication facilities are required to be reliable and easy to service to deliver minimum downtime. The same is required of the cooling systems that support them. Usually the cooling systems employed have a water- cooled evaporator instead of an air-cooled evaporator. A liquid-liquid unit is quieter than a liquid to air unit because a fan is not required. Even more important, the heat can be rejected by available general facility cooling water and the heat is not rejected into the air temperature conditioned environment. These cooling systems can be placed near the tool, hidden in a false floor or on the lower level in a sub-floor. Cooling systems are built to meet SEMI S2 or F47 standards. OEM customers vary in their demand according to their unique requirements, but compliance is mandatory and sometimes OEM customers ask to get certifications for SEMI S2 or F47, which includes for example seismic “protections.” In these fabrication facilities a variety of liquid cooling systems are used including: compressor and thermoelectric based recirculating chillers.

Cooling systems

Liquid cooling systems are required to:

  • Protect the tool process against chemical reaction by avoiding an unknown Wetted-Parts-Material-Mix
  • Achieve a stable temperature, independent from facility water temperatures that can change
  • Achieve a temperature below or above the facility water temperature
  • Solve different temperature or fluid requirements at one tool with a multi-loop liquid cooling system

In semiconductor fabrication facilities, the required temperature control range varies from -80°C to +150°C. For the majority of applications, only one stable temperature set point is required. In the final chip test environment however, temperatures are required to vary in order to stress the chip. Here different temperature set points need to be reached with a single thermal management system. Due to the high-precision processes, tool manufacturers demand a very stable temperature environment. Typical of these requirements are +/-0.1K stability (e.g. for etching) to ±0.001K (e.g. for lithography) while cooling capacities can be up to several kilowatts.

In semiconductor fabrication facilities, custom multi- stage compressor based chillers are used to support cooling for very low temperature requirements. Most standard chillers utilized need some form of modification to meet semiconductor process facility requirements and may even require a water-cooled condenser. Some of the installation base also uses thermoelectric (19” rack) cooling systems, i.e. for etch applications, instead of compressor-based systems.

The cooling capacity demands and the range over which the system operates varies from a couple of hundred Watts (thermoelectric chiller and compressor based systems) to hundreds of Kilowatts (liquid-to-liquid cooling systems). The majority of the installed base uses liquid-to-liquid cooling systems that operate close to ambient and are based on a fluid-to-fluid heat-exchange principle.

The cooling systems utilize facility water to prevent heat dissipation of the cooling unit from warming the cleanroom and destabilizing the process tool’s thermal management system. These liquid-to-liquid systems keep the air quality level high by avoiding dust up introduced from the airflow of an air-to-air thermal management system. This consideration is independent of the location of the thermal management system. Due to the cyclic nature of the market, product requirements change and time to market is crucial. The cooling system solution developed is usually a custom product with a unique approach and design specific to the OEM.

Technical requirements

Cooling systems are often placed in the sub-fab, which means they are located one or two floors below the tool they are connected to. For cooling systems that use water as coolant, the height between the tool and the cooling system cannot exceed 10 meters, otherwise the height difference can cause the water to boil as the pressure is lower than the vapor pressure of water.
If the cooling system is placed at a lower level, the coolant circuit can function as a closed loop to the atmosphere. In this case, the cooling unit needs to incorporate a closed pressurized reservoir (7 PSI pressure cap) to minimize over flow conditions. The reservoir can be designed as a flow through reservoir or as a standpipe reservoir with a pressurized cap (FIGURE 1).

FIGURE 1. The reservoir can be designed as a flow through reservoir or as a standpipe reservoir with a pressurized cap.

FIGURE 1. The reservoir can be designed as a flow through reservoir or as a standpipe reservoir with a pressurized cap.

A standpipe reservoir introduces additional fluid to the liquid circuit as required, whereas a flow-through reservoir continuously exchange fluid. It is important to know that the pump simply needs to overcome the height and pressure difference one-time during start-up in a closed loop system, as the supply and return lines will equilibrate given that they have the same length and diameter.

Material compatibility

In the semiconductor process environment, copper and brass are materials with limited compatibility due to their susceptibility to galvanic corrosion. Wetted parts, which come in direct contact with the medium (liquid), are typically made of stainless steel. These parts range from the complete plumbing circuit of the cooling unit to the process loop. Stainless steel is usually used in the process loop due its resistance to galvanic corrosion or because a special fluid is used that is not compatible with PVC, copper, and brass etc. When stainless steel is required, the heat exchanger, valves and the pumps will require special consideration. Occasionally, stainless steel may require additional passivation or a limited subset of stainless steel materials may be used.

If copper or brass is used to accomodate cost considerations, the material needs to be insulated to minimize the thermal impact on the system from outside thermal sources. Special particle free insulation may be required in this instance.

Special fluids used in the semiconductor environment include: di-electric fluids (Galden, 3M Novec), which are non-conductive. Special hoses and sealings need to be used for these fluids and special attention to handling is also required. These coolants run in a closed loop as the fluid vapor pressure is relatively low compared to water.

The use of de-ionized water is common. Copper or brass can be run up to 3 MOhm-cm resistivity if the set point temperature does not exceed 30°C for extended periods of time. However to ensure long lifetimes and for higher resistivity demands, the cooling system should be equipped with a nickel brazed or complete passivated stainless steel evaporator/heat-exchanger. The pumps should be stainless steel and all component parts in contact with the fluid should be made of passivated stainless steel to prevent corrosion. This is referred to as high-purity plumbing. In addition, a DI cartridge can be equipped with an indicator light or regulated through the cooling system and the DI level will be constantly measured and monitored keeping to a preset resistivity. The DI cartridge filters the ions out of the fluid and needs to be replaced to ensure its effectiveness.

Valves

If the unit is placed below the fabrication floor, an anti- siphoning package can be used to avoid backflow of the fluid and prevent overflowing the unit in event the pump stops. The anti-siphoning package consists of a one-way check valve in the supply line and normally open solenoid valves triggered by the unit in the return line. The solenoid valve would close in case the pump stops and the one-way check valve allows for the flow in only one direction. Instead of a one-way check valve, another solenoid valve can be used, though this depends on the flow rate and size (FIGURE 2).

FIGURE 2. Instead of a one-way check valve, another solenoid valve can be used.

FIGURE 2. Instead of a one-way check valve, another solenoid valve can be used.

For a process facility, constant monitoring and control of the facility process water is required and modulating solenoid valves from Siemens or Bellimo need to be used. The valve diameter and actuating motor have to be sized correctly to achieve stable temperatures and trigger the correct switching cycles. Assuring this means the inclusion of a long- lasting actuator and facility water flowing through an acceptable pressure drop from the facility water supply and return. Sometimes three-way mixing valves are used. This allows for continuous flow into the facility water loop and adds cooling for the heat exchanger of the thermal management system when required. The constant flow back to the facility water loop avoids a water hammer in cases where it would close and reopen when cooling is required. Flow requirements can go be as high as hundreds of liters per minute.

Space consideration

Cleanroom costs can be up to $60,000 /m2, therefore the chiller footprint is important and can have a costly impact. Semiconductor cooling systems should be stackable (stacked high) and preferable narrow to maximize space and minimize their impact on costs. Therefore the design of a cooling system’s footprint needs to be closely examined. The system should also be located where it is easy to access from two sides. Routine maintenance on cooling systems is required to exchange components such as pumps, motors, valves and fans to maximize system uptime.

SEMI requirements

For a completed tool, OEMs require a SEMI S2 certification and sometimes a Semi F-47 certification in areas with high earthquake probability. As the SEMI S2 certification requires a high amount of documentation, subsystems like a cooling unit will finally be integrated into the tool. Most of the time it is sufficient to meet the intent of SEMI S2 and the OEM will do a full certification of the final tool with all sincorporated subsystems in their NRTL laboratory. Below are some items to consider when designing a cooling unit to meet SEMI S2 and F-47 standards.

SEMI S2:

  • Drip tray must be large enough to hold 110% of the volume of the largest container in the cooling product
  • EMO button and/or EMO connection
  • Seismic brackets, seismic tie downs for standalone units
  • A specific power connection setup depending on the power consumption

F-47:

  • Continue to run during a power drop for a given time and fixed reduction of power

These requirements vary from customer to customer, but to some extent the certification is known to the manufacturer of the system.

If the unit is not placed below the fabrication facility flooring, the cooling system will instead be placed in the cleanroom or a grey room. Again, requirements here can vary drastically from customer to customer. If the cooling system, sub-assembly or any component is required to be in the cleanroom, then the entire assembly including each component must be as clean as possible. This requires the entire manufacturing process to have a high level of attention to cleanliness. Debris, dust, burrs or chips occurring at every process step need to be examined and removed ideally after every fabrication step. The industry is quite sensitive to this.

After the final assembly, the cooling unit needs to go through a manual check with UV-light and wipe down for final cleaning with gloves. The unit is then double bagged and each bag needs to be labeled appropriately. There are suppliers who specialize in cleaning, to semicon- ductor standards, and this can be subcontracted. Since it contributes to the cost and lead-time, the level of detail used requires scrutiny.

Service

Selling a cooling unit into the semiconductor market requires long-term servicing agreements in the contract. If a product is qualified in one facility other facilities can take over the setup as a copy exact requirement and use the existing cooling solution. For this after-market service and support, full understanding of the end users demands is critical. Service and support needs to responsive. In the event a tool unexpectedly goes down, immediate support is required or the OEM can lose millions of dollars in revenue.

Once the tool is installed service needs to be done on-site on the same day of failure, as large cooling systems cannot be replaced easily or shipped back to manufacturer for repair. OEMs have moved away from purchasing redundant cooling systems as their processes are getting leaner and expenses are reviewed more closely. This puts the contractual emphasis on service and a global service infrastructure.

Ideally the manufacturer is aware of the service demands and support strategy of their customers. Systems today are designed to minimize the downtime and make use of hot swappable parts, such as pumps on rails or modular exchange of complete assemblies, including electrical control boxes.

Conclusion

A semiconductor fabrication facility’s unique environment makes designing and building a liquid based cooling system one of the most challenging environments. Careful consideration is required not only for component selection, but also on the overall liquid cooling system unit and its integration with a semiconductor tool. Challenges designers face include the type of heat transfer mechanism utilized on the control and heat dissipation sides, material compat- ibility, valve control, cleanliness, space optimization, semi compliance and serviceability. These are all areas in need of attention to detail to properly ensure an optimized total cost of ownership.

The global high-tech engineering and construction company M+W Group has presented current and future trends, as well as state of the art solutions, for an integrated approach to waste reduction in order to improve the sustainability of semiconductor fabs. The presentation was held at the High-Tech Facility International Forum 2016 in Taipei on 8th September in conjunction with the Semicon Taiwan trade show.

Having successfully contributed to the forum’s widely recognized meetings over the past two years M+W Group was also invited to this year’s expert meeting on high- tech facilities. There, M+W Group leading experts presented the company’s solutions for an Integrated Waste Reduction Program for Semiconductor Facilities. It was emphasized that minimization of waste produced in semiconductor wafer fabs and other high-tech facilities begins during the buildings’ design and must focus on both the construction as well as the operational phases.

Drawing on its globally recognized experience, M+W Group outlined how sustainability in a semiconductor wafer fab can best be evaluated, monitored and optimized through the application of a holistic Life Cycle Assessment (LCA) tool that provides systematic evaluation of all environmental aspects of a wafer fab during their construction, operational lifetime and decommissioning.
Herbert Blaschitz, CEO of M+W Group’s Global Business Unit Advanced Technology Facilities, said “There is an ever-increasing interest in the industry to implement fully sustainable semiconductor wafer fab solutions. We at M+W Group have broad and successful experience in this field and are proud to be at the forefront of this development.”

About the High-Tech Facility International Forum: As part of SEMICON Taiwan the High- Tech Facility International Forum 2016 focuses on cost-efficient waste reduction for sustainable facilities. The forum builds a platform for major players in the high tech facility community to discuss latest trends, challenges and outstanding solutions for the Taiwanese high-tech industry. Other members besides M+W Group include TSMC, UMC (wafer fab foundries for Integrated Circuits (IC)), Macronix, Inotera (IC memory manufacturers), AUO, Chimei Innolux (flat panel display manufacturers), ASE, SPIL (IC assembly), Epistar (LED Manufacturer) and Motech (PV module manufacturer).

SEMI today presented its industry leadership award for sustainable manufacturing to Po Wen Yen, CEO of United Microelectronics Corporation (UMC). Yen received theSEMI Sustainable Manufacturing Leadership Award – Inspired by Akira Inoue, at the Leadership Gala Dinner at SEMICON Taiwan 2016, the largest annual electronics manufacturing industry event in Taiwan.

“Yen exemplifies outstanding leadership and commitment to sustainable manufacturing issues. He approaches environmental protection in a holistic way, thinking broadly and then setting up the infrastructure to institutionalize the change while staying involved each step of the way,” said Denny McGuirk, president and CEO of SEMI. “This SEMI award for significant sustainable manufacturing achievement recognizes his status among a distinguished group of electronics industry executives.”

As CEO of UMC, Yen drove UMC to become a global leader in sustainable semiconductor manufacturing, emphasizing to his staff, customers, and suppliers, that “sustainable development is not only UMC’s vision but is also our core philosophy.” Yen also created a corporate structure where all sustainability-related goals and activities are overseen by a committee that he chairs, and then he reports these developments directly to the UMC Board of Directors.  Yen’s commitment has led to significant positive impacts on sustainable manufacturing at UMC. Yen’s specific accomplishments noted by the SEMI Award committee include:

Environmental Protection

  • Global Warming –To reduce energy use at UMC, Yen created and chairs an Energy Saving Committee, which reduced electrical power usage by 29,469 Mwh in 2014, which is the equivalent of removing 15,353 tons of CO2 from the atmosphere, and reduced natural gas usage by 11,979 Mwh, the equivalent to reducing 2,159 tons of CO2 emissions from being released into the atmosphere.
  • Water Resources – UMC maximizes water efficiency and promotes the importance of water resources and conservation. Total water recovery and reuse reached more than 180 percent of water intake for the calendar year 2015.
  • Green Manufacturing – UMC innovated corporate programs to manage hazardous substances and reduce pollution and waste during semiconductor manufacturing. UMC has a robust Hazardous Substance Process Management (HSPM) system in place that is certified by the International Electro-Technical Commission Quality Assessment System.
  • Green Buildings – UMC’s Fab 12A in the Tainan Science Park obtained both Taiwan’s Gold Certification for Green Buildings and LEED Gold Certification.
  • Green Products –To better evaluate the environmental impacts of products, UMC collaborated with the Industrial Technology Research Institute (ITRI) to implement a Life Cycle Assessment for each fab, improving its management processes and reducing resource consumption.


Community Service

  • Social Welfare – UMC encourages a culture of community volunteering with many programs. One example, “Spreading the Seeds of Hope,” has assisted over 6,000 children from disadvantaged families.
  • UMC Fire Brigade – Still the only corporation in Taiwan’s electronics industry to have its own fire department, UMC established its high-tech fire brigade more than 20 years ago. The fire brigade consists of 106 members, including 13 full-time employees and 93 voluntary firefighters.

The Sustainable Manufacturing Leadership Awardis sponsored by SEMI. The award is named after the late Akira Inoue, past president of Tokyo Electron Limited and a strong advocate of sustainable manufacturing in the semiconductor industry. Inoue also served on the SEMI Board of Directors. The award recognizes individuals in industry who have made significant leadership contributions to reduce the environmental and social impacts of semiconductor manufacturing. Past Award recipients include: Mark Durcan (CEO, Micron), TY Chiu (CEO, SMIC), Ajit Manocha (CEO, GLOBALFOUNDRIES), and Morris Chang (CEO, TSMC).

SEMICON Taiwan will be held from September 7 to 9 at Taipei Nangang Exhibition Center, Hall 1. Upbeat about the growth prospects of Taiwan’s semiconductor sector, SEMICON Taiwan 2016 features 600 exhibitors covering over 1,600 booths,and is expected to attract more than 43,000 visitors in three days.

For the sixth consecutive year, Taiwan has been the largest consumer of semiconductor equipment due to its large foundry and advanced packaging capacity, totaling $9 billion in 2016 and expecting to grow to $10 billion in 2017, accounting for a quarter of the global market. According to the latest report from IEK, the total production value of Taiwan semiconductor industry is expected to reach $2.4 trillion, performing better than the global market with a growth rate of 7.2 percent.

SEMICON Taiwan 2016 adds new pavilions including Okinawa (Japan), Philippines, Singapore, and World of IoT, in addition to pavilions on Cross-Strait, Kyushu (Japan), German, Holland High Tech and Korea, plus theme pavilions of AOI, CMP, High-Tech Facility, Materials, Precision Machinery, Secondary Market, Smart Manufacturing and Taiwan Localization. The total of nine theme pavilions and the eight country/region pavilions will offer visitors the most up-to-date options of greatest diversity.

The ascending trends of the Internet of Things and the need for smaller and more powerful mobile devices and wearables have created limitless new opportunities for semiconductor industry. In response to these trends, SEMICON Taiwan 2016 features the World of IoT pavilion showing off the latest application products, but also includes 21 forums, inviting speakers from the industry and academia, including TSMC, UMC, ASE, SPIL, Amkor, Lam Research, TEL and more, to share their exclusive perspectives on topics including memory, advanced packaging, semiconductor materials, high-tech facility, IC design, MEMS, 2.5D/3D IC technology, embedded and wafer level technology, and sustainable supply chain management. The three-day program is expected to attract over 4,000 attendances, providing an ideal platform for information exchange.

Covering the hottest topics like smart manufacturing, high-tech facility, and materials, more than 50 presentations will be given on TechXPOT stages, providing not only the latest technology updates but also great opportunities to meet potential partners.  To connect the right people and facilitate collaboration, SEMICON Taiwan organizes a series of networking events, like the Materials, High-Tech Facility, and Smart Manufacturing Get Togethers and the Supplier Search Program, creating business opportunities.

Diverse show activities and services include:

  • Live Broadcasting: HD live streaming provides first-hand highlights of forums and events from each corner on big screen and Facebook.
  • SEMICON Taiwan App: Providing the most updated exhibition information along with personal assistance functions, the SEMICON Taiwan App allows a smarter and more convenient visiting experience.
  • Jing Jing Lucky Draw: One of the most anticipated show activities will give away Ninebot One E+, Kodak Pixpro SP360, HTC Vive, Irobot Roomba, and new-years-eve hotel coupon.

Terry Tsao, SEMI Taiwan president states, “For years, SEMICON Taiwan not only has successfully connected Taiwan with the global markets, but also has bridged healthy communication between the government and the industry. Through increasing diversity, we expect to see SEMICON Taiwan continue to play an important role in facilitating collaboration and integration, helping the Taiwan semiconductor industry remain in a leading position.”

For more information, visit www.semicontaiwan.org/en

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced more than a dozen semiconductor industry icons, leaders, and founders will come together at the annual SIA Award Dinner on Thursday, Nov. 10 in San Jose to celebrate the 25th anniversary of the Robert N. Noyce Award, the industry’s highest honor. Former Noyce Award recipients who will attend the event include Dr. Craig Barrett, Dr. Morris Chang, John Daane, Federico Faggin, Ted Hoff, Dr. John E. Kelly III, Stanley Mazor, Jim Morgan, Jerry Sanders, George Scalise, Mike Splinter, Ray Stata, Rich Templeton, and Pat Weber. The evening’s program will include a conversation with former Noyce recipients about the industry’s storied past and its tremendous promise for the future.

SIA previously announced Martin van den Brink, president and chief technology officer at ASML Holding and renowned pioneer in semiconductor manufacturing technology, will receive the 2016 Noyce Award. SIA presents the Noyce Award annually in recognition of a leader who has made outstanding contributions to the semiconductor industry in technology or public policy.

“Recipients of the Noyce Award represent the finest our industry has to offer, individuals who have shaped the trajectory of semiconductor technology and spurred groundbreaking innovations,” said John Neuffer, president and CEO, Semiconductor Industry Association. “This year we are privileged to present the 2016 Noyce Award to Martin van den Brink, a man whose career accomplishments have fundamentally transformed semiconductor manufacturing, and to do so with many former Noyce winners on hand. We look forward to this unique opportunity to celebrate the semiconductor industry alongside these legends in our industry and true trailblazers of modern technology.”

For information about the SIA Award Dinner, including tickets and sponsorship opportunities, please visit www.semiconductors.org.

By Paul Trio, SEMI

Growing Demands, Constraints Continue

For many years, the ATE industry has been challenged with controlling the cost of both production and development test by implementing innovative approaches and employing clever strategies (e.g., multi-site test implementation, DFT, etc.) to make “ends” meet, so to speak.  This predicament has been a perpetual struggle, but the industry manages to soldier on. However, the demands for next-generation technology continues to introduce new challenges to the ATE realm. For example, shorter production ramp-up and higher yields result in the increasing demand for test data and information in real-time. Not only is there a need for more data quickly, but also for better test data quality. Adding to the complexity is that existing formats are typically slow/limited or even proprietary. As a result, the equipment manufacturers are burdened with supporting multiple proprietary data transport and communications systems.  This requires the use of valuable engineering resources to develop and maintain these multiple proprietary systems, whereas a single standard system would open up resources to develop new ATE features and products.

ATE Industry Alliance

These ATE industry problems are being addressed by CAST – Collaborative Alliance for Semiconductor Test – a SEMI Special Interest Group (SIG). SEMI SIGs provide a forum that fosters discussion and aligns stakeholders on industry-critical issues. CAST was formed in 2008 by semiconductor device makers and test industry suppliers to engage in and resolve common industry issues related to higher test equipment utilization, lower costs, and greater return on investment. In 2009, CAST became a SEMI Special Interest Group. Its charter includes fostering pre-competitive collaboration as well as developing and promoting standards that enable industry productivity improvements.

Figure 1 CAST Industry Stakeholders

Figure 1 CAST Industry Stakeholders

CAST members include a range of semiconductor industry leaders, ranging from automated test equipment (ATE) companies to integrated device manufacturers (IDMs) to fabless manufacturers to outsourced semiconductor assembly and test (OSAT) companies. Companies participating in CAST include: Advantest, ASE, Galaxy Semiconductor, GLOBALFOUNDRIES, Infineon, Maxim, Nvidia, Optimal+, PDF Solutions, Qualcomm, Roos Instruments, STMicroelectronics, Teradyne, Tesec, Texas Instruments, Xcerra.

CAST Structure

The CAST organization is primarily comprised of a steering committee and two working groups. The CAST Steering Committee meets quarterly to review progress on programs and identify new solutions needed by the industry. The Steering Committee is comprised of decision-makers and strategic thinkers of the participating companies mentioned above.

The current CAST working groups that are addressing data transport and control are the Rich Interactive Test Database (RITdb) WG and the Tester Event Messaging for Semiconductor (TEMS) WG.

Figure 2 SEMI CAST Working Group Focus Areas

Figure 2 SEMI CAST Working Group Focus Areas

Enabling Adaptive Test through Next Generation Standard Test Data Format

While Standard Test Data Format (STDF) is widely used in the semiconductor industry today, its current specification does not directly support the new use models in today’s test environment, such as real time or pseudo real time queries, adaptive test and streaming access. The STDF V4 record format is not extendible and the specification itself can be imprecise, such that it tends to result in many interpretations. These limitations become apparent when there is a need for more efficient and flexible format to manage “big test data.”

The RITdb group has been working on the next generation format following STDF with more flexibility in data types as well as allowing support for adaptive test. The WG aims to provide a standards-driven data environment for semiconductor test including simple standards-based data capture, transport and relationship model for eTest, probe, and final test data. Their work also aims to support equipment configuration management and operational performance data. RITdb is a SQLite database with one table, independent from an operating system. Key value store optimized for test data.

Figure 3 STDF to RITdb: PTR

Figure 3 STDF to RITdb: PTR

To date, the group has defined the mapping from STDF v4 to RITdb. A translator developed by the RITdb is also available. The overall schema has already been defined and many file translations have already been tested. Work by the RITdb group will ultimately be developed into SEMI Standards. Therefore, the group has been working on the (SEMI Standard) spec which will be in MS Word, while the database itself will be in a different format. There will be a spec editor that will help ensure the spec is used correctly. The group also plans to expand the spec beyond probe and final test. Meanwhile, the group is working on experiments related to streaming RITdb as well as work on using different extensions (e.g., tester log, streaming). Additional work will be needed on probe maps as well as on doing test cases (i.e., be able to run verifiers to validate the spec).

Improving Test Yield through Common ATE Data Communication Interface

Semiconductor test operations involved in ATE today continues to see a surging demand for data for real-time data analysis and real-time ATE input and control of the test flow to improve test yield, throughput, efficiency, and product quality.  At the same time, test equipment and test operations around the world utilize a diverse range of data formats, specifications, and interface requirements that create significant customer service and application engineering costs for ATE vendors, OSAT companies, IDM test operations, software providers, and handler equipment. A common ATE hardware and software communications interface would help reduce the cost, time and complexity of integrating ATE equipment into data-intensive test operations.

The TEMS WG was chartered to develop a standardized ATE data messaging system based on industry standard internet communication protocols between a Test Cell host and a server.  The standard will be limited to ATE data messaging, using RITdb entity types, where applicable, as well as the standard data format, and control requirements. It will have no impact on other test communication interfaces such as those involving handlers, probers, test instrumentation, and other systems covered by existing standards (e.g., SEMI E30, E4, E5, STDF, etc.).

The group will essentially develop a set of standards to define a vendor neutral way to collect test cell data. The primary spec defines the Model while a subordinate spec defines the Transport layer to maintain consistency with prior standards.

Figure 4 TEMS Focus Area

Figure 4 TEMS Focus Area

Similar to the RITdb activity, the TEMS group plans to transition its two working documents to the SEMI Standards space. As the group continues to fine-tune these documents while maintaining alignment with the RITdb WG, the preliminary SEMI Standards work (e.g., authorize formation of corresponding task force) is expected to occur by the end of the year.

Other ATE Challenges Looming

System Level Test (SLT) is an approach used to guarantee the performance of a product for a particular customer application. However, the term “System Level Test” (SLT) is frequently applied to both the testing of full systems as well as to the testing of chips to ensure their ultimate performance in target systems. This often leads to confusion.

For its 2016 workshop to be held in early November, CAST will address the topic of “Component SLT”, which is the set of application-specific functional tests that are performed prior to I.C. shipment to guarantee a chip’s quality and performance when it will be ultimately used in the final system.  It may also encompass incoming inspection of I.C. components by customers prior to assembly into systems.  Currently, component SLT tends to be implemented primarily on complex SoC devices using custom hardware and software.

Component SLT considerations:

  • Normally component SLT would be applied using a card or board based on the target system’s functional card or board — but with a socket where the IC component is temporarily placed while SLT tests are applied.
  • Component SLT is used by some chip vendors as an IC component test after conventional Final Test on ATE.
  • Potentially, component SLT could also be applied using a custom card within the ATE system that mimics system application tests.
  • Any level of standardization will ease the capital burden and operational flexibility at OSATs.
  • It will be a key requirement to be able to generate data from component SLT that can be shared backwards and forwards along the semiconductor supply chain for yield optimization and quality/reliability management.

Those looking to share their perspectives on component SLT and their vision for its future direction are invited to present at the CAST workshop. The community is particularly interested in opportunities to improve the Component SLT ​infrastructure or methods — that is, identify potential opportunities for CAST to drive improvements through pre-competitive collaboration.

Participating in SEMI CAST Special Interest Group

The SEMI CAST Special Interest Group is open to all SEMI Members. For more information or to join CAST, please contact Paul Trio at SEMI ([email protected]).

SEMI announced today that the deadline for presenters to submit an abstract for the annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) is October 17.  ASMC, which takes place May 15-18, 2017 in Saratoga Springs, New York, will feature technical presentations of more than 90+ peer-reviewed manuscripts covering critical process technologies and fab productivity. This year’s event features keynotes, a panel discussion, networking events, technical sessions on advanced semiconductor manufacturing, as well as educational tutorials.

ASMC, in its 28th year, continues to fill a critical need in our industry and provides a venue for industry professionals to network, learn and share knowledge on new and best-method semiconductor manufacturing practices and concepts.  Selected speakers have the opportunity to present in front of IC manufacturers, equipment manufacturers, materials suppliers, chief technology officers, operations managers, process engineers, product managers and academia. In addition to publication in the ASMC proceedings, select papers will be invited to participate in a special section of ASMC 2017 to be featured in IEEE Transactions on Semiconductor Manufacturing. Technical abstracts are due October 17, 2016. 

This year SEMI (www.semi.org) is including two new technology areas (3D/TSV/Interposer; Fabless Experience). SEMI is soliciting technical abstracts in these key technology areas:

  • Packaging and Through Silicon Via (3D/TSV)
  • Fabless Experience (FE)
  • Advanced Equipment Processes and Materials (AEPM)
  • Advanced Metrology
  • Advanced Patterning / Design for Manufacturability (AP/DFM)
  • Advanced Process Control (APC)
  • Contamination Free Manufacturing (CFM)
  • Defect Inspection and Reduction (DI)
  • Data Management and Data Mining Tools (DM)
  • Discrete Power Devices (DP)
  • Equipment Reliability and Productivity Enhancements (ER)
  • Enabling Technologies and Innovative Devices (ET/ID)
  • Factory Automation (FA)
  • Green Factory (GF)
  • Industrial Engineering (IE)
  • Lean Manufacturing (LM)
  • MOL and Junction Interfaces (MJ)
  • Smart Manufacturing (SM)
  • Yield Methodologies (YM)

Complete descriptions of each topic and author kit can be accessed at http://www.semi.org/en/node/38316.  If you would like to learn more about the conference and the selection process, please contact Margaret Kindling at [email protected] or call 1.202.393.5552.

Papers co-authored between device manufacturers, equipment or materials suppliers, and/or academic institutions that demonstrate innovative, practical solutions for advancing semiconductor manufacturing are highly encouraged.  To submit an abstract, click here.

Technical abstracts are due October 17, 2016.  To learn more about the SEMI Advanced Semiconductor Manufacturing Conference, visit http://www.semi.org/en/asmc2017.

Semiconductor Research Corporation (SRC), the university-research consortium for semiconductors and related technologies, today announced that NXP Semiconductors has signed an agreement to participate in multiple SRC research initiatives.

NXP is the fifth of the top 10 global semiconductor companies to become a member of SRC, and represents the third non-U.S.-headquartered SRC member company.

NXP has joined three specific SRC research thrusts including Trustworthy and Secure Semiconductors and Systems (T3S); Analog/Mixed-Signal Circuits, Systems and Devices (AMS-CSD); and Computer-Aided Design and Test (CADT).

“For SRC, the NXP membership continues and expands the durable relationship that we have enjoyed first with Motorola’s Semiconductor Products Sector that spun out to become Freescale Semiconductor, which late last year merged with NXP,” said Ken Hansen, President & CEO, SRC. “We’re excited to continue the relationship in these three areas that are critical to advancing semiconductor technology for the electronic devices of today and the future.”

“SRC is a vital element of our global university program, providing access to leading edge research at universities in the U.S. and around the world,” said Hans Dollee, Senior Director and Head of Technology Partnerships at NXP. “As the world leader in secure connectivity solutions for embedded applications, NXP is pleased to join with SRC, other member companies and partner universities to drive future technological breakthroughs and educate the next generation of innovators.”

The three SRC initiatives where NXP is participating are part of 11 research thrusts under SRC’s Global Research Collaboration (GRC) program, which funds university research focused on the constantly evolving challenges for the global semiconductor industry. For a description of each research thrust, visit https://www.src.org/program/grc.

SEMI today announced the appointment of Lung Chu as president of SEMI China effective September 1, 2016. With the recent broadening ambitions for China’s indigenous semiconductor supply chain, Lung Chu joins SEMI at a critical inflection in the China market. Chu will be instrumental in evolving and repositioning SEMI’s programs, committees, products and services in China to deliver the highest member value in the rapidly changing China semiconductor ecosystem.

With the announcement of “National Guideline for IC Industry Development” and “Made in China 2025” initiatives, the China government and industry are set to significantly improve self-sufficiency for integrated circuits (ICs) manufacturing in China by 2025. This stimulated recent China M&A activity across the semiconductor manufacturing supply chain (Spreadtrum, OmniVision, ISS, Mattson Technology, STATS ChipPAC), new investments by Chinese companies (SMIC, XMC, etc.), and investment in China factories by multinationals (Intel, Samsung, SK Hynix, TSMC, GlobalFoundries).

“With China’s rapidly changing industry, Lung Chu was chosen for his wide range of semiconductor supply chain and leadership experience to ensure SEMI China delivers the best platform and services to its members and overall industry with growth and prosperity. Lung’s personal relationships and track record with industry executives and China government officials related to the semiconductor manufacturing industry will benefit SEMI members in China and worldwide. I look forward to working with Lung to transform SEMI China into a local partner for China’s “Made in China 2025″ initiative,” said Denny McGuirk, president and CEO of SEMI.

With over 30 years of experience in semiconductor equipment, IC design, EDA/IP, semiconductor manufacturing, and system integration, Chu is uniquely suited to lead SEMI China’s growth harmonized with the SEMI 2020 Vision to connect and increase collaboration across the entire semiconductor manufacturing supply chain. Most recently, Chu spent seven years as corporate VP and president of China Operations for Global Unichip. Chu served as president of Asia Pacific at Cadence Design Systems, Magma Design Automation; and held executive management positions at KLA-Tencor, Apple Computer, and Philips Semiconductor (in Silicon Valley, California).

Chu served as president/chairman of the Chinese American Semiconductor Professional Organization (CASPA) and currently heads Shanghai and Hsinchu chapters. Chu holds a Bachelor’s degree in engineering from National Taiwan University and a Master’s degree in engineering from Case Western Reserve University. He also has MSEE and MBA degrees from California State University.