Category Archives: Metrology

IC Insights released its August Update to the 2016 McClean Report earlier this month.  This Update included an update of the semiconductor industry capital spending forecast, a look at the top-25 semiconductor suppliers for 1H16, including a forecast for the full year ranking, and Part 1 of an extensive analysis of the IC foundry industry (the ranking of the top-10 pure-play foundries is covered in this research bulletin).

In 2014, the pure-play IC foundry market registered a strong 17% increase, the largest increase since 2010 and eight points greater than the 9% increase in the worldwide IC market.  In 2015, the pure-play foundry market showed a 6% increase, about one-third the rate of growth in the previous year, but seven points higher than the total IC market growth rate of -1%.  For 2016, the pure-play foundry market is expected to increase by 9% and greatly outperform the growth rate of total IC market, which is forecast to drop by 2% this year.

Figure 1 shows that the top 10 pure-play foundries are expected to hold 95% of the total pure-play foundry market this year.  This year, the “Big 4” pure-play foundries (i.e., TSMC, GlobalFoundries, UMC, and SMIC) are forecast to hold an imposing 84% share of the total worldwide pure-play IC foundry market.  As shown, TSMC is expected to hold a 58% marketshare in 2016, down one point from 2015, as its sales are forecast to increase by $2.1 billion this year, up from a $1.5 billion increase in 2015.  GlobalFoundries, UMC, and SMIC’s combined share is expected to be 26% this year, the same as in 2015.

The two top-10 pure-play foundry companies that are forecast to display the highest growth rates this year are Israel-based TowerJazz, which is expected to edge-out Powerchip for the 5th spot in the pure-play foundry ranking in 2016, and China-based SMIC, with 30% and 27% sales increases, respectively. TowerJazz and SMIC have been on a very strong growth curve over the past few years.  TowerJazz is expected to grow from $505 million in sales in 2013 to $1,245 million in 2016 (a 35% CAGR) while SMIC is forecast to more than double its revenue from 2011 ($1,220 million) to 2016 ($2,850 million) and register a 19% CAGR over this five-year timeperiod.

Figure 1

Figure 1

Eight of the top-10 pure-play foundries listed in Figure 1 are based in the Asia-Pacific region.  Israel-based TowerJazz, and U.S.-headquartered GlobalFoundries are the only non-Asia-Pacific companies in the top-10 group.  While LFoundry is currently headquartered in Avezzano, Italy, China-based SMIC agreed in 2Q16 to purchase 70% of the company for approximately $55 million.  Since LFoundry has an installed capacity of 40K 200mm wafers/month, the acquisition of a controlling interest in the company essentially serves to immediately expand SMIC’s capacity by 13% this year.

Although SMIC is forecast to register strong sales growth of 27% this year, Chinese foundries, in total, are expected to hold only 8.2% of the pure-play foundry market in 2016, down 5.1 points from the peak share of 13.3% reached in 2006 and 2007.  IC Insights believes that the total Chinese company share of the pure-play foundry market will increase through 2020, as the China-based foundries take advantage of the huge amount of government and private investment that will be flowing into the Chinese semiconductor market infrastructure over the next five years.

Research and Markets has announced the addition of the “China Semiconductor Industry: Expansion Plans Analysis and Trends (Government Policies and Guidelines, Import and Export Impact on Trade Partners, Key Concepts, Case Study, Key Strategies Adopted, Future Plans, and Recommendation to Players)” report to their offering.

The China semiconductor industry is expected to reach $157.66 billion by 2020, at a CAGR of 12.8% between 2016 and 2020, according to this report. The major driving factors for the China semiconductor industry are the growing demand for semiconductors from major verticals and favorable government initiatives. There are also various opportunities available for the growth of the China semiconductor industry such as investment from foreign players and emerging new concepts.

Integrated Circuit (IC) is expected to hold the largest market share by 2020. The IC segment accounted for almost two-thirds of the total semiconductor industry in China in 2015.

Key topics covered:

  • Market Penetration: Comprehensive information on semiconductor products and services offered by the top players in the China semiconductor industry
  • Mergers & Acquisitions: Detailed insights on latest merger and acquisition activities and expansion in the semiconductor industry
  • Market Diversification: Exhaustive information about mergers and acquisitions, contracts, untapped geographies, recent developments, and investments in the China semiconductor industry
  • Competitive Assessment: In-depth assessment of market shares, strategies, products, and manufacturing capabilities of the leading players in the China semiconductor industry

Today, KLA-Tencor Corporation (NASDAQ:  KLAC) introduced three advanced reticle inspection systems that address 10nm and below mask technologies: the Teron 640, Teron SL655 and Reticle Decision Center (RDC). All three systems are key to enabling both current and next-generation mask designs, so that mask shops and IC fabs can more efficiently identify lithographically significant and severe yield-damaging defects.

KLA-Tencor's new reticle inspection portfolio - Teron 640, Teron SL655 and RDC - provides high performance reticle quality control for mask shops and IC fabs

KLA-Tencor’s new reticle inspection portfolio – Teron 640, Teron SL655 and RDC – provides high performance reticle quality control for mask shops and IC fabs

Utilizing Dual Imaging technology, the Teron 640 inspection system offers the sensitivity necessary for mask shops to accurately qualify advanced optical masks. The Teron SL655 inspection system introduces new STARlightGold technology, helping IC manufacturers assess incoming reticle quality, monitor reticle degradation and detect yield-critical reticle defects. The comprehensive reticle quality measurements produced by the Teron inspectors are supported by RDC, a data analysis and management system that provides a wide array of capabilities that drive automated defect disposition decisions, improve cycle time and reduce the reticle-related patterning errors that can affect yield.

“Today’s complex patterning techniques, such as spacer assist quadruple patterning (SAQP), utilize increasingly complex masks, making it crucial to qualify and maintain the reticle state to achieve optimal wafer patterning,” stated Yalin Xiong, Ph.D., vice president and general manager of the Reticle Products Division (RAPID) at KLA-Tencor. “Our team has developed state-of-the-art reticle inspection and data analysis technologies that address both current and next-generation mask designs. By tying the rich datasets generated by the Teron 640 and Teron SL655 to RDC’s evaluation capabilities, mask shops and IC fabs can more efficiently identify lithographically significant reticle defects, thereby improving mask quality control and obtaining better production patterning.”

Built on the Teron reticle inspection platform for mask shops, the Teron 640 supports inspection of advanced optical masks through the utilization of 193nm illumination with Dual Imaging mode—a combination of high resolution inspection and aerial imaging with printability-based defect dispositioning. Additionally, the Teron 640 includes enhancements to advanced die-to-database inspection algorithms to further maximize defect sensitivity as well as a new higher throughput option to decrease time to results. Multiple Teron 640 reticle inspection systems have been installed at foundry and logic manufacturers where they are being used for high-performance reticle quality control.

The Teron SL655’s core technology, STARlightGold, generates a golden reference from the mask at incoming quality check and then uses this reference for mask re-qualification inspections. The unique technology enables full-field reticle coverage and maximizes the detection of defects, such as haze growth or contamination, on a full range of mask types, including those that utilize highly complicated optical proximity techniques. The Teron SL655’s production throughput supports the fast cycle times required to qualify the increased number of reticles associated with advanced multi-patterning techniques. In addition, the Teron SL655 is EUV-compatible, allowing collaboration with IC manufacturers on in-fab EUV reticle inspection requirements. Teron SL655 systems are under evaluation with IC manufacturers for incoming reticle quality control and reticle re-qualification during chip production.

RDC is a comprehensive data analysis and storage platform that supports multiple KLA-Tencor reticle inspection and metrology platforms for mask shops and IC fabs. RDC provides several applications including Automatic Defect Classification (ADC), which runs concurrently with the inspection station, and Lithography Plane Review (LPR), which analyzes the printability of defects detected by reticle inspectors. These applications automate defect disposition decisions, resulting in improved cycle time and reduction in critical errors. RDC has been adopted by multiple foundry and memory manufacturers for data management and analysis during mask qualification.

The Teron 640, Teron SL655 and RDC join the LMS IPRO6 reticle pattern placement metrology system and K-T Analyzer advanced data analysis system in providing a comprehensive reticle qualification solution for advanced mask and IC manufacturers. The Teron 640, Teron SL655 and RDC are also critical components in KLA-Tencor’s 5D Patterning Control Solution™, which helps IC manufacturers obtain better patterning performance through process monitoring and control throughout the fab and mask shop. To maintain the high performance and productivity demanded by leading-edge mask and IC manufacturing, the Teron 640, Teron SL655 and RDC are backed by KLA-Tencor’s global comprehensive service network. More information can be found on the 5D Patterning Control Solution web page.

One of the most critical issues the United States faces today is preventing terrorists from smuggling nuclear weapons into its ports. To this end, the U.S. Security and Accountability for Every Port Act mandates that all overseas cargo containers be scanned for possible nuclear materials or weapons.

Detecting neutron signals is an effective method to identify nuclear weapons and special nuclear materials. Helium-3 gas is used within detectors deployed in ports for this purpose.

The catch? While helium-3 gas works well for neutron detection, it’s extremely rare on Earth. Intense demand for helium-3 gas detectors has nearly depleted the supply, most of which was generated during the period of nuclear weapons production during the past 50 years. It isn’t easy to reproduce, and the scarcity of helium-3 gas has caused its cost to skyrocket recently — making it impossible to deploy enough neutron detectors to fulfill the requirement to scan all incoming overseas cargo containers.

Helium-4 is a more abundant form of helium gas, which is much less expensive, but can’t be used for neutron detection because it doesn’t interact with neutrons.

A group of Texas Tech University researchers led by Professors Hongxing Jiang and Jingyu Lin report this week in Applied Physics Letters, from AIP Publishing, that they have developed an alternative material — hexagonal boron nitride semiconductors — for neutron detection. This material fulfills many key requirements for helium gas detector replacements and can serve as a low-cost alternative in the future.

The group’s concept was first proposed to the Department of Homeland Security’s Domestic Nuclear Detection Office and received funding from its Academic Research Initiative program six years ago.

By using a 43-micron-thick hexagonal boron-10 enriched nitride layer, the group created a thermal neutron detector with 51.4 percent detection efficiency, which is a record high for semiconductor thermal neutron detectors.

“Higher detection efficiency is anticipated by further increasing the material thickness and improving materials quality,” explained Professor Jiang, Nanophotonics Center and Electrical & Computer Engineering, Whitacre College of Engineering, Texas Tech University.

“Our approach of using hexagonal boron nitride semiconductors for neutron detection centers on the fact that its boron-10 isotope has a very large interaction probability with thermal neutrons,” Jiang continued. “This makes it possible to create high-efficiency neutron detectors with relatively thin hexagonal boron nitride layers. And the very large energy bandgap of this semiconductor — 6.5 eV — gives these detectors inherently low leakage current densities.”

The key significance of the group’s work? This is a completely new material and technology that offers many advantages.

“Compared to helium gas detectors, boron nitride technology improves the performance of neutron detectors in terms of efficiency, sensitivity, ruggedness, versatile form factor, compactness, lightweight, no pressurization … and it’s inexpensive,” Jiang said.

This means that the material has the potential to revolutionize neutron detector technologies.

“Beyond special nuclear materials and weapons detection, solid-state neutron detectors also have medical, health, military, environment, and industrial applications,” he added. “The material also has applications in deep ultraviolet photonics and two-dimensional heterostructures. With the successful demonstration of high-efficiency neutron detectors, we expect it to perform well for other future applications.”

The main innovation behind this new type of neutron detector was developing hexagonal boron nitride with epitaxial layers of sufficient thickness — which previously didn’t exist.

“It took our group six years to find ways to produce this new material with a sufficient thickness and crystalline quality for neutron detection,” Jiang noted.

Based on their experience working with III-nitride wide bandgap semiconductors, the group knew at the outset that producing a material with high crystalline quality would be difficult.

“It’s surprising to us that the detector performs so well, despite the fact that there’s still a little room for improvement in terms of material quality,” he said.

One of the most important impacts of the group’s work is that “this new material and its potential should begin to be recognized by the semiconductor materials and radiation detection communities,” Jiang added.

Now that the group has solved the problem of producing hexagonal boron nitride with sufficient thickness, as well as crystalline quality to enable the demonstration of neutron detectors with high efficiency, the next step is to demonstrate high-sensitivity of large-size detectors.

“These devices must be capable of detecting nuclear weapons from distances tens of meters away, which requires large-size detectors,” Jiang added. “There are technical challenges to overcome, but we’re working toward this goal.”

IC Insights will release its August Update to the 2016 McClean Report later this month. This Update includes an update of the semiconductor industry capital spending forecast, an analysis of the IC foundry industry, and a look at the top-25 semiconductor suppliers for 1H16, including a forecast for the full year ranking (the top 20 1H16 semiconductor suppliers are covered in this research bulletin).

The top-20 worldwide semiconductor (IC and O-S-D—optoelectronic, sensor, and discrete) sales ranking for 1H16 is shown in Figure 1. It includes eight suppliers headquartered in the U.S., three in Japan, three in Taiwan, three in Europe, two in South Korea, and one in Singapore, a relatively broad representation of geographic regions.

The top-20 ranking includes three pure-play foundries (TSMC, GlobalFoundries, and UMC) and six fabless companies. If the three pure-play foundries were excluded from the top-20 ranking, China-based fabless supplier HiSilicon ($1,710 million), U.S.-based IDM ON Semiconductor ($1,695 million), and U.S.-based IDM Analog Devices ($1,583 million) would have been ranked in the 18th, 19th, and 20th positions, respectively.

IC Insights includes foundries in the top-20 semiconductor supplier ranking since it has always viewed the ranking as a top supplier list, not a marketshare ranking, and realizes that in some cases the semiconductor sales are double counted. With many of our clients being vendors to the semiconductor industry (supplying equipment, chemicals, gases, etc.), excluding large IC manufacturers like the foundries would leave significant “holes” in the list of top semiconductor suppliers. As shown in the listing, the foundries and fabless companies are identified. In the April Update to The McClean Report, marketshare rankings of IC suppliers by product type were presented and foundries were excluded from these listings.

Overall, the top-20 list shown in Figure 1 is provided as a guideline to identify which companies are the leading semiconductor suppliers, whether they are IDMs, fabless companies, or foundries.

Figure 1

Figure 1

Thirteen of the top-20 companies had sales of at least $3.0 billion in 1H16.  As shown, it took $1.86 billion in sales just to make it into the 1H16 top-20 semiconductor supplier list.  There was one new entrant into the top-20 ranking in 1H16 as compared to the 2015 ranking—AMD, which replaced Japan-based Sharp.  In 2Q16, AMD registered a strong 23% increase in sales while Sharp was moving in the opposite direction logging a 13% decline in its 2Q16/1Q16 revenue.

Intel remained firmly in control of the number one spot in the top-20 ranking in 1H16.  In fact, it increased its lead over Samsung’s semiconductor sales from only 20% in 2015 to 33% in 1H16.  The biggest upward move in the ranking was made by Apple, which jumped up three positions in the 1H16 ranking as compared to 2015. Other companies that made noticeable moves up the ranking include MediaTek and the new Broadcom Ltd. (the merger of Avago and Broadcom), with each company moving up two positions.

Apple is an anomaly in the top-20 ranking with regards to major semiconductor suppliers. The company designs and uses its processors only in its own products—there are no sales of the company’s MPUs to other system makers.  IC Insights estimates that Apple’s custom ARM-based SoC processors had a “sales value” of $2.9 billion in 1H16, which placed them in the 14th position in the top-20 ranking.

In total, the top-20 semiconductor companies’ sales increased by 7% in 2Q16/1Q16.  Although, in total, the top-20 2Q16 semiconductor companies registered a 7% increase, there were seven companies that displayed a double-digit 2Q16/1Q16 jump in sales and only two that registered a decline (Intel and Renesas).

The fastest growing top-20 company in 2Q16 was Taiwan-based MediaTek, which posted a huge 32% increase in sales over 1Q16.  Although worldwide smartphone unit volume sales are forecast to increase by only 5% this year, MediaTek’s application processor shipments to the fast-growing China-based smartphone suppliers (e.g., Oppo and Vivo), helped drive its stellar 2Q16/1Q16 increase.  Overall, IC Insights expects MediaTek to register about $8.8 billion in sales in 2016, which would represent a 31% surge over the $6.7 billion in sales the company had last year.

As expected, given the possible acquisitions and mergers that could/will occur over the next few years, the top-20 ranking is likely to undergo a significant amount of upheaval as the semiconductor industry continues along its path to maturity.

A look at control of process uniformity across the wafer during plasma etch processes.

BY STEPHEN HWANG and KEREN KANARIK, Lam Research Corporation, Fremont, CA

Controlling process variability to achieve repeatable results has always been important for meeting yield and device performance requirements. With every advance in technology and change in design rule, tighter process controls are needed. In all of these cases, there are multiple sources of variability, often generalized as: within die, across wafer, wafer to wafer, and chamber to chamber. Typically, less than one third of the overall variation is allowed for variation across the wafer. For example, at the 14 nm node, the allowable variation for gate critical dimensions (CDs) is less than 2.4 nm, of which only about 0.84 nm is allowed for variation across the wafer [1]. At the 5 nm node, the allowable variation across the wafer may be less than 0.5 nm, or equivalent to two or three silicon atoms. In this article, we will discuss control of process uniformity across the wafer during plasma etch processes, its evolution in the industry, and some key focus areas.

A fundamental challenge in controlling uniformity in etch processes is the complexity of a plasma. Achieving the desired etch result (e.g., post-etch profile with selectivity to different film materials) requires managing the ratio of different ions and neutrals (e.g., Ar+, C4F8, C4F6+, O, O2+). Since the same plasma generates both types of species, the relative amount of ions to neutrals is strongly coupled. As a result, the impact of parameters typically used to control the plasma (e.g., source power and chamber pressure) are also interdependent.

Improving uniformity through design

Since the start of single-wafer processing in the early 1980s, etch chambers have been designed to produce similar plasma conditions on every location on the wafer to achieve uniform process results. This is especially challenging since there can be inherent electrical and chemical discontinuities at the edge (FIGURE 1) that affect uniformity across the wafer. Voltage gradients are created at the wafer edge due to the change from a biased surface to a grounded or floating surface. This bends the plasma sheath at the wafer edge, which changes the trajectory of ions relative to the wafer. The chemical potential discontinuity is analogous and produces concentration gradients for different species across the wafer. The gradients are caused by multiple phenomena, including variation in reactant consumption and by-products emissions rates at the center relative to the edge, as well as differences in temperature between the chamber and wafer that cause different absorption rates of chemical species.

Lam_Research_Figure_01

FIGURE 1. Discontinuities caused by the wafer edge create gradients that impact uniformity across the surface, with a significant impact at the edge.

 

Many chamber design changes have been implemented over the years to improve radial symmetry (FIGURE 2a). For example, a key hardware parameter for capacitively coupled plasma (CCP) chambers is the gap between the cathode and anode. Historically, the gap would be designed to provide the most uniform etch for a given power, pressure, and mixture of gas chemistries. On inductively coupled plasma (ICP) chambers, the gas injection location was a key design feature that would vary by process. In aluminum etch chambers, the reactant gas was delivered from a showerhead above the wafer. For silicon etch, the reactant gases were injected from around the perimeter of the wafer, but then evolved so that the gas was injected from above the center of the wafer.

FIGURE 2. Process non-uniformity has both radial and non- radial components (A). On a wafer map showing overall non- uniformity, removal of radial asymmetry allows isolating the more challenging non-radial component (B).

FIGURE 2. Process non-uniformity has both radial and non- radial components (A). On a wafer map showing overall non- uniformity, removal of radial asymmetry allows isolating the more challenging non-radial component (B).

With continuous optimization of chamber design, non-radial patterns became more apparent. On a uniformity map, the average of all the points within every radius can be taken and subtracted from the map, which leaves the more difficult asymmetric portion (FIGURE 2b). With this awareness, focus shifted toward elimi- nating asymmetries in the chamber design.

In retrospect, some of these improvements seem obvious. For instance, up to the late 1990s, it was not uncommon to have etch chambers with the turbomolecular pump located to the side of the wafer. This design created a side- to-side pattern due to the convective flow of reactants and by-products laterally across the wafer. By moving the pumps under the wafer, the flow became radially symmetric, thereby eliminating the process asymmetry.

In other cases, the source of asymmetry was more subtle. One interesting non-uniformity corrected with design was a problematic side-to-side pattern on the wafer that had a seemingly random orien- tation chamber-to-chamber. After extensive investigation to eliminate possible sources in the chamber hardware, the pattern was correlated with the Earth’s magnetic field (FIGURE 3). This example demon- strates the sensitivity of plasma processes, even to minor external influences. Although not specifically a chamber issue, the problem was corrected by applying special shielding with high magnetic-permeability materials around the chamber.

FIGURE 3. Non-uniformity induced by the Earth’s magnetic field was identified in an etch process (A). Applying magnetic shielding corrected the problem and provided uniform etch results (B).

FIGURE 3. Non-uniformity induced by the Earth’s magnetic field was identified in an etch process (A). Applying magnetic shielding corrected the problem and provided uniform etch results (B).

 

Development of process tuning capabilities

As etch processes became more varied and complex, fixed chamber designs were not sufficiently flexible to meet increasingly stringent requirements since it was not practical to provide a specific uniformity kit optimized for each etch process. Moreover, it was more challenging to achieve uniform results when etch technology transitioned from processing 200 mm to 300 mm wafers in the early 2000s. As a result, tuning capabilities were developed to deliver the uniformity control needed for a wide range of processes and larger wafer sizes.

By the early 2000s, the first uniformity tuning knobs focused on controlling the chemistry over the wafer. This was done in several ways, for example by splitting the main reactant gases into different locations or by adding tuning gases at separate locations from the main reactant gas. Since then, a number of tunable parameters have been identified for etch processes (Table 1). Ideally, orthogonal (independent) tuning knobs are used in order to match compensation as closely as possible to root causes. This provides the greatest impact on the process while limiting impact on other parameters. For example, in many dielectric etch processes, the etch rate is limited by the flux of ions from the plasma. Since gas injection doesn’t significantly impact plasma density uniformity, Lam Research developed tunable gap technology for CCP chambers to achieve uniform flux of ions across the wafer for a given set of process conditions.

Screen Shot 2016-08-12 at 1.44.51 PM

Over the years, continued development has focused on increasing the spatial resolution for better control across the wafer. For example, gas was at first only injected from the center location above the wafer. Then, additional capability was added that allowed controlling the ratio of gas directed to the center or edge of the wafer. Several years later, an additional gas injection location was added around the periphery of the wafer. To use wafer temperature as a control knob, different heating or cooling zones can be added to an electrostatic chuck (ESC), which holds the wafer. Historically, the number of temperature zones has increased from one to two (by 2002) to four radial zones (by 2006) to improve the radial uniformity of CDs. Since temperature directly affects CD uniformity (CDU), this is an effective way to tackle one of the most critical uniformity challenges.

Some of the most complex process flows today rely on these sophisticated tuning capabilities. Innovations that drive continuous scaling, such as 3D FinFET devices, advanced memory schemes, and double/quadruple patterning techniques, add to the challenge of reducing variability due to the increasing number of steps within the integration flows. Even if the uniformity for individual unit processes (including etch) are relatively good, their combined impact can be significant, and there is need to compensate somewhere in the flow.

When the uniformity profile of a step in the sequence, upstream or downstream, is known and difficult to correct, the profile of an etch step can be modified. For example, if one step is center fast, etch can compensate by being edge fast. This may sound simple, but it is actually quite difficult to achieve the level of process control that can essentially provide a mirror image of the non-uniformity in another process. Fortunately, plasma etch is one process that has matured to being capable of this level of control.

Uniformity control today

After many years of innovation, uniformity control capabilities now have the following characteristics:
• A high degree of granularity (numerous independent tuning locations across the wafer)
• Active tuning of both radial and non-radial patterns
• The ability to compensate for non-unifor- mities upstream and downstream of the etch process

One strategy being used at Lam to achieve the degree of control now needed is providing numerous independent heaters or micro-zones to control the wafer temperature, which is a critical parameter impacting CD uniformity. For example, using more than 100 localized heaters on one etch chamber delivers significantly higher spatial resolution than a system using only two or four heater zones for the entire wafer. Control of numerous individual heaters tunes both radial and non-radial patterns, whereas only center-middle-edge tuning was possible in previous generations (FIGURE 4).

FIGURE 4. Active uniformity control has evolved from limited radial tuning of large areas of the wafer to independent tuning of ever smaller regions across the wafer, enabling control of both radial and non-radial uniformity.

FIGURE 4. Active uniformity control has evolved from limited radial tuning of large areas of the wafer to independent tuning of ever smaller regions across the wafer, enabling control of both radial and non-radial uniformity.

With such high granularity, it is challenging for an individual engineer to manually determine the appropriate settings for so many heaters that will achieve a target thermal pattern across the wafer. To address this issue, advanced algorithms and controls with special temperature calibrations were developed so that the system automatically controls the heaters. Moreover, it can be difficult to determine the thermal map profile that will achieve the required process uniformity. Sophisticated software algorithms have also been developed to use process trends, chamber calibration data, and wafer metrology information to automatically create the appropriate thermal maps. With this capability, incoming non-uniformity can be reduced to less than 0.5 nm CDU after etch (FIGURE 5).

FIGURE 5. Proprietary hardware and software map incoming CDs and adjust etch process conditions in the numerous micro- zones across the wafer to compensate for variability from upstream processes.

FIGURE 5. Proprietary hardware and software map incoming CDs and adjust etch process conditions in the numerous micro- zones across the wafer to compensate for variability from upstream processes.

Future focus areas

Beyond the uniformity challenges discussed, performance at the edge of the wafer – the outer 10mm, where up to 10% of the die may be located – is an increasingly important area of future focus for improving yield. In this region, uniformity control is dominated by the electrical discontinuities at the edge of the wafer that can cause sheath bending. The impacted region of sheath bending is much smaller (~10-15 mm from the edge) compared to chemical or thermal effects (50-70 or 30-50 mm, respectively). While fixed edge hardware can be redesigned for optimal uniformity, new technologies are in development to provide in situ tunability of the sheath at the wafer edge.

Looking ahead, we can expect more types of control knobs and further granularity for finer tuning along with a greater focus on automation. Compensatory process control should continue to develop and be used as process modules become increasingly complex.

REFERENCES

1. ITRS 2013: Table FEP 12 Etch Process Technology Requirements

SEMI today announced that SEMICON Japan 2016, at Tokyo Big Sight on December 14-16, has increased exhibition and programming to keep pace with high-growth semiconductor segments in Japan. SEMICON Japan, celebrating its 40th anniversary, is the leading electronics event in Japan, with more than 700 exhibitors and 35,000 attendees.

With the world’s largest installed fab capacity of over 4.1 million (200mm equivalent) wafers per month and its diverse product mix, Japan is well-positioned to meet the increasing demands of the new world of electronics – from innovations in mobile technologies to the growing “World of IoT” devices.  SEMICON Japan 2016 connects the players and companies across the electronics manufacturing supply chain by facilitating communications and partnerships. Highlights of the exhibition area include:

  • Themain exhibit zone includes a Front-end Process zone and a Back-end/Materials Process zone.
  • “World of IoT (Internet of Things)”, a “show-within-a-show,” is where semiconductor manufacturing intersects IoT applications including wearable, health care, medical, automotive, and more. The World of IoT this year newly expands its scope to include flexible hybrid electronics (FHE), an essential enabling technology for IoT applications. Exhibiting companies include Japanese flexible and printed electronics companies from key institutes and associations for the industry area.
  • The Sustainable Manufacturing Pavilion, features solutions for the expanding IoT market driving 200mm lines; exhibitors include used and refurbished equipment, cleanroom-related, environmental safety, and more.
  • The Manufacturing Innovation Pavilion showcases innovations for leading-edge lower-cost semiconductor devices; exhibitors include advanced lithography, 2.5D/3D-IC, innovative manufacturing systems, specialty materials, OLED/LED/PE manufacturing equipment and materials.
  • Innovation Village, an interactive exposition showcase arena. Exhibitors are early-stage startups seeking funding, partners, and media exposure in the domain of electronics, materials, IT, tele-communications, bio, med-tech, environment, security or hardware.

For complete information of exhibits and programs, visit www.semiconjapan.org/en.

 

Overall revenue for the power semiconductors market globally dropped slightly in 2015, due primarily to macroeconomic factors and application-specific issues, according to a new report from IHS Markit (Nasdaq: INFO), a world leader in critical information, analytics and solutions.

The global market for power semiconductors fell 2.6 percent to $34 billion in 2015, the report says. Discrete power semiconductor product revenue declined 10.1 percent, while power module revenues decreased by 11.4 percent and power integrated-circuit (IC) revenues increased by 4.5 percent overall.

The report identifies Infineon Technologies as last year’s leading power semiconductor manufacturer, with 12 percent of the market, Texas Instruments with 11 percent and STMicroelectronics with 6 percent.

“While Texas Instruments previously led the market in 2014, the company was overtaken by Infineon Technologies in 2015, following its acquisition of International Rectifier and LS Power Semitech,” said Richard Eden, senior analyst, IHS Markit. “Infineon was the leading global supplier of both discrete power semiconductors and power modules, and the fourth-largest supplier of power management ICs. Infineon has been the leading supplier of discretes for several years, but overtook Mitsubishi Electric to lead the power module market for the first time in 2015, again, due to the International Rectifier and LS Power Semitech acquisitions.”

Figure 1

Figure 1

According to the latest Power Semiconductor Market Share Report from IHS Markit, while Infineon Technologies’ acquisition of International Rectifier was the largest acquisition last year, several other deals also changed the terrain of the power semiconductor market landscape. Key deals in 2015 included the following: MediaTek acquired RichTek; Microchip acquired Micrel; NXP Semiconductors acquired Freescale Semiconductor; NXP Semiconductors also created WeEn Semiconductors, a joint venture with Beijing JianGuang Asset Management Co. Ltd (JAC Capital); CSR Times Electric merged with China CNR Corporation to form CRRC Times Electric; and ROHM Semiconductor acquired Powervation.

“Companies were active in acquisitions for several reasons — especially the low financing cost in multiple regions of the world, which meant that borrowing rates in the United States and European Central bank were nearly zero,” said Jonathan Liao, senior analyst, IHS Markit. “In addition, the acquiring company typically increases its revenues and margins by taking the acquired company’s existing customers and sales without incurring marketing, advertising and other additional costs.”

The Power Semiconductor Market Share Report, part of the Power Semiconductor Intelligence Service from IHS Markit, offers insight into the global market for power semiconductor discretes, modules and integrated circuits. This year’s report includes Power ICs for the first time, as well as discrete power semiconductors and power semiconductor modules. For more information about purchasing IHS Markit information, contact the sales department at [email protected].

Europe’s largest electronics manufacturing exhibition SEMICON Europa (25-27 October) will take place in Grenoble at ALPEXPO. SEMICON Europa connects exhibitors and attendees to collaborate and network with over 5,800 engineers, executives, and key decision-makers. Over 70 percent of visitors make buying and investment decisions. SEMICON Europa brings Europe together for the latest advances in IC manufacturing, flexible hybrid electronics, MedTech, automotive electronics, imaging, design and fabless, Smart Manufacturing, materials, power electronics, and more.

Highlights of SEMICON Europa include:

  • Pavilions and Cluster Segments: Design and Fabless; Imaging; MEMS, Test & Packaging; Secondary Equipment; Innovation Village; and ALLE DES CLUSTERS
  • Materials Package: Includes Power Electronics Conference and 2016FLEX (flexible hybrid electronics), plus sessions on Electronics for Automotive, Advanced Materials, MedTech and Photonics
  • Smart and Sustainable Manufacturing Conference: Features Smart Manufacturing presentations from NXP Semiconductor, ST Microelectronics, Technische Universitat Dresden; plus Sustainable Manufacturing presentations from Intel, Infineon Technologies, DAS Environmental Expert GmbH, and University of Dublin

Featuring over 100 hours of technical sessions and presentations, SEMICON Europa also includes:

  • Market Briefing
  • Semiconductor Manufacturing & Technology: 20th Fab Management Forum plus sessions on Lithography, Photonics, and MEMS
  • Packaging Conference and Integrated Test sessions
  • 2016FLEX Europe: Silicon electronics and flexible systems, flexible electrical components, materials advancements, applications and new developments
  • Application and Innovation: Imaging Conference, Power Electronics Conference, and sessions on MedTech, Automotive Electronics, and “What’s Next?”

SEMICON Europa rotates between Grenoble (France) and Dresden (Germany), two of Europe’s largest epicenters. With the support of public and private stakeholders across Europe, the new SEMICON Europa enables exhibitors to reach new audiences and business partners and take full advantage of the strong microelectronic clusters in Europe. Over 350 exhibiting companies at SEMICON Europa represent the suppliers of Europe’s leading electronics companies. Learn more about exhibiting at SEMICON Europa.

SEMICON Europa 2016 sponsors include: e2v, EV Group, Lam Research, NovaCentrix, SiConnex, SPIL Siliconware, Tokyo Electron, and VAT.  To secure your exhibition space and/or to learn more about SEMICON Europa (exhibition or registration), please visit: www.semiconeuropa.org/en.

In addition to the monthly Updates, IC Insights’ subscription to The McClean Report includes three “subscriber only” webcasts.  The first of these webcasts was presented on August 3, 2016 and discussed semiconductor industry capital spending trends, the worldwide economic outlook, the semiconductor industry forecast through 2020, as well as China’s failures and successes on its path to increasing its presence in the IC industry.

In total, IC Insights forecasts that semiconductor industry capital spending will increase by only 3% this year after declining by 2% in 2015.  However, driven by the top three spenders—Samsung, TSMC, and Intel—capital spending in 2016 is expected to be heavily skewed toward the second half of this year. Figure 1 shows that the combined 2016 outlays for the top three semiconductor industry spenders are forecast to be 90% higher in the second half of this year as compared to the first half.

Figure 1

Figure 1

Combined, the “Big 3” spenders are forecast to represent 45% of the total semiconductor industry outlays this year.  An overview of each company’s actual 1H16 spending and their 2H16 spending outlook is shown below.

Samsung — The company spent only about $3.4 billion in capital expenditures in 1H16, just 31% of its forecasted $11.0 billion full-year 2016 budget.

TSMC — Its outlays in the first half of 2016 were only $3.4 billion, leaving $6.6 billion to be spent in the second half of this year in order to reach its full-year $10.0 billion budget.  This would represent a 2H16/1H16 spending increase of 92%.

Intel — Spent just $3.6 billion in 1H16.  The company needs to spend $5.9 billion in the second half of this year to reach its current $9.5 billion spending budget, which would be a 2H16/1H16 increase of 61%.

In contrast to the “Big 3” spenders, capital outlays by the rest of the semiconductor suppliers are forecast to shrink by 16% in the second half of this year as compared to the first half.  In total, 2H16 semiconductor industry capital spending is expected to be up 20% over 1H16 outlays, setting up a busy period for the semiconductor equipment suppliers through the end of this year.

Further trends and analysis relating to semiconductor capital spending through 2020 are covered in the 250-plus-page Mid-Year Update to the 2016 edition of The McClean Report.