Category Archives: Metrology

200mm fabs reawakening


July 13, 2016

By David Lammers, Contributing Editor

Buoyed by strong investments in China, 200mm wafer production is seeing a re-awakening, with overall 200mm capacity expected to match its previous 2006 peak level by 2019 (Figure 1).

Figure 1. By 2019, 200mm fab capacity should be close to the previous peak seen in 2006, according to SEMI. Several new 200mm fabs are expected to  open in China. (Source: SEMICON West presentation by Christian Dieseldorff).

Figure 1. By 2019, 200mm fab capacity should be close to the previous peak seen in 2006, according to SEMI. Several new 200mm fabs are expected to open in China. (Source: SEMICON West presentation by Christian Dieseldorff).

Speaking at a SEMI/Gartner market symposium at SEMICON West, SEMI senior analyst Christian Dieseldorff said over the next few years “we don’t see 200mm fabs closing, in fact we see new ones beginning operation. To me, that is just amazing.”

The numbers back up the rebound. Excluding LEDs, the installed capacity of 200mm fabs will reach about 5.3 million wafers per month (wspm) in 2018, almost matching the 2007 peak of 5.6 million wspm. As shown in Figure 1, By 2019 as new 200mm fabs start up in China, 200mm wafer production will surge beyond the previous 2007 peak, a surprising achievement for a wafer generation that began more than 25 years ago. Figure 2 shows how capacity, which held steady for years, is now on the increase.

Figure 2. 200mm fab capacity, which remained relatively constant for years, is now increasing.

Figure 2. 200mm fab capacity, which remained relatively constant for years, is now increasing.

Case in point: On the opening day of Semicon West, Beijing Yangdong Micro announced a new OLED 200mm fab that will be opening in the second half of 2018 to make OLED drivers, according to Dieseldorff.

Over the past few years, Japan-based companies have closed 10 200mm fabs, mostly outdated logic facilities, while expanding production of discrete power and analog ICs on 200mm wafers. But with China opening several new 200mm fabs and the expansions of existing 200mm fabs worldwide, SEMI sees an additional 274,000 wafer starts per month of 200mm production over the 2015-2018 period, adding expansions and additional fabs, and subtracting closed facilities.

“One message from our research is that we believe the existing 200mm fabs are full. Companies have done what they can to expand and move tools around, and that is coming to an end,” he said. SEMI reckons that 19 new 200mm fabs have been built since 2010, at least six of them in China.

SEMI’s Christian Dieseldorff.

SEMI’s Christian Dieseldorff.

Dieseldorff touched on a vexing challenge to the 200mm expansion: the availability of 200mm equipment. “People have problems getting 200mm equipment, used and even new. The (200mm) market is not well understood by some companies,” he said. With a shortage of used 200mm equipment likely to continue, the major equipment companies are building new 200mm tools, part of what Dieseldorff described as an “awakening” of 200mm manufacturing.

 

China is serious

Sam Wang, a research vice president at Gartner who focuses on the foundry sector, voiced several concerns related to 200mm production at the SEMI/Gartner symposium. While SMIC (which has a mix of 200mm and 300mm fabs) has seen consistently healthy annual growth, the five second-tier Chinese foundries – — Shanghai Huahong Grace, CSMC, HuaLi, XMC, and ASMC — saw declining revenues year-over-year in 2015. Overall, China-based foundries accounted for just 7.8 percent of total foundry capacity last year, and the overall growth rate by Chinese foundries “is way below the expectations of the Chinese government,” Wang said.

The challenge, he said, is for China’s foundries which rely largely on legacy production to grow revenues in a competitive market. And things are not getting any easier. While production of has shown overall strength in units, Wang cautioned that price pressures are growing for many of the ICs made on 200mm wafers. Fingerprint sensor ICs, for example, have dropped in price by 30 percent recently. Moreover, “the installation of legacy nodes in 300mm fabs by large foundries has caused concern to foundries who depend solely on 200 mm.”

But Wang emphasized China’s determination to expand its semiconductor production. “China is really serious. Believe it,” he said.

New markets, new demand

The smart phone revolution has energized 200mm production, adding to a growing appetite for MEMS sensors, analog, and power ICs. Going forward, the Internet of Things, new medical devices, and flexible and wearable products may drive new demand, speakers said at the symposium.

Jason Marsh, director of technology for the government and industry-backed NextFlex R&D alliance based in San Jose, Calif., said many companies see “real potential” in making products which have “an unobtrusive form factor that doesn’t alter the physical environment.” He cited one application: a monitoring device worn by hospital patients that would reduce the occurrence of bed sores. These types of devices can be made with “comparatively yesteryear (semiconductor) technology” but require new packaging and system-level expertise.

Legacy devices made on 200mm wafers could get a boost from the increasing ability to combine several chips made with different technologies into fan out chip scale packages (FO CSPs). Bill Chen, a senior advisor at ASE Group, showed several examples of FO CSPs which combine legacy ICs with processors made on leading-edge nodes. “When we started this wafer-level development around 2000 we thought it would be a niche. But now about 30 percent of the ICs used in smart phones are in wafer-level CSPs. It just took a lot of time for the market forces to come along.”

More coverage from this year’s SEMICON West can be found here.

By Pete Singer, Editor-in-Chief

On Monday, imec – the Leuven Belgium-based research consortium – hosted its annual imec Technology Forum (ITF) USA, a half-day conference at the Marriott Marquis. With the theme ‘Towards the Ultimate System’, imec’s speakers and industrial keynote speakers looked at the co-optimization of design and new technology, and how technology innovation can deliver the right building blocks to build these systems.

Delivering the keynote address at the event was Luc Van den hove, President and CEO of imec. He talked about how the world was in the middle of a decade of digital disruption brought about by integrated circuit innovation. He then provided an outlook of how the industry could continue to stay on the path defined by Moore’s Law by moving to nanowires and the 3rd dimension.

Luc van den hove, president and CEO of imec, tipped his hat to Gordon Moore, showing a short video clip and describing a future where Moore’s Law will live on through 3D integration.

Luc van den hove, president and CEO of imec, tipped his hat to Gordon Moore, showing a short video clip and describing a future where Moore’s Law will live on through 3D integration.

Van den hove noted what he said were obvious example of disruption today: Uber, the world’s largest taxi company that doesn’t own any taxis. Airbnb, the world’s largest accommodation provider that doesn’t own any real estate. Facebook, the world’s largest media provider, that doesn’t generate any media content.

“These are just a few examples, but we will see this kind of disruption everywhere, in every market and every segment,” he said. “Companies will have to adapt. They will have to reposition themselves in the value chain and come up with new business models. This is just the beginning.”

What’s made this disruption possible is IC technology and ubiquitous mobile computing. What’s been particularly beneficial over the last 50 years is that, in addition to the increased functionality that comes with scaling, there were advantages of faster operation at lower power. “This combination of effects that occurs simultaneously with scaling has resulted in the phenomenal evolution,” he said.
After a short video clip of Gordon Moore talking about the benefits of microprocessors, Van den hove give a realistic view of the future.

“Today, there is a lot of debate about the continuity of Moore’s Law. Yes, we’re faced with several tradeoffs. It’s getting harder and harder (to scale) and when we scale down our transistors we do not automatically the performance improvement that we used to with previous generations,” he said. “But we are sure there are sufficient solutions out there that will allow us to continue Moore’s legacy for several more decades. I am convinced that scaling will not only continue, it has to continue. If you want to enable the IoT wave, we will have to succeed in extending Moore’s law to generate the required compute power and storage capacity.”

Van den hove added that Moore’s Law is on the verge of morphing. “We will need other techniques in order to realize this complexity increase,” he said. “We will continue 2D scaling. It will evolve from the FinFET that is in mass production today towards horizontal nanowires, towards most likely vertical nanowires. This will bring us to at least the 3nm generation if not one or two generations more. This will keep us busy for the next 10-15 years.”

He stood by his past comments on the production-worth status of EUV. “To enable this, we will need a cost-effective lithography. We absolutely need EUV lithography to make this happen. I’m sure, based on the progress I’ve seen over the last 12 months, that EUV is ready to enter manufacturing. But we have to be realistic. Eventually, 2D scaling will slow down. I’m not saying it’s going to stop. But it’s getting harder and harder and hence it will require more time to transition from one geometry-based node to the next geometry node. We will need other ways to compensate for this gradual slowdown. One of the obvious ways to do so is to start using more extensively the third dimension, as the memory guys have started to do already,” he said.

Van den hove presented a future where devices are stacked on top of one another like Lego blocks. “Once we are using these vertical nanowires, it’s not so difficult to imagine that we may be stacking those transistors on top of each other – stack an n-FET on top of a p-FET and realize an SRAM cell. It’s obvious that such a 3D version of an SRAM cell has a much smaller footprint than its 2D equivalent. Once we can do that, we can even imagine that we may start stacking some of these building blocks on top of each other,” he said.

“It’s more straightforward to imagine that this can be done with a regular structure such as an SRAM design, but also FPGAs are very regular structures. We can even imagine that we could design random logic and design standard cells within the constraints of such a 3D Lego block and build up a logic circuit with these Lego blocks in a 3D fabric,” he continued.

Heterogeneous integration with photonics is also on the drawing board. “We will combine this also with 3D heterogeneous integration where we will be using chip stacking technology with high bandwidth, high density through silicon vias. We can then combine all these layers with 3D stacking and through-silicon vias, integrate all of this on an interposer, which can also be the substrate to integrate these 3D cubes,” he said. “By adding also photonics on such an interposer, we can also realize optical IOs. This is just another rendition of Moore’s Law which will allow more complexity in a smaller form factor.”

EV Group (EVG), a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today introduced the EVG50 automated metrology system. Designed to support the increasingly stringent manufacturing requirements for advanced packaging, MEMS and photonics applications, the EVG50 performs high-resolution non-destructive multi-layer thickness and topography measurement, as well as void detection, in bonded wafer stacks and in photoresists used in optical lithography. The system measures layers down to two microns in thickness, can inspect up to one million points, and achieves throughputs of up to 55 300-mm wafers per hour. This combination of extremely high resolution and high throughput provides cost-efficient full-wafer inspection that enables device manufacturers to improve their wafer bonding and lithography processes, as well as achieve higher yields.

The EVG 50 Automated Metrology System from EV Group performs high-throughput, high-resolution measurements of critical wafer bonding and lithography process parameters.

The EVG 50 Automated Metrology System from EV Group performs high-throughput, high-resolution measurements of critical wafer bonding and lithography process parameters.

Dr. Thomas Glinsner, corporate technology director at EV Group, noted, “The semiconductor industry is witnessing a trend toward total control and monitoring of all production processes. Mid-end-of-line and back-end packaging processes face tighter process constraints at levels previously seen only in front-end-of-line wafer processing. This is creating an urgent need for highly accurate in-line metrology that can provide critical process data quickly and cost-effectively. The EVG50 is an important addition to our suite of metrology solutions that achieves these goals at speeds and resolutions that far surpass those of competitive systems.”

Building on a legacy of widely adopted metrology solutions

The standalone EVG50 system was developed based on the company’s existing in-line metrology module (IMM), which is available as an option in EVG’s line of 300-mm process equipment and has been widely implemented in high-volume manufacturing. The EVG50 complements the company’s versatile EVG40NT measurement system, which is the industry standard for bond overlay inspection, to meet increased customer demand for full-area layer thickness and topography measurement in critical applications. The EVG50’s high throughput and unparalleled accuracy and repeatability, even at ultra-high resolutions, enables cost-effective, 100-percent inspection of production wafers, resulting in improved process control.

The EVG50’s versatility allows it to measure coating thickness for lithography as well as wafer bow and warpage, and make void inspections for a bonded wafer stack on the same system, while its low-contact edge handling enables particle-free, full-area wafer inspection. Another key benefit of the EVG50 is its flexibility. Leveraging a multi-sensor measurement mount, the system can be customized for different thickness ranges and substrates to address a wide variety of customer requirements. Its self-calibration capability also allows for better system reproducibility and productive uptime.

Media, analysts and potential customers interested in learning more about EVG’s suite of metrology solutions, including the EVG50, are invited to visit the company’s booth #1017 in the South Hall of the Moscone Convention Center in San Francisco, Calif., at the SEMICON West show on July 12-14.

According to the latest market research report by Technavio, the semiconductor chip handler market is expected to grow at a CAGR of over 4% until 2020.

In this report, Technavio covers the present scenario and growth prospects of the global semiconductor chip handler market for 2016-2020. To calculate the market size, we consider the revenue generated from the sales of automated test equipment and the contribution of chip handlers in the automated test equipment market.

“A large number of fabless semiconductor companies are increasing the net aggregate demand for semiconductor ICs, creating the demand for automated test equipment. An increase in test houses has resulted in a rising number of potential automated test equipment customers, boosting revenue sales of market vendors,” said Asif Gani, one of Technavio’s lead industry analysts for semiconductors.

Semiconductor chip handler market in APAC: largest region

The global chip handler market in APAC was valued at USD 469.8 million in 2015. Taiwan, South Korea, China, and Japan are the key countries contributing to the growth of this region. The presence of prominent semiconductor foundries, such as Taiwan Semiconductor Manufacturing Company, United Microelectronics Corporation, and Semiconductor Manufacturing International, is creating the demand for chip handlers in APAC. The increase in the demand for consumer electronics and the rollout of LTE technology have led to an expansion of LTE base station infrastructure in China, increasing the demand for semiconductor ICs. These ICs need to be tested to avoid glitches and snags, thereby creating the demand for chip handlers.

The presence of prominent mobile and consumer electronic device manufacturers such as Samsung, LG, Fujitsu, and Panasonic in APAC is supporting the demand for semiconductor devices and thereby the demand for chip handlers in the region.

Semiconductor chip handler market in the US: second largest region

The global chip handler market in the US was valued at USD 104.4 million in 2015. The sports nutrition market in Europe is growing steadily. The increase in the demand for communication devices, such as smartphones and phablets, and automobile applications has been driving the production of semiconductor ICs in the US. The presence of few prominent semiconductor manufacturers, such as GlobalFoundries and Intel that fabricate wafers of sizes 200 nm and 300 nm, will create the demand for chip handlers in the nation.

Semiconductor chip handler market in Europe

The global chip handler market in Europe was valued at USD 43.96 million in 2015. Infineon Technologies, NXP Semiconductors, and STMicroelectronics are among the semiconductor manufacturing companies that account for the majority market share in this region. However, Europe will contribute low revenue to this market during the forecast period due to small concentrations of semiconductor IC manufacturers compared to APAC and the US. In addition, the Euro crisis in 2009 compelled many manufacturers to shift their semiconductor manufacturing facilities to APAC due to the availability of cheaper resources. This is likely to reduce the demand for chip handlers in the region during the forecast period.

The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing, design, and research, today announced worldwide sales of semiconductors reached $26.0 billion for the month of May 2016, an increase of 0.4 percent compared to the previous month’s total of $25.9 billion, but a decrease of 7.7 percent compared to the May 2015 total of $28.1 billion. Month-to-month sales into all regional markets held relatively steady, with China leading the way with 3.1 percent market growth. All monthly sales numbers are compiled by the World Semiconductor Trade Statistics (WSTS) organization and represent a three-month moving average.

“The small uptick in global semiconductor sales in May marked the market’s largest month-to-month growth in six months, but the overall landscape remains somewhat stagnant due to soft demand and unfavorable macroeconomic conditions,” said John Neuffer, president and CEO, Semiconductor Industry Association. “Most regional markets have struggled to gain traction in 2016, with the Americas falling well behind sales posted through the same point last year. Sales of analog products were a bright spot in May, notching both month-to-month and year-to-year increases.”

Regionally, month-to-month sales increased in China (3.1 percent), but slipped slightly in the Americas (-0.1 percent), Europe(-0.8 percent), Asia Pacific/All Other (-0.8 percent), and Japan (-1.8 percent). Year-to-year sales increased marginally in Japan(0.4 percent), but dropped in China (-0.5 percent), Europe (-8.8 percent), Asia Pacific/All Other (-11.5 percent), and the Americas (-15.0 percent).

May 2016

Billions

Month-to-Month Sales                               

Market

Last Month

Current Month

% Change

Americas

4.78

4.78

-0.1%

Europe

2.64

2.62

-0.8%

Japan

2.60

2.55

-1.8%

China

7.80

8.04

3.1%

Asia Pacific/All Other

8.03

7.96

-0.8%

Total

25.85

25.95

0.4%

Year-to-Year Sales                          

Market

Last Year

Current Month

% Change

Americas

5.62

4.78

-15.0%

Europe

2.87

2.62

-8.8%

Japan

2.54

2.55

0.4%

China

8.08

8.04

-0.5%

Asia Pacific/All Other

9.00

7.96

-11.5%

Total

28.11

25.95

-7.7%

Three-Month-Moving Average Sales

Market

Dec/Jan/Feb

Mar/Apr/May

% Change

Americas

5.03

4.78

-5.0%

Europe

2.66

2.62

-1.5%

Japan

2.47

2.55

3.0%

China

8.03

8.04

0.2%

Asia Pacific/All Other

7.83

7.96

1.6%

Total

26.03

25.95

-0.3%